diff --git a/crates/core_arch/src/x86_64/amx.rs b/crates/core_arch/src/x86_64/amx.rs index 547dc2a67e..69c62e8801 100644 --- a/crates/core_arch/src/x86_64/amx.rs +++ b/crates/core_arch/src/x86_64/amx.rs @@ -1,3 +1,6 @@ +#[cfg(test)] +use stdarch_test::assert_instr; + /// Load tile configuration from a 64-byte memory location specified by mem_addr. /// The tile configuration format is specified below, and includes the tile type pallette, /// the number of bytes per row, and the number of rows. If the specified pallette_id is zero, @@ -7,6 +10,7 @@ /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_loadconfig&ig_expand=6875) #[inline] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(ldtilecfg))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_loadconfig(mem_addr: *const u8) { ldtilecfg(mem_addr); @@ -19,6 +23,7 @@ pub unsafe fn _tile_loadconfig(mem_addr: *const u8) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_storeconfig&ig_expand=6879) #[inline] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(sttilecfg))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_storeconfig(mem_addr: *mut u8) { sttilecfg(mem_addr); @@ -30,6 +35,7 @@ pub unsafe fn _tile_storeconfig(mem_addr: *mut u8) { #[inline] #[rustc_legacy_const_generics(0)] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(tileloadd, DST = 0))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_loadd(base: *const u8, stride: usize) { static_assert_uimm_bits!(DST, 3); @@ -41,6 +47,7 @@ pub unsafe fn _tile_loadd(base: *const u8, stride: usize) { /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_tile_release&ig_expand=6878) #[inline] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(tilerelease))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_release() { tilerelease(); @@ -52,6 +59,7 @@ pub unsafe fn _tile_release() { #[inline] #[rustc_legacy_const_generics(0)] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(tilestored, DST = 0))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_stored(base: *mut u8, stride: usize) { static_assert_uimm_bits!(DST, 3); @@ -66,6 +74,7 @@ pub unsafe fn _tile_stored(base: *mut u8, stride: usize) { #[inline] #[rustc_legacy_const_generics(0)] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(tileloaddt1, DST = 0))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_stream_loadd(base: *const u8, stride: usize) { static_assert_uimm_bits!(DST, 3); @@ -78,6 +87,7 @@ pub unsafe fn _tile_stream_loadd(base: *const u8, stride: usize) #[inline] #[rustc_legacy_const_generics(0)] #[target_feature(enable = "amx-tile")] +#[cfg_attr(test, assert_instr(tilezero, DST = 0))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_zero() { static_assert_uimm_bits!(DST, 3); @@ -92,6 +102,7 @@ pub unsafe fn _tile_zero() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-bf16")] +#[cfg_attr(test, assert_instr(tdpbf16ps, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpbf16ps() { static_assert_uimm_bits!(DST, 3); @@ -109,6 +120,7 @@ pub unsafe fn _tile_dpbf16ps() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-int8")] +#[cfg_attr(test, assert_instr(tdpbssd, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpbssd() { static_assert_uimm_bits!(DST, 3); @@ -126,6 +138,7 @@ pub unsafe fn _tile_dpbssd() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-int8")] +#[cfg_attr(test, assert_instr(tdpbsud, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpbsud() { static_assert_uimm_bits!(DST, 3); @@ -143,6 +156,7 @@ pub unsafe fn _tile_dpbsud() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-int8")] +#[cfg_attr(test, assert_instr(tdpbusd, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpbusd() { static_assert_uimm_bits!(DST, 3); @@ -160,6 +174,7 @@ pub unsafe fn _tile_dpbusd() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-int8")] +#[cfg_attr(test, assert_instr(tdpbuud, DST = 0, A = 1, B = 2))] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpbuud() { static_assert_uimm_bits!(DST, 3); @@ -176,6 +191,10 @@ pub unsafe fn _tile_dpbuud() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-fp16")] +#[cfg_attr( + all(test, any(target_os = "linux", target_env = "msvc")), + assert_instr(tdpfp16ps, DST = 0, A = 1, B = 2) +)] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_dpfp16ps() { static_assert_uimm_bits!(DST, 3); @@ -196,6 +215,10 @@ pub unsafe fn _tile_dpfp16ps() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-complex")] +#[cfg_attr( + all(test, any(target_os = "linux", target_env = "msvc")), + assert_instr(tcmmimfp16ps, DST = 0, A = 1, B = 2) +)] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_cmmimfp16ps() { static_assert_uimm_bits!(DST, 3); @@ -216,6 +239,10 @@ pub unsafe fn _tile_cmmimfp16ps() { #[inline] #[rustc_legacy_const_generics(0, 1, 2)] #[target_feature(enable = "amx-complex")] +#[cfg_attr( + all(test, any(target_os = "linux", target_env = "msvc")), + assert_instr(tcmmrlfp16ps, DST = 0, A = 1, B = 2) +)] #[unstable(feature = "x86_amx_intrinsics", issue = "126622")] pub unsafe fn _tile_cmmrlfp16ps() { static_assert_uimm_bits!(DST, 3);