-
Notifications
You must be signed in to change notification settings - Fork 108
/
ObjectInitialised_SI.thy
1411 lines (1234 loc) · 67 KB
/
ObjectInitialised_SI.thy
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
(*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: GPL-2.0-only
*)
(*
* Object predicates.
*
* This file contains the definitions of the state of the objects created
* by the initialiser - when they are empty, initialised and the states in between.
* It also contains the decompositions of these predicates.
*)
theory ObjectInitialised_SI
imports WellFormed_SI
begin
(************************************************************
* Definitions about the state of objects,
* when an object is newly created, completely set up, etc.
* Non-separation style definitions are labeled "classical".
************************************************************)
(* Translates the object_ids in a cap for a given transformation.
* If the object_id is not in the mapping, it is transformed to undefined.
*)
definition
cap_transform :: "(cdl_object_id \<rightharpoonup> cdl_object_id) \<Rightarrow> cdl_cap \<Rightarrow> cdl_cap"
where
"cap_transform t cap \<equiv>
let
t' = \<lambda> obj. case t obj of None \<Rightarrow> undefined | Some obj' \<Rightarrow> obj'
in
if is_untyped_cap cap
then update_cap_objects (t' ` (cap_objects cap)) cap
else update_cap_object (t' (cap_object cap)) cap"
(* Translates the object_ids in an object for a given transformation.
* This does *not* translate the cdl_tcb_fault_endpoint.
* The cdl_tcb_fault_endpoint specifies a cap pointer,
* which should be the same in the spec and the kernel
* (as both are looked up in the same way).
*)
definition
spec2s :: "(cdl_object_id \<rightharpoonup> cdl_object_id) \<Rightarrow> cdl_object \<Rightarrow> cdl_object"
where
"spec2s t object \<equiv> update_slots (cap_transform t \<circ>\<^sub>M object_slots object) object"
(* This is used to define object_empty, object_initialised (and others).
* Since we pass in the spec object cap transformation, we can specify
* objects with no caps, all their caps (or anything else).
*)
definition
object_initialised_general :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow>
(cdl_object \<Rightarrow> cdl_object) \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object \<Rightarrow> sep_pred) \<Rightarrow>
cdl_object_id \<Rightarrow> sep_pred"
where
"object_initialised_general spec t obj_trans arrow spec_object_id \<equiv> \<lambda>s.
let spec_objects = cdl_objects spec
in
\<exists>kernel_object_id. \<exists>spec_object.
t spec_object_id = Some kernel_object_id \<and>
(arrow kernel_object_id (obj_trans spec_object)) s \<and>
spec_objects spec_object_id = Some spec_object"
(* The object is set up (as per the spec). *)
definition
object_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t) sep_map_o spec_object_id"
(* The object is created and in it's default state. *)
definition
object_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_empty spec t spec_object_id \<equiv>
object_initialised_general spec t object_default_state sep_map_o spec_object_id"
definition
objects_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id set \<Rightarrow> sep_pred"
where
"objects_initialised spec t obj_ids \<equiv> \<And>* obj_id \<in> obj_ids. object_initialised spec t obj_id"
definition
objects_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id set \<Rightarrow> sep_pred"
where
"objects_empty spec t obj_ids \<equiv> \<And>* obj_id \<in> obj_ids. object_empty spec t obj_id"
(* The object's fields are set up (as per the spec). *)
definition
object_fields_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_fields_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t) sep_map_f spec_object_id"
(* The object's slots are set up (as per the spec). *)
definition
object_slots_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_slots_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t) sep_map_S spec_object_id"
definition
object_empty_slots_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_empty_slots_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t) sep_map_E spec_object_id"
(* A particular slot of an object is set up (as per the spec). *)
definition
object_slot_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"object_slot_initialised spec t spec_object_id slot \<equiv>
object_initialised_general spec t (spec2s t) (\<lambda>p. sep_map_s (p, slot)) spec_object_id"
(* The object's fields are in their default state. *)
definition
object_fields_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_fields_empty spec t spec_object_id \<equiv>
object_initialised_general spec t object_default_state sep_map_f spec_object_id"
(* The object's slots are in their default state. *)
definition
object_slots_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_slots_empty spec t spec_object_id \<equiv>
object_initialised_general spec t object_default_state sep_map_S spec_object_id"
(* A particular slot of an object is set up (as per the spec). *)
definition
object_slot_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"object_slot_empty spec t spec_object_id slot \<equiv>
object_initialised_general spec t object_default_state (\<lambda>p. sep_map_s (p, slot)) spec_object_id"
definition
object_empty_slots_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"object_empty_slots_empty spec t spec_object_id \<equiv>
object_initialised_general spec t object_default_state sep_map_E spec_object_id"
definition slots_in_object_empty ::
"(cdl_cap \<Rightarrow> bool) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_state \<Rightarrow>
(cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> sep_pred" where
"slots_in_object_empty P obj_id spec t \<equiv>
sep_map_set_conj (object_empty spec t)
{obj. \<exists>slot. slot \<in> dom (slots_of obj_id spec)
\<and> cap_at P (obj_id, slot) spec
\<and> obj = cap_ref_object (obj_id, slot) spec}"
definition slots_in_object_init ::
"(cdl_cap \<Rightarrow> bool) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_state \<Rightarrow>
(cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> sep_pred" where
"slots_in_object_init P obj_id spec t \<equiv>
sep_map_set_conj (object_initialised spec t)
{obj. \<exists>slot. slot \<in> dom (slots_of obj_id spec)
\<and> cap_at P (obj_id, slot) spec
\<and> obj = cap_ref_object (obj_id, slot) spec}"
(**********************************************
* Predicates about CNodes being initialised. *
**********************************************)
(* A cnode that has the original caps in it set to NullCap *)
definition
cnode_half :: "cdl_state \<Rightarrow> cdl_object_id \<Rightarrow> cdl_object \<Rightarrow> cdl_object"
where
"cnode_half spec obj_id obj = update_slots (\<lambda>slot.
if original_cap_at (obj_id,slot) spec \<and> object_slots obj slot \<noteq> None
then Some NullCap else object_slots obj slot) obj"
definition
cnode_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"cnode_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> cnode_half spec spec_object_id) sep_map_o spec_object_id"
definition
cnodes_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id set \<Rightarrow> sep_pred"
where
"cnodes_half_initialised spec t obj_ids \<equiv> \<And>* obj_id \<in> obj_ids. cnode_half_initialised spec t obj_id"
(* The cnode's fields are half done (as per the spec). *)
definition
cnode_fields_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"cnode_fields_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> cnode_half spec spec_object_id) sep_map_f spec_object_id"
(* The cnode's slots are half done (as per the spec). *)
definition
cnode_slots_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"cnode_slots_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> cnode_half spec spec_object_id) sep_map_S spec_object_id"
(* A particular slot of an object is set up (as per the spec). *)
definition
cnode_slot_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"cnode_slot_half_initialised spec t spec_object_id slot \<equiv>
object_initialised_general spec t (spec2s t \<circ> cnode_half spec spec_object_id) (\<lambda>p. sep_map_s (p, slot)) spec_object_id"
definition
cnode_empty_slots_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"cnode_empty_slots_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> cnode_half spec spec_object_id) sep_map_E spec_object_id"
(**********************************************
* Predicates about CNodes being initialised. *
**********************************************)
(* A TCB that isn't set to be schedulable. *)
definition
tcb_half :: "cdl_state \<Rightarrow> cdl_object \<Rightarrow> cdl_object"
where
"tcb_half spec obj = update_slots (\<lambda>slot.
if (slot = tcb_pending_op_slot \<or> slot = tcb_replycap_slot \<or> slot = tcb_boundntfn_slot) \<and>
object_slots obj slot \<noteq> None
then Some NullCap else object_slots obj slot) obj"
definition
tcb_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"tcb_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> tcb_half spec) sep_map_o spec_object_id"
definition
tcbs_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id set \<Rightarrow> sep_pred"
where
"tcbs_half_initialised spec t obj_ids \<equiv> \<And>* obj_id \<in> obj_ids. tcb_half_initialised spec t obj_id"
(* The cnode's fields are half done (as per the spec). *)
definition
tcb_fields_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"tcb_fields_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> tcb_half spec) sep_map_f spec_object_id"
(* The cnode's slots are half done (as per the spec). *)
definition
tcb_slots_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"tcb_slots_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> tcb_half spec) sep_map_S spec_object_id"
(* A particular slot of an object is set up (as per the spec). *)
definition
tcb_slot_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"tcb_slot_half_initialised spec t spec_object_id slot \<equiv>
object_initialised_general spec t (spec2s t \<circ> tcb_half spec) (\<lambda>p. sep_map_s (p, slot)) spec_object_id"
definition
tcb_empty_slots_half_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_object_id \<Rightarrow> sep_pred"
where
"tcb_empty_slots_half_initialised spec t spec_object_id \<equiv>
object_initialised_general spec t (spec2s t \<circ> tcb_half spec) sep_map_E spec_object_id"
(********************************************
* Predicates about IRQs being initialised. *
********************************************)
definition
irq_initialised_general :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow>
(cdl_object \<Rightarrow> cdl_object) \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object \<Rightarrow> sep_pred) \<Rightarrow>
cdl_irq \<Rightarrow> sep_pred"
where
"irq_initialised_general spec t obj_trans arrow irq \<equiv> \<lambda>s.
\<exists>kernel_irq_id spec_irq_node spec_irq_id.
t spec_irq_id = Some kernel_irq_id \<and>
(irq \<mapsto>irq kernel_irq_id \<and>*
arrow kernel_irq_id (obj_trans spec_irq_node)) s \<and>
cdl_irq_node spec irq = spec_irq_id \<and>
cdl_objects spec spec_irq_id = Some spec_irq_node"
lemma irq_initialised_general_def2:
"irq_initialised_general spec t obj_trans arrow irq s =
(\<exists>kernel_irq_id spec_irq_id.
(object_initialised_general spec t obj_trans arrow spec_irq_id \<and>*
irq \<mapsto>irq kernel_irq_id) s \<and>
cdl_irq_node spec irq = spec_irq_id \<and>
t spec_irq_id = Some kernel_irq_id)"
by (fastforce simp: irq_initialised_general_def object_initialised_general_def
sep_conj_exists sep_conj_ac)
(* The irq is set up (as per the spec). *)
definition
irq_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_initialised spec t irq \<equiv>
irq_initialised_general spec t (spec2s t) sep_map_o irq"
(* The irq is created and in it's default state. *)
definition
irq_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_empty spec t irq \<equiv>
irq_initialised_general spec t object_default_state sep_map_o irq"
definition
irqs_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq set \<Rightarrow> sep_pred"
where
"irqs_initialised spec t irqs \<equiv> \<And>* irq \<in> irqs. irq_initialised spec t irq"
definition
irqs_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq set \<Rightarrow> sep_pred"
where
"irqs_empty spec t irqs \<equiv> \<And>* irq \<in> irqs. irq_empty spec t irq"
(* The object's fields are set up (as per the spec). *)
definition
irq_fields_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_fields_initialised spec t irq \<equiv>
irq_initialised_general spec t (spec2s t) sep_map_f irq"
(* The object's slots are set up (as per the spec). *)
definition
irq_slots_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_slots_initialised spec t irq \<equiv>
irq_initialised_general spec t (spec2s t) sep_map_S irq"
definition
irq_slot_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"irq_slot_initialised spec t irq slot \<equiv>
irq_initialised_general spec t (spec2s t) (\<lambda>p. sep_map_s (p, slot)) irq"
definition
irq_empty_slots_initialised :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_empty_slots_initialised spec t irq \<equiv>
irq_initialised_general spec t (spec2s t) sep_map_E irq"
(* The object's fields are set up (as per the spec). *)
definition
irq_fields_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_fields_empty spec t irq \<equiv>
irq_initialised_general spec t object_default_state sep_map_f irq"
(* The object's slots are set up (as per the spec). *)
definition
irq_slots_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_slots_empty spec t irq \<equiv>
irq_initialised_general spec t object_default_state sep_map_S irq"
definition
irq_slot_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> cdl_cnode_index \<Rightarrow> sep_pred"
where
"irq_slot_empty spec t irq slot \<equiv>
irq_initialised_general spec t object_default_state (\<lambda>p. sep_map_s (p, slot)) irq"
definition
irq_empty_slots_empty :: "cdl_state \<Rightarrow> (cdl_object_id \<Rightarrow> cdl_object_id option) \<Rightarrow> cdl_irq \<Rightarrow> sep_pred"
where
"irq_empty_slots_empty spec t irq \<equiv>
irq_initialised_general spec t object_default_state sep_map_E irq"
(*********************************************************************
* Introduction, destruction, and elimination rules for object_initialised. *
*********************************************************************)
lemma object_slot_initialisedI:
"\<lbrakk>t obj_id = Some kernel_object_id; cdl_objects spec obj_id = Some spec_object;
((kernel_object_id, slot) \<mapsto>s (spec2s t spec_object)) s\<rbrakk>
\<Longrightarrow> object_slot_initialised spec t obj_id slot s"
by (fastforce simp: object_slot_initialised_def object_initialised_general_def)
lemma object_slot_emptyI:
"\<lbrakk>well_formed spec; t obj_id = Some kernel_object_id;
cdl_objects spec obj_id = Some spec_object;
((kernel_object_id, slot) \<mapsto>s (object_default_state spec_object)) s\<rbrakk>
\<Longrightarrow> object_slot_empty spec t obj_id slot s"
apply (drule (1) well_formed_object_slots)
apply (fastforce simp: object_slot_empty_def object_initialised_general_def)
done
lemma object_slot_initialisedD:
"object_slot_initialised spec t obj_id slot s \<Longrightarrow>
\<exists>kernel_object_id spec_object.
t obj_id = Some kernel_object_id \<and>
((kernel_object_id, slot) \<mapsto>s (spec2s t spec_object)) s \<and>
cdl_objects spec obj_id = Some spec_object"
by (clarsimp simp: object_slot_initialised_def object_initialised_general_def)
lemma object_slot_emptyD:
"object_slot_empty spec t obj_id slot s \<Longrightarrow>
\<exists>kernel_object_id kernel_object spec_object.
t obj_id = Some kernel_object_id \<and>
((kernel_object_id, slot) \<mapsto>s (object_default_state spec_object)) s \<and>
cdl_objects spec obj_id = Some spec_object"
by (clarsimp simp: object_slot_empty_def object_initialised_general_def)
lemma object_slot_initialisedE:
"\<lbrakk>object_slot_initialised spec t obj_id slot s;
\<And>kernel_object_id spec_object.
\<lbrakk>t obj_id = Some kernel_object_id \<and>
((kernel_object_id, slot) \<mapsto>s (spec2s t spec_object)) s \<and>
cdl_objects spec obj_id = Some spec_object\<rbrakk> \<Longrightarrow> X\<rbrakk> \<Longrightarrow> X"
by (fastforce simp: object_slot_initialised_def object_initialised_general_def)
lemma object_slot_emptyE:
"\<lbrakk>object_slot_empty spec t obj_id slot s;
\<And>kernel_object_id spec_object.
\<lbrakk>t obj_id = Some kernel_object_id \<and>
((kernel_object_id, slot) \<mapsto>s (object_default_state spec_object)) s \<and>
cdl_objects spec obj_id = Some spec_object\<rbrakk> \<Longrightarrow> X\<rbrakk> \<Longrightarrow> X"
by (fastforce simp: object_slot_empty_def object_initialised_general_def)
(********************************************
* Decomposition of object_initialised into parts. *
********************************************)
lemma spec2s_objects [simp]:
"spec2s t Untyped = Untyped"
"spec2s t Endpoint = Endpoint"
"spec2s t Notification = Notification"
"spec2s t (Frame f) = Frame f"
by (clarsimp simp: spec2s_def update_slots_def)+
lemma object_initialised_general_decomp:
"\<forall>p v. ((arrowL p v) \<and>* (arrowR p v)) = (arrow p v)
\<Longrightarrow> object_initialised_general spec t obj_trans arrow spec_object_id
= (object_initialised_general spec t obj_trans arrowL spec_object_id \<and>*
object_initialised_general spec t obj_trans arrowR spec_object_id)"
by (fastforce simp: object_initialised_general_def sep_conj_exists)
(* This is slightly different, as irq_initialised consumes ownership of the IRQ mapping. *)
lemma irq_initialised_general_decomp:
"\<forall>p v. ((arrowL p v) \<and>* (arrowR p v)) = (arrow p v)
\<Longrightarrow> irq_initialised_general spec t obj_trans arrow irq
= (irq_initialised_general spec t obj_trans arrowL irq \<and>*
object_initialised_general spec t obj_trans arrowR (cdl_irq_node spec irq))"
by (fastforce simp: irq_initialised_general_def object_initialised_general_def
sep_conj_exists sep_conj_assoc)
lemma cap_transform_nullcap [simp]:
"cap_transform t NullCap = NullCap"
by (clarsimp simp: cap_transform_def cap_has_object_def
update_cap_object_def)
lemma cap_transform_pt_simp [simp]:
"cap_transform t (PageTableCap x y z) = PageTableCap (the (t x)) y z"
by (clarsimp simp: option.the_def cap_transform_def update_cap_object_def cap_object_def
split: option.splits)
lemma cap_transform_frame [simp]:
"cap_transform t (FrameCap x ptr rights n y z) = FrameCap x (the (t ptr)) rights n y z"
by (clarsimp simp: option.the_def cap_transform_def update_cap_object_def cap_object_def
split: option.splits)
lemma cap_type_cap_transform [simp]:
"cap_type (cap_transform t cap) = cap_type cap"
by (clarsimp simp: cap_transform_def cap_has_object_def)
lemma cap_has_object_cap_transform [simp]:
"cap_has_object (cap_transform t cap) = cap_has_object cap"
by (clarsimp simp: cap_transform_def)
lemma well_formed_cap_cap_transform [simp]:
"well_formed_cap (cap_transform t cap) = well_formed_cap cap"
by (clarsimp simp: cap_transform_def)
lemma is_default_cap_cap_transform [simp]:
"well_formed_cap cap \<Longrightarrow> is_default_cap (cap_transform t cap) = is_default_cap cap"
apply (clarsimp simp: is_default_cap_def well_formed_cap_def cap_type_def default_cap_def
cap_transform_def cap_has_object_def)
apply (cases cap, simp_all add: update_cap_object_def cnode_cap_size_def)
done
lemma default_cap_cap_transform:
"\<lbrakk>is_default_cap cap; well_formed_cap cap; t (cap_object cap) = Some obj_id;
cap_type cap = Some type; type \<noteq> IRQNodeType\<rbrakk>
\<Longrightarrow> default_cap type {obj_id} (cnode_cap_size cap) (is_device_cap cap) = cap_transform t cap"
by (clarsimp simp: is_default_cap_def default_cap_def cap_transform_def cap_type_def
well_formed_cap_def cap_has_object_def
update_cap_object_def split: cdl_cap.splits)+
lemma cap_transform_update_cap_object:
"\<lbrakk>t obj_id = Some k_obj_id; cap_object cap = obj_id; cap_type cap \<noteq> Some UntypedType\<rbrakk>
\<Longrightarrow> cap_transform t cap = update_cap_object k_obj_id cap"
by (clarsimp simp: update_cap_object_def cap_transform_def
cap_object_def cap_has_object_def
split: cdl_cap.splits)
lemma is_default_cap_def2:
"is_default_cap cap =
((\<exists>type. cap_type cap = Some type \<and> cap = default_cap type (cap_objects cap) (cnode_cap_size cap) (is_device_cap cap)) \<or>
is_irqhandler_cap cap)"
apply (clarsimp simp:is_default_cap_def)
apply (case_tac cap)
apply (auto simp: default_cap_def cap_type_def)
done
lemma default_cap_update_cap_object:
"\<lbrakk>is_default_cap cap; cap_type cap = Some type; cnode_cap_size cap \<le> 32;
type \<noteq> UntypedType; type \<noteq> AsidPoolType; type \<noteq> IRQNodeType\<rbrakk>
\<Longrightarrow> default_cap type {obj_id} (cnode_cap_size cap) (is_device_cap cap) = update_cap_object obj_id cap"
apply (subst default_cap_cap_transform, simp_all)
apply (frule (1) default_cap_well_formed_cap2 [where obj_ids="cap_objects cap"
and sz = "(cnode_cap_size cap)" and dev = "is_device_cap cap"], simp+)
apply (fastforce simp: is_default_cap_def2)
apply (subst cap_transform_update_cap_object, simp_all)
done
lemma default_cap_update_cap_object_pd:
"\<lbrakk>is_pd_cap cap; \<not> vm_cap_has_asid cap; \<not> is_fake_vm_cap cap\<rbrakk>
\<Longrightarrow> default_cap PageDirectoryType {obj_id} (cnode_cap_size cap) dev = update_cap_object obj_id cap"
by (clarsimp simp: default_cap_def update_cap_object_def cap_type_def
vm_cap_has_asid_def is_fake_vm_cap_def not_Some_eq_tuple
split: cdl_cap.splits cdl_frame_cap_type.splits)
lemma object_type_spec2s [simp]:
"object_type (spec2s t obj) = object_type obj"
by (clarsimp simp: spec2s_def)
lemma dom_object_slots_spec2s [simp]:
"dom (object_slots (spec2s t spec_object)) = dom (object_slots spec_object)"
by (fastforce simp: spec2s_def update_slots_def object_slots_def
split: cdl_object.splits option.splits)
lemma object_slots_spec2s:
"\<lbrakk>has_slots obj; object_slots obj slot = Some cap;
t (cap_object cap) = Some cap_object_id;
cap_has_object cap; \<not>is_untyped_cap cap\<rbrakk>
\<Longrightarrow> object_slots (spec2s t obj) slot = Some (update_cap_object cap_object_id cap)"
apply (clarsimp simp: spec2s_def)
apply (clarsimp simp: cap_transform_def)
done
lemma object_slots_spec2s':
"object_slots obj slot = Some spec_cap
\<Longrightarrow> object_slots (spec2s t obj) slot = Some (cap_transform t spec_cap)"
by (auto simp: spec2s_def object_slots_def update_slots_def
split: cdl_object.splits)
lemma object_slots_spec2s_NullCap [simp]:
"object_slots obj slot = Some NullCap
\<Longrightarrow> object_slots (spec2s t obj) slot = Some NullCap"
apply (case_tac "has_slots obj")
apply (clarsimp simp: spec2s_def)+
done
lemma update_cap_object_irqhandler_cap [simp]:
"is_irqhandler_cap cap \<Longrightarrow> update_cap_object obj_id cap = cap"
by (clarsimp simp: update_cap_object_def cap_type_def split: cdl_cap.splits)
lemma cap_transform_irqhandler_cap [simp]:
"is_irqhandler_cap cap \<Longrightarrow> cap_transform t cap = cap"
by (clarsimp simp: cap_transform_def)
lemma object_slots_spec2s_irqhandler_cap [simp]:
"\<lbrakk>object_slots obj slot = Some cap; is_irqhandler_cap cap\<rbrakk>
\<Longrightarrow> object_slots (spec2s t obj) slot = Some cap"
apply (case_tac "has_slots obj")
apply (clarsimp simp: spec2s_def)+
done
lemma update_slots_empty_spec2s [simp]:
"update_slots Map.empty (spec2s t obj)
= update_slots Map.empty obj"
by (clarsimp simp: spec2s_def)
lemma object_to_sep_state_fields_spec2s [simp]:
"object_to_sep_state obj_id (spec2s t obj) {Fields}
= object_to_sep_state obj_id obj {Fields}"
apply (rule ext)
apply (clarsimp simp: object_to_sep_state_def object_project_def object_clean_def
asid_reset_def spec2s_def object_wipe_slots_def)
done
lemma sep_map_f_spec2s [simp]:
"obj_id \<mapsto>f spec2s t obj = obj_id \<mapsto>f obj"
by (auto simp: sep_map_f_def sep_map_general_def)
lemma object_type_cnode_half [simp]:
"object_type (cnode_half spec obj_id obj) = object_type obj"
by (clarsimp simp: cnode_half_def)
lemma object_type_tcb_half [simp]:
"object_type (tcb_half spec tcb) = object_type tcb"
by (simp add: tcb_half_def)
lemma dom_object_slots_cnode_half [simp]:
"dom (object_slots (cnode_half spec obj_id obj)) = dom (object_slots obj)"
apply (clarsimp simp: cnode_half_def)
apply (case_tac "has_slots obj")
apply (auto simp: dom_def)
done
lemma dom_object_slots_tcb_half [simp]:
"dom (object_slots (tcb_half spec tcb)) =
dom (object_slots tcb)"
apply (clarsimp simp: tcb_half_def)
apply (case_tac "has_slots tcb")
apply (auto simp: dom_def)
done
lemma object_slots_tcb_half:
"object_slots (tcb_half spec obj) =
(\<lambda>slot. if (slot = tcb_pending_op_slot \<or> slot = tcb_replycap_slot \<or> slot = tcb_boundntfn_slot) \<and> object_slots obj slot \<noteq> None
then Some NullCap else object_slots obj slot)"
by (case_tac "has_slots obj", auto simp: tcb_half_def split: if_split_asm)
lemma intent_reset_object_type:
"intent_reset obj = intent_reset obj' \<Longrightarrow> object_type obj = object_type obj'"
by (clarsimp simp: intent_reset_def object_type_def split: cdl_object.splits)
lemma intent_reset_object_slots:
"intent_reset obj = intent_reset obj' \<Longrightarrow> object_slots obj = object_slots obj'"
by (clarsimp simp: intent_reset_def object_slots_def cdl_tcb.splits split: cdl_object.splits)
lemma intent_reset_object_size_bits:
"intent_reset obj = intent_reset obj' \<Longrightarrow> object_size_bits obj = object_size_bits obj'"
by (clarsimp simp: intent_reset_def object_size_bits_def split: cdl_object.splits)
lemma intent_reset_cnode:
"\<lbrakk>intent_reset obj = intent_reset obj'; object_type obj = CNodeType\<rbrakk>
\<Longrightarrow> obj = obj'"
by (clarsimp simp: intent_reset_def object_type_def split: cdl_object.splits)
lemma zero_in_tcb_slots[simp]:
"0 \<in> tcb_slots"
by (simp add: tcb_slot_defs)
lemma intent_reset_object_slots_NullCap:
"\<lbrakk>intent_reset (object_default_state obj) = intent_reset obj';
slot < 2 ^ object_size_bits obj; has_slots obj\<rbrakk>
\<Longrightarrow> object_slots obj' slot = Some NullCap"
apply (frule intent_reset_object_slots [THEN sym])
apply (clarsimp simp: object_default_state_def2 object_type_def has_slots_def
object_size_bits_def object_slots_def default_tcb_def
empty_cnode_def empty_irq_node_def empty_cap_map_def pt_size_def pd_size_def
split: cdl_object.splits)
done
lemma object_slots_object_default_state_NullCap':
"\<lbrakk>slot < 2 ^ object_size_bits obj; has_slots obj\<rbrakk>
\<Longrightarrow> object_slots (object_default_state obj) slot = Some NullCap"
by (clarsimp simp: object_default_state_def2 object_type_def has_slots_def
object_size_bits_def object_slots_def default_tcb_def
empty_cnode_def empty_irq_node_def empty_cap_map_def pt_size_def pd_size_def
split: cdl_object.splits)
lemma dom_range_upper:
"\<lbrakk>dom f = {0..<n}; f x = Some y\<rbrakk> \<Longrightarrow> x < n"
by fastforce
lemma object_slots_object_default_state_NullCap:
"\<lbrakk>well_formed spec; \<not>tcb_at obj_id spec; opt_cap (obj_id, slot) spec = Some cap;
cdl_objects spec obj_id = Some spec_object\<rbrakk>
\<Longrightarrow> object_slots (object_default_state spec_object) slot = Some NullCap"
apply (drule (1) well_formed_object_slots)
apply (clarsimp simp: object_default_state_def2
split: cdl_object.splits,
(fastforce simp: object_at_def is_cnode_def object_size_bits_def object_slots_def
empty_cnode_def empty_irq_node_def empty_cap_map_def
opt_cap_def slots_of_def
dest!: dom_range_upper)+)
done
lemma intent_reset_remove:
"obj = obj' \<Longrightarrow> intent_reset obj = intent_reset obj'"
by (rule arg_cong)
lemma sep_map_E_eq:
"\<lbrakk>object_type obj = object_type obj'; dom (object_slots obj) = dom (object_slots obj')\<rbrakk>
\<Longrightarrow> (p \<mapsto>E obj) = (p \<mapsto>E obj')"
apply (clarsimp simp: sep_map_E_def sep_map_S'_def sep_map_general_def)
apply (rule ext)
apply (subgoal_tac "object_to_sep_state p obj (Slot ` (UNIV - dom (object_slots obj')))
= object_to_sep_state p obj' (Slot ` (UNIV - dom (object_slots obj')))")
apply simp
apply (fastforce simp: object_to_sep_state_def split_def
object_project_def object_slots_object_clean
split: option.splits)
done
lemma sep_map_E_object_default_state:
"dom (object_slots (object_default_state obj)) = dom (object_slots obj)
\<Longrightarrow> (p \<mapsto>E object_default_state obj) = (p \<mapsto>E obj)"
using sep_map_E_eq [where obj="object_default_state obj" and obj'=obj]
by simp
lemma sep_map_E_intent_reset:
"\<lbrakk>intent_reset obj = intent_reset obj'\<rbrakk>
\<Longrightarrow> (p \<mapsto>E obj) = (p \<mapsto>E obj')"
apply (cut_tac obj=obj and obj'=obj' in sep_map_E_eq)
apply (erule intent_reset_object_type)
apply (drule intent_reset_object_slots, simp)
apply simp
done
lemma sep_map_E_spec2s [simp]:
"(p \<mapsto>E spec2s t obj) = (p \<mapsto>E obj)"
apply (cut_tac obj="spec2s t obj" and obj'=obj in sep_map_E_eq, simp)
apply (clarsimp simp: spec2s_def)
apply (case_tac "has_slots obj")
apply simp+
done
lemma sep_map_E_tcb_half [simp]:
"obj_id \<mapsto>E tcb_half spec tcb = obj_id \<mapsto>E tcb"
by (rule sep_map_E_eq, simp+)
lemma object_to_sep_state_fields_tcb_eq:
"\<lbrakk>cdl_tcb_fault_endpoint tcb = cdl_tcb_fault_endpoint tcb';
cdl_tcb_has_fault tcb = cdl_tcb_has_fault tcb';
cdl_tcb_domain tcb = cdl_tcb_domain tcb'\<rbrakk>
\<Longrightarrow> object_to_sep_state obj_id (Tcb tcb) {Fields}
= object_to_sep_state obj_id (Tcb tcb') {Fields}"
apply (rule ext)
apply (clarsimp simp: object_to_sep_state_def object_project_def object_clean_def
asid_reset_def spec2s_def object_wipe_slots_def
update_slots_def intent_reset_def cdl_tcb.splits)
done
lemma sep_map_f_eq_tcb:
"\<lbrakk>cdl_tcb_fault_endpoint tcb = cdl_tcb_fault_endpoint tcb';
cdl_tcb_has_fault tcb = cdl_tcb_has_fault tcb';
cdl_tcb_domain tcb = cdl_tcb_domain tcb'\<rbrakk>
\<Longrightarrow> obj_id \<mapsto>f Tcb tcb = obj_id \<mapsto>f Tcb tcb'"
apply (clarsimp simp: sep_map_f_def sep_map_general_def object_slots_def
object_clean_def intent_reset_def asid_reset_def update_slots_def)
apply (subst object_to_sep_state_fields_tcb_eq [where tcb'=tcb'], simp_all)
done
lemma sep_map_f_intent_reset_cnode:
"\<lbrakk>object_type obj = CNodeType; intent_reset obj = intent_reset obj'\<rbrakk>
\<Longrightarrow> obj_id \<mapsto>f obj = obj_id \<mapsto>f obj'"
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (rule ext)
apply (clarsimp simp: intent_reset_def object_type_def
split: cdl_object.splits)
done
lemma sep_map_f_empty_cnode:
"obj_id \<mapsto>f CNode (empty_cnode sz) =
obj_id \<mapsto>f CNode \<lparr>cdl_cnode_caps = Map.empty, cdl_cnode_size_bits = sz\<rparr>"
apply (rule ext, rename_tac s)
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (intro iffI ext |
clarsimp simp: object_to_sep_state_def object_clean_def
object_project_def object_slots_object_clean asid_reset_def
intent_reset_def object_wipe_slots_def
update_slots_def empty_cnode_def)+
done
lemma empty_cnode_object_size_bits:
"object_type obj = CNodeType \<Longrightarrow> obj_id \<mapsto>f CNode (empty_cnode (object_size_bits obj)) = obj_id \<mapsto>f obj"
apply (subst sep_map_f_empty_cnode)
apply (rule ext)
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (intro iffI ext |
clarsimp simp: object_type_def object_size_bits_def
object_clean_def reset_cap_asid_def asid_reset_def
object_to_sep_state_def object_project_def intent_reset_def
object_wipe_slots_def update_slots_def cdl_cnode.splits
split: cdl_object.splits)+
done
lemma sep_map_f_object_size_bits_cnode:
"\<lbrakk>object_type obj = CNodeType; object_type obj' = CNodeType;
object_size_bits obj = object_size_bits obj'\<rbrakk>
\<Longrightarrow> obj_id \<mapsto>f obj = obj_id \<mapsto>f obj'"
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (rule ext)
apply (intro iffI ext |
clarsimp simp: object_type_def object_size_bits_def
object_to_sep_state_def object_project_def intent_reset_def
object_wipe_slots_def update_slots_def
cdl_cnode.splits object_clean_def asid_reset_def
split: cdl_object.splits)+
done
lemma sep_map_f_object_size_bits_pt:
"\<lbrakk>object_type obj = PageTableType; object_type obj' = PageTableType\<rbrakk>
\<Longrightarrow> obj_id \<mapsto>f obj = obj_id \<mapsto>f obj'"
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (rule ext)
apply (intro iffI ext |
clarsimp simp: object_type_def object_size_bits_def
object_to_sep_state_def object_project_def intent_reset_def
object_wipe_slots_def update_slots_def object_clean_def asid_reset_def
split: cdl_object.splits)+
done
lemma sep_map_f_object_size_bits_pd:
"\<lbrakk>object_type obj = PageDirectoryType; object_type obj' = PageDirectoryType\<rbrakk>
\<Longrightarrow> obj_id \<mapsto>f obj = obj_id \<mapsto>f obj'"
apply (clarsimp simp: sep_map_f_def sep_map_general_def split: sep_state.splits)
apply (rule ext)
apply (intro iffI ext |
clarsimp simp: object_type_def object_size_bits_def
object_to_sep_state_def object_project_def intent_reset_def
object_wipe_slots_def update_slots_def object_clean_def asid_reset_def
split: cdl_object.splits)+
done
(********************************************************
* Object done, and other such predicate decompositions *
********************************************************)
lemma object_initialised_decomp:
"object_initialised spec t spec_object_id =
(object_fields_initialised spec t spec_object_id \<and>*
object_slots_initialised spec t spec_object_id)"
apply (clarsimp simp: object_initialised_def object_fields_initialised_def object_slots_initialised_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_o_decomp)
done
lemma object_empty_decomp:
"object_empty spec t spec_object_id =
(object_fields_empty spec t spec_object_id \<and>*
object_slots_empty spec t spec_object_id)"
apply (clarsimp simp: object_empty_def object_fields_empty_def object_slots_empty_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_o_decomp)
done
lemma cnode_half_initialised_decomp:
"cnode_half_initialised spec t spec_object_id =
(cnode_fields_half_initialised spec t spec_object_id \<and>*
cnode_slots_half_initialised spec t spec_object_id)"
apply (clarsimp simp: cnode_half_initialised_def cnode_fields_half_initialised_def cnode_slots_half_initialised_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_o_decomp)
done
lemma irq_initialised_decomp:
"irq_initialised spec t irq =
(irq_slots_initialised spec t irq \<and>*
object_fields_initialised spec t (cdl_irq_node spec irq))"
apply (clarsimp simp: irq_initialised_def object_fields_initialised_def irq_slots_initialised_def)
apply (rule irq_initialised_general_decomp)
apply (clarsimp simp: sep_map_o_decomp sep_conj_ac)
done
lemma irq_empty_decomp:
"irq_empty spec t irq =
(irq_slots_empty spec t irq \<and>*
object_fields_empty spec t (cdl_irq_node spec irq))"
apply (clarsimp simp: irq_empty_def object_fields_empty_def irq_slots_empty_def)
apply (rule irq_initialised_general_decomp)
apply (clarsimp simp: sep_map_o_decomp sep_conj_ac)
done
(************************************
* object_slots_initialised rewrite rules. *
************************************)
lemma object_slot_initialised_eq:
"\<lbrakk>t obj_id = Some kernel_object_id; cdl_objects spec obj_id = Some spec_object\<rbrakk>
\<Longrightarrow> object_slot_initialised spec t obj_id slot
= (kernel_object_id, slot) \<mapsto>s (spec2s t spec_object)"
apply (rule ext, rename_tac s)
apply (fastforce simp: object_slot_initialised_def object_initialised_general_def)
done
lemma object_slot_empty_eq:
"\<lbrakk>well_formed spec; t obj_id = Some kernel_object_id;
cdl_objects spec obj_id = Some spec_object\<rbrakk>
\<Longrightarrow> object_slot_empty spec t obj_id slot
= (kernel_object_id, slot) \<mapsto>s (object_default_state spec_object)"
apply (rule ext, rename_tac s)
apply (drule (1) well_formed_object_slots)
apply (fastforce simp: object_slot_empty_def object_initialised_general_def)
done
(****************************************************************************
* Lemmas decomposing object_slots_initialised. *
* These show that initialising an objects slots can be done slot by slot. *
****************************************************************************)
lemma object_slots_initialised_decomp_helper:
"\<lbrakk>slots \<noteq> {}; slots \<noteq> UNIV\<rbrakk>
\<Longrightarrow> object_slots_initialised spec t obj_id =
(object_initialised_general spec t (spec2s t) (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id \<and>*
object_initialised_general spec t (spec2s t) (\<lambda>obj_id. sep_map_S' (obj_id, UNIV-slots)) obj_id)"
apply (clarsimp simp: object_slots_initialised_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_S_decomp')
done
lemma object_slots_empty_decomp_helper:
"\<lbrakk>slots \<noteq> {}; slots \<noteq> UNIV\<rbrakk>
\<Longrightarrow> object_slots_empty spec t obj_id =
(object_initialised_general spec t object_default_state (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id \<and>*
object_initialised_general spec t object_default_state (\<lambda>obj_id. sep_map_S' (obj_id, UNIV-slots)) obj_id)"
apply (clarsimp simp: object_slots_empty_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_S_decomp')
done
lemma cnode_slots_half_initialised_decomp_helper:
"\<lbrakk>slots \<noteq> {}; slots \<noteq> UNIV\<rbrakk>
\<Longrightarrow> cnode_slots_half_initialised spec t obj_id =
(object_initialised_general spec t (spec2s t \<circ> cnode_half spec obj_id) (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id \<and>*
object_initialised_general spec t (spec2s t \<circ> cnode_half spec obj_id) (\<lambda>obj_id. sep_map_S' (obj_id, UNIV-slots)) obj_id)"
apply (clarsimp simp: cnode_slots_half_initialised_def)
apply (rule object_initialised_general_decomp)
apply (clarsimp simp: sep_map_S_decomp')
done
lemma sep_map_exists_rewrite':
"\<lbrakk>((obj_id, slots) \<mapsto>S' obj') s; intent_reset obj' = intent_reset obj\<rbrakk>
\<Longrightarrow> ((obj_id, slots) \<mapsto>S' obj) s"
apply (clarsimp simp: intent_reset_def sep_map_S'_def sep_map_general_def
split: cdl_object.splits)
apply (rename_tac cdl_tcb cdl_tcb')
apply (rule ext)
apply (clarsimp simp: sep_map_S'_def sep_map_general_def intent_reset_def
object_slots_object_clean object_to_sep_state_def object_project_def
split: if_split_asm)
apply (case_tac cdl_tcb,clarsimp)
apply (case_tac cdl_tcb',clarsimp simp:object_slots_def)
apply (intro conjI |
clarsimp simp: object_slots_object_clean |
clarsimp simp: object_slots_def)+
done
lemma sep_map_exists_rewrite:
"(\<lambda>s. \<exists>obj'. ((obj_id, slots) \<mapsto>S' obj') s \<and> intent_reset obj = intent_reset obj') =
(obj_id, slots) \<mapsto>S' obj"
apply (rule ext)
apply (rule iffI)
apply clarsimp
apply (erule sep_map_exists_rewrite', simp)
apply fastforce
done
lemma object_slots_general_decomp_list:
"\<lbrakk>distinct slots; slots \<noteq> []\<rbrakk>
\<Longrightarrow> (object_initialised_general spec t obj_trans (\<lambda>obj_id. sep_map_S' (obj_id, set slots)) obj_id) =
(\<And>* map (\<lambda>slot. object_initialised_general spec t obj_trans (\<lambda>p. sep_map_s (p, slot)) obj_id) slots)"
apply (induct slots)
apply clarsimp
apply (atomize)
apply (case_tac "slots = []")
apply (clarsimp simp: object_initialised_general_def sep_map_S'_def sep_map_s_def)
apply (clarsimp simp: object_initialised_general_def)
apply (rule ext)
apply (rule iffI)
apply clarsimp
apply (drule_tac obj_id=kernel_object_id and obj="obj_trans spec_object" in sep_map_S'_decomp', simp)
apply (fastforce simp: sep_conj_exists sep_conj_ac)
apply (clarsimp simp: sep_conj_exists)
apply (drule_tac obj_id=kernel_object_id and obj="obj_trans spec_object" in sep_map_S'_decomp', simp)
apply (fastforce simp: sep_conj_exists sep_conj_ac)
done
lemma object_slots_general_decomp_set:
"\<lbrakk>finite slots; slots \<noteq> {}\<rbrakk>
\<Longrightarrow> (object_initialised_general spec t obj_trans (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id) =
(\<And>* slot \<in> slots. object_initialised_general spec t obj_trans (\<lambda>p. sep_map_s (p, slot)) obj_id)"
apply (drule sep_map_set_conj_sep_list_conj [where
P="\<lambda>slot. object_initialised_general spec t obj_trans (\<lambda>p. sep_map_s (p, slot)) obj_id"])
apply (elim exE conjE)
apply simp
apply (subst object_slots_general_decomp_list [symmetric], clarsimp+)
done
lemma object_slots_initialised_decomp':
"\<lbrakk>finite slots; slots \<noteq> {}\<rbrakk>
\<Longrightarrow> (object_initialised_general spec t (spec2s t) (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id) =
(\<And>* slot \<in> slots. object_slot_initialised spec t obj_id slot)"
apply (clarsimp simp: object_slot_initialised_def [abs_def])
apply (erule (1) object_slots_general_decomp_set)
done
lemma object_slots_empty_decomp':
"\<lbrakk>finite slots; slots \<noteq> {}\<rbrakk>
\<Longrightarrow> (object_initialised_general spec t object_default_state (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id) =
(\<And>* slot \<in> slots. object_slot_empty spec t obj_id slot)"
apply (clarsimp simp: object_slot_empty_def [abs_def])
apply (erule (1) object_slots_general_decomp_set)
done
lemma cnode_slots_half_initialised_decomp':
"\<lbrakk>finite slots; slots \<noteq> {}\<rbrakk>
\<Longrightarrow> (object_initialised_general spec t (spec2s t \<circ> cnode_half spec obj_id) (\<lambda>obj_id. sep_map_S' (obj_id, slots)) obj_id) =
(\<And>* slot \<in> slots. cnode_slot_half_initialised spec t obj_id slot)"
apply (clarsimp simp: cnode_slot_half_initialised_def [abs_def])
apply (erule (1) object_slots_general_decomp_set)
done
lemma empty_slots_object_slots_initialised_object_empty_slots_initialised:
"dom (slots_of obj_id spec) = {} \<Longrightarrow> object_empty_slots_initialised spec t obj_id = object_slots_initialised spec t obj_id"
apply (rule ext, rename_tac s)