From a7aad427ded5dd97eaf647f3f5c547d3bfafcf49 Mon Sep 17 00:00:00 2001
From: Shahed Hassan Mahmad <78405065+shahed22@users.noreply.github.com>
Date: Wed, 31 Jul 2024 07:54:09 +0530
Subject: [PATCH] Update utils.py

---
 utils.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/utils.py b/utils.py
index 229667d..ba1354a 100644
--- a/utils.py
+++ b/utils.py
@@ -202,7 +202,7 @@ def is_valid_verilog_expression(expr, input_ports):
         token = token.strip()
         if not token:
             continue
-        if not valid_pattern.match(token) and token not in input_ports.keys() and re.fullmatch(r'^[+-]?\d+(\.\d+)?([eE][+-]?\d+)?$', tokens[-1]) is not None:
+        if not valid_pattern.match(token) and token not in input_ports.keys() and re.fullmatch(r'^\d+(\.\d+)?$', tokens[-1]) is not None:
             return False
 
     return True