add tests for firmware-emulator

Author: s5suzuki

autd3-driver/src/firmware_version.rs

@@ -4,7 +4,7 @@
  * Created Date: 27/04/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 06/12/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
@@ -14,7 +14,7 @@
 use std::fmt;
 
 pub const LATEST_VERSION_NUM_MAJOR: u8 = 0x8C;
-pub const LATEST_VERSION_NUM_MINOR: u8 = 0x00;
+pub const LATEST_VERSION_NUM_MINOR: u8 = 0x02;
 
 const ENABLED_EMULATOR_BIT: u8 = 1 << 7;
 
@@ -286,7 +286,7 @@ mod tests {
 
     #[test]
     fn latest_firmware_version() {
-        assert_eq!("v4.1.0", FirmwareInfo::latest_version());
+        assert_eq!("v4.1.2", FirmwareInfo::latest_version());
     }
 
     #[test]

autd3-firmware-emulator/Cargo.toml

@@ -14,3 +14,7 @@ keywords = ["autd"]
 autd3-driver = { path = "../autd3-driver", version = "19.0.0" }
 num-integer = "0.1.45"
 thiserror = "1.0.40"
+
+[dev-dependencies]
+autd3-derive = { path = "../autd3-derive", version = "19.0.0" }
+rand = "0.8.5"

autd3-firmware-emulator/src/cpu/emulator.rs

@@ -4,7 +4,7 @@
  * Created Date: 06/05/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 06/12/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
@@ -60,6 +60,14 @@ impl CPUEmulator {
         self.num_transducers
     }
 
+    pub fn synchronized(&self) -> bool {
+        self.synchronized
+    }
+
+    pub fn reads_fpga_info(&self) -> bool {
+        self.read_fpga_info
+    }
+
     pub fn ack(&self) -> u8 {
         self.ack
     }
@@ -138,7 +146,7 @@ impl CPUEmulator {
     fn write_mod(&mut self, data: &[u8]) {
         let flag = data[1];
 
-        let write = ((data[3] as u16) << 8) | data[2] as u16;
+        let write = ((data[3] as u32) << 8) | data[2] as u32;
         let data = if (flag & MODULATION_FLAG_BEGIN) == MODULATION_FLAG_BEGIN {
             self.mod_cycle = 0;
             self.bram_write(BRAM_SELECT_CONTROLLER, BRAM_ADDR_MOD_ADDR_OFFSET, 0);
@@ -160,7 +168,7 @@ impl CPUEmulator {
         let page_capacity =
             (self.mod_cycle & !MOD_BUF_PAGE_SIZE_MASK) + MOD_BUF_PAGE_SIZE - self.mod_cycle;
 
-        if write as u32 <= page_capacity {
+        if write < page_capacity {
             self.bram_cpy(
                 BRAM_SELECT_MOD,
                 ((self.mod_cycle & MOD_BUF_PAGE_SIZE_MASK) >> 1) as u16,
@@ -176,7 +184,7 @@ impl CPUEmulator {
                 (page_capacity >> 1) as usize,
             );
             self.mod_cycle += page_capacity;
-            let data = unsafe { data.add(page_capacity as _) };
+            let data = unsafe { data.add((page_capacity >> 1) as _) };
             self.bram_write(
                 BRAM_SELECT_CONTROLLER,
                 BRAM_ADDR_MOD_ADDR_OFFSET,
@@ -300,7 +308,7 @@ impl CPUEmulator {
         let page_capacity = (self.stm_cycle & !POINT_STM_BUF_PAGE_SIZE_MASK)
             + POINT_STM_BUF_PAGE_SIZE
             - self.stm_cycle;
-        if size <= page_capacity {
+        if size < page_capacity {
             let mut dst = ((self.stm_cycle & POINT_STM_BUF_PAGE_SIZE_MASK) << 3) as u16;
             (0..size as usize).for_each(|_| unsafe {
                 self.bram_write(BRAM_SELECT_STM, dst, src.read());
@@ -590,7 +598,6 @@ impl CPUEmulator {
 
     fn handle_payload(&mut self, tag: u8, data: &[u8]) {
         match tag {
-            TAG_NONE => {}
             TAG_CLEAR => self.clear(),
             TAG_SYNC => self.synchronize(),
             TAG_FIRM_INFO => match data[1] {
@@ -615,10 +622,9 @@ impl CPUEmulator {
                     self.read_fpga_info = self.read_fpga_info_store;
                 }
                 _ => {
-                    unimplemented!("Unsupported firmware info type")
+                    unreachable!("Unsupported firmware info type")
                 }
             },
-            TAG_UPDATE_FLAGS => (),
             TAG_MODULATION => self.write_mod(data),
             TAG_MODULATION_DELAY => self.write_mod_delay(&data[2..]),
             TAG_SILENCER => self.config_silencer(data),
@@ -665,3 +671,24 @@ impl CPUEmulator {
         self.ack = header.msg_id;
     }
 }
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    use rand::Rng;
+
+    #[test]
+    fn cpu_idx() {
+        let mut rng = rand::thread_rng();
+        let idx = rng.gen();
+        let cpu = CPUEmulator::new(idx, 249);
+        assert_eq!(cpu.idx(), idx);
+    }
+
+    #[test]
+    fn num_transducers() {
+        let cpu = CPUEmulator::new(0, 249);
+        assert_eq!(cpu.num_transducers(), 249);
+    }
+}

autd3-firmware-emulator/src/cpu/params.rs

@@ -4,15 +4,15 @@
  * Created Date: 07/05/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 06/12/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
  *
  */
 
 pub const CPU_VERSION_MAJOR: u16 = 0x8C;
-pub const CPU_VERSION_MINOR: u16 = 0x00;
+pub const CPU_VERSION_MINOR: u16 = 0x02;
 
 pub const BRAM_SELECT_CONTROLLER: u8 = 0x0;
 pub const BRAM_SELECT_MOD: u8 = 0x1;
@@ -53,11 +53,9 @@ pub const GAIN_STM_BUF_PAGE_SIZE_WIDTH: u32 = 6;
 pub const GAIN_STM_BUF_PAGE_SIZE: u32 = 1 << GAIN_STM_BUF_PAGE_SIZE_WIDTH;
 pub const GAIN_STM_BUF_PAGE_SIZE_MASK: u32 = GAIN_STM_BUF_PAGE_SIZE - 1;
 
-pub const TAG_NONE: u8 = 0x00;
 pub const TAG_CLEAR: u8 = 0x01;
 pub const TAG_SYNC: u8 = 0x02;
 pub const TAG_FIRM_INFO: u8 = 0x03;
-pub const TAG_UPDATE_FLAGS: u8 = 0x04;
 pub const TAG_MODULATION: u8 = 0x10;
 pub const TAG_MODULATION_DELAY: u8 = 0x11;
 pub const TAG_SILENCER: u8 = 0x20;

autd3-firmware-emulator/src/error.rs

@@ -4,7 +4,7 @@
  * Created Date: 06/05/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 06/12/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
@@ -86,17 +86,6 @@ impl FPGAEmulator {
         let addr = (addr & 0x3FFF) as usize;
         match select {
             BRAM_SELECT_CONTROLLER => self.controller_bram[addr],
-            BRAM_SELECT_MOD => {
-                let offset = self.controller_bram[ADDR_MOD_ADDR_OFFSET];
-                let addr = (offset as usize) << 14 | addr;
-                self.modulator_bram[addr]
-            }
-            BRAM_SELECT_NORMAL => self.normal_op_bram[addr],
-            BRAM_SELECT_STM => {
-                let offset = self.controller_bram[ADDR_STM_ADDR_OFFSET];
-                let addr = (offset as usize) << 14 | addr;
-                self.stm_op_bram[addr]
-            }
             _ => unreachable!(),
         }
     }
@@ -215,7 +204,7 @@ impl FPGAEmulator {
             m.push(((b >> 8) & 0x00FF) as u8);
         });
         if cycle % 2 != 0 {
-            let b = self.modulator_bram[(cycle + 1) >> 1];
+            let b = self.modulator_bram[cycle >> 1];
             m.push((b & 0x00FF) as u8);
         }
         m
@@ -284,21 +273,21 @@ impl FPGAEmulator {
         let mut x = (self.stm_op_bram[8 * idx + 1] as u32) << 16 & 0x30000;
         x |= self.stm_op_bram[8 * idx] as u32;
         let x = if (x & 0x20000) != 0 {
-            -131072 + (x & 0x1FFFF) as i32
+            (x | 0xFFFC0000) as i32
         } else {
             x as i32
         };
         let mut y = (self.stm_op_bram[8 * idx + 2] as u32) << 14 & 0x3C000;
         y |= self.stm_op_bram[8 * idx + 1] as u32 >> 2;
         let y = if (y & 0x20000) != 0 {
-            -131072 + (y & 0x1FFFF) as i32
+            (y | 0xFFFC0000) as i32
         } else {
             y as i32
         };
         let mut z = (self.stm_op_bram[8 * idx + 3] as u32) << 12 & 0x3F000;
         z |= self.stm_op_bram[8 * idx + 2] as u32 >> 4;
         let z = if (z & 0x20000) != 0 {
-            -131072 + (z & 0x1FFFF) as i32
+            (z | 0xFFFC0000) as i32
         } else {
             z as i32
         };
@@ -344,13 +333,51 @@ mod tests {
 
     #[test]
     fn test_to_pulse_width() {
-        for a in 0x00..0xFF {
-            for b in 0x00..0xFF {
+        for a in 0x00..=0xFF {
+            for b in 0x00..=0xFF {
                 assert_eq!(
                     to_pulse_width_actual(a, b),
                     FPGAEmulator::to_pulse_width(a, b)
                 );
             }
         }
     }
+
+    #[test]
+    #[should_panic]
+    fn read_panic() {
+        let fpga = FPGAEmulator::new(249);
+        let addr = BRAM_SELECT_MOD << 14;
+        fpga.read(addr);
+    }
+
+    #[test]
+    fn modulation() {
+        let mut fpga = FPGAEmulator::new(249);
+        fpga.modulator_bram[0] = 0x1234;
+        fpga.modulator_bram[1] = 0x5678;
+        fpga.controller_bram[ADDR_MOD_CYCLE] = 3 - 1;
+        assert_eq!(3, fpga.modulation_cycle());
+        assert_eq!(0x34, fpga.modulation_at(0));
+        assert_eq!(0x12, fpga.modulation_at(1));
+        assert_eq!(0x78, fpga.modulation_at(2));
+        let m = fpga.modulation();
+        assert_eq!(m.len(), 3);
+        assert_eq!(0x34, m[0]);
+        assert_eq!(0x12, m[1]);
+        assert_eq!(0x78, m[2]);
+    }
+
+    #[test]
+    fn is_outputting() {
+        let mut fpga = FPGAEmulator::new(249);
+        assert!(!fpga.is_outputting());
+
+        fpga.normal_op_bram[0] = 0xFFFF;
+        assert!(!fpga.is_outputting());
+
+        fpga.modulator_bram[0] = 0xFFFF;
+        fpga.controller_bram[ADDR_MOD_CYCLE] = 2 - 1;
+        assert!(fpga.is_outputting());
+    }
 }

autd3-firmware-emulator/src/fpga/emulator.rs

@@ -4,15 +4,15 @@
  * Created Date: 07/05/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 06/12/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
  *
  */
 
 pub const VERSION_NUM_MAJOR: u8 = 0x8C;
-pub const VERSION_NUM_MINOR: u8 = 0x00;
+pub const VERSION_NUM_MINOR: u8 = 0x02;
 
 pub const BRAM_SELECT_CONTROLLER: u16 = 0x0;
 pub const BRAM_SELECT_MOD: u16 = 0x1;

autd3-firmware-emulator/src/fpga/params.rs

@@ -4,15 +4,14 @@
  * Created Date: 06/05/2022
  * Author: Shun Suzuki
  * -----
- * Last Modified: 19/05/2023
+ * Last Modified: 14/12/2023
  * Modified By: Shun Suzuki (suzuki@hapis.k.u-tokyo.ac.jp)
  * -----
  * Copyright (c) 2022-2023 Shun Suzuki. All rights reserved.
  *
  */
 
 pub mod cpu;
-pub mod error;
 pub mod fpga;
 
 pub use cpu::emulator::CPUEmulator;