diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fv.c
new file mode 100644
index 00000000000..0cd1afc25f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fv.c
@@ -0,0 +1,189 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+typedef double float64_t;
+
+/*
+** test_sf_vc_fv_se_u16mf4:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16mf4(const int bit_field26, const int bit_field11_7, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16mf4(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u16mf2:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16mf2(const int bit_field26, const int bit_field11_7, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16mf2(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u16m1:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16m1(const int bit_field26, const int bit_field11_7, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16m1(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u16m2:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16m2(const int bit_field26, const int bit_field11_7, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16m2(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u16m4:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16m4(const int bit_field26, const int bit_field11_7, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16m4(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u16m8:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u16m8(const int bit_field26, const int bit_field11_7, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u16m8(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u32mf2:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u32mf2(const int bit_field26, const int bit_field11_7, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u32mf2(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u32m1:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u32m1(const int bit_field26, const int bit_field11_7, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u32m1(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u32m2:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u32m2(const int bit_field26, const int bit_field11_7, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u32m2(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u32m4:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u32m4(const int bit_field26, const int bit_field11_7, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u32m4(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u32m8:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u32m8(const int bit_field26, const int bit_field11_7, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u32m8(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u64m1:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u64m1(const int bit_field26, const int bit_field11_7, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u64m1(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u64m2:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u64m2(const int bit_field26, const int bit_field11_7, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u64m2(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u64m4:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u64m4(const int bit_field26, const int bit_field11_7, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u64m4(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fv_se_u64m8:
+** ...
+** sf\.vc\.fv\t[0-9]+,[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fv_se_u64m8(const int bit_field26, const int bit_field11_7, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fv_se_u64m8(bit_field26, bit_field11_7, vs2, fs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvv.c
new file mode 100644
index 00000000000..146acdd39e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvv.c
@@ -0,0 +1,190 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+typedef double float64_t;
+
+
+/*
+** test_sf_vc_fvv_se_u16mf4:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16mf4(const int bit_field26, vuint16mf4_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u16mf2:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16mf2(const int bit_field26, vuint16mf2_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u16m1:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16m1(const int bit_field26, vuint16m1_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u16m2:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16m2(const int bit_field26, vuint16m2_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u16m4:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16m4(const int bit_field26, vuint16m4_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u16m8:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u16m8(const int bit_field26, vuint16m8_t vd, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u16m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u32mf2:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u32mf2(const int bit_field26, vuint32mf2_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u32m1:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u32m1(const int bit_field26, vuint32m1_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u32m2:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u32m2(const int bit_field26, vuint32m2_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u32m4:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u32m4(const int bit_field26, vuint32m4_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u32m8:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u32m8(const int bit_field26, vuint32m8_t vd, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u32m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u64m1:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u64m1(const int bit_field26, vuint64m1_t vd, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u64m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u64m2:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u64m2(const int bit_field26, vuint64m2_t vd, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u64m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u64m4:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u64m4(const int bit_field26, vuint64m4_t vd, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u64m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvv_se_u64m8:
+** ...
+** sf\.vc\.fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvv_se_u64m8(const int bit_field26, vuint64m8_t vd, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvv_se_u64m8(bit_field26, vd, vs2, fs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvw.c
new file mode 100644
index 00000000000..2d5b3de9e22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_fvw.c
@@ -0,0 +1,117 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+
+
+/*
+** test_sf_vc_fvw_se_u16mf4:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u16mf4(const int bit_field26, vuint32mf2_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u16mf2:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u16mf2(const int bit_field26, vuint32m1_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u16m1:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u16m1(const int bit_field26, vuint32m2_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u16m2:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u16m2(const int bit_field26, vuint32m4_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u16m4:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u16m4(const int bit_field26, vuint32m8_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u32mf2:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u32mf2(const int bit_field26, vuint64m1_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u32m1:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u32m1(const int bit_field26, vuint64m2_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u32m2:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u32m2(const int bit_field26, vuint64m4_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_fvw_se_u32m4:
+** ...
+** sf\.vc\.fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+void test_sf_vc_fvw_se_u32m4(const int bit_field26, vuint64m8_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    __riscv_sf_vc_fvw_se_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_i.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_i.c
new file mode 100644
index 00000000000..e0c4ef32aa2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_i.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_i_se_u8mf8:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8mf8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8mf8(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8mf4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8mf4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8mf4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8mf2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8mf2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8m1:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8m1(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8m2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8m2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8m4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8m4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u8m8:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u8m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u8m8(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16mf4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16mf4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16mf4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16mf2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16mf2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16m1:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16m1(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16m2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16m2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16m4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16m4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u16m8:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u16m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u16m8(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u32mf2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u32mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u32mf2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u32m1:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u32m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u32m1(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u32m2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u32m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u32m2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u32m4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u32m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u32m4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u32m8:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u32m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u32m8(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u64m1:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u64m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u64m1(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u64m2:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u64m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u64m2(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u64m4:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u64m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u64m4(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
+
+/*
+** test_sf_vc_i_se_u64m8:
+** ...
+** sf\.vc\.i\t[0-9]+,[0-9]+,[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_i_se_u64m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, int simm5, size_t vl)
+{
+    __riscv_sf_vc_i_se_u64m8(bit_field27_26, bit_field24_20, bit_field11_7, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_iv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_iv.c
new file mode 100644
index 00000000000..f24be6eab51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_iv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_iv_se_u8mf8:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8mf8(const int bit_field27_26, const int bit_field11_7, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8mf8(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8mf4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8mf4(const int bit_field27_26, const int bit_field11_7, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8mf4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8mf2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8mf2(const int bit_field27_26, const int bit_field11_7, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8mf2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8m1:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8m1(const int bit_field27_26, const int bit_field11_7, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8m1(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8m2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8m2(const int bit_field27_26, const int bit_field11_7, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8m2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8m4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8m4(const int bit_field27_26, const int bit_field11_7, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8m4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u8m8:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u8m8(const int bit_field27_26, const int bit_field11_7, vuint8m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u8m8(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16mf4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16mf4(const int bit_field27_26, const int bit_field11_7, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16mf4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16mf2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16mf2(const int bit_field27_26, const int bit_field11_7, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16mf2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16m1:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16m1(const int bit_field27_26, const int bit_field11_7, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16m1(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16m2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16m2(const int bit_field27_26, const int bit_field11_7, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16m2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16m4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16m4(const int bit_field27_26, const int bit_field11_7, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16m4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u16m8:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u16m8(const int bit_field27_26, const int bit_field11_7, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u16m8(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u32mf2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u32mf2(const int bit_field27_26, const int bit_field11_7, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u32mf2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u32m1:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u32m1(const int bit_field27_26, const int bit_field11_7, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u32m1(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u32m2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u32m2(const int bit_field27_26, const int bit_field11_7, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u32m2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u32m4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u32m4(const int bit_field27_26, const int bit_field11_7, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u32m4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u32m8:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u32m8(const int bit_field27_26, const int bit_field11_7, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u32m8(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u64m1:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u64m1(const int bit_field27_26, const int bit_field11_7, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u64m1(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u64m2:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u64m2(const int bit_field27_26, const int bit_field11_7, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u64m2(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u64m4:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u64m4(const int bit_field27_26, const int bit_field11_7, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u64m4(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_iv_se_u64m8:
+** ...
+** sf\.vc\.iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_iv_se_u64m8(const int bit_field27_26, const int bit_field11_7, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_iv_se_u64m8(bit_field27_26, bit_field11_7, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivv.c
new file mode 100644
index 00000000000..aeb09becda3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_ivv_se_u8mf8:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8mf4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8mf2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8m1:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8m2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8m4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u8m8:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u8m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16mf4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16mf2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16m1:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16m2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16m4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u16m8:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u16m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u32mf2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u32m1:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u32m2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u32m4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u32m8:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u32m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u64m1:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u64m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u64m2:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u64m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u64m4:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u64m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivv_se_u64m8:
+** ...
+** sf\.vc\.ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivv_se_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivv_se_u64m8(bit_field27_26, vd, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivw.c
new file mode 100644
index 00000000000..53b752ebefb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_ivw.c
@@ -0,0 +1,186 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_ivw_se_u8mf8:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u8mf4:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u8mf2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u8m1:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u8m2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u8m4:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u16mf4:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u16mf2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u16m1:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u16m2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u16m4:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u32mf2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u32m1:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u32m2:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_ivw_se_u32m4:
+** ...
+** sf\.vc\.ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+void test_sf_vc_ivw_se_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    __riscv_sf_vc_ivw_se_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fv.c
new file mode 100644
index 00000000000..e5c95d6c470
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fv.c
@@ -0,0 +1,369 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+typedef double float64_t;
+
+/*
+** test_sf_vc_v_fv_u16mf4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_fv_u16mf4(const int bit_field26, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16mf4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16mf4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_fv_se_u16mf4(const int bit_field26, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16mf4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u16mf2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_fv_u16mf2(const int bit_field26, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16mf2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16mf2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_fv_se_u16mf2(const int bit_field26, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16mf2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u16m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_fv_u16m1(const int bit_field26, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_fv_se_u16m1(const int bit_field26, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u16m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_fv_u16m2(const int bit_field26, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_fv_se_u16m2(const int bit_field26, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u16m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_fv_u16m4(const int bit_field26, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_fv_se_u16m4(const int bit_field26, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u16m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_fv_u16m8(const int bit_field26, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u16m8(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u16m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_fv_se_u16m8(const int bit_field26, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u16m8(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u32mf2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fv_u32mf2(const int bit_field26, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u32mf2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u32mf2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fv_se_u32mf2(const int bit_field26, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u32mf2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u32m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fv_u32m1(const int bit_field26, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u32m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u32m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fv_se_u32m1(const int bit_field26, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u32m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u32m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fv_u32m2(const int bit_field26, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u32m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u32m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fv_se_u32m2(const int bit_field26, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u32m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u32m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fv_u32m4(const int bit_field26, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u32m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u32m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fv_se_u32m4(const int bit_field26, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u32m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u32m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fv_u32m8(const int bit_field26, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u32m8(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u32m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fv_se_u32m8(const int bit_field26, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u32m8(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u64m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fv_u64m1(const int bit_field26, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u64m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u64m1:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fv_se_u64m1(const int bit_field26, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u64m1(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u64m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fv_u64m2(const int bit_field26, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u64m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u64m2:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fv_se_u64m2(const int bit_field26, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u64m2(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u64m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fv_u64m4(const int bit_field26, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u64m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u64m4:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fv_se_u64m4(const int bit_field26, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u64m4(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_u64m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fv_u64m8(const int bit_field26, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_u64m8(bit_field26, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fv_se_u64m8:
+** ...
+** sf\.vc\.v.\fv\t[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fv_se_u64m8(const int bit_field26, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fv_se_u64m8(bit_field26, vs2, fs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvv.c
new file mode 100644
index 00000000000..7714b6e1433
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvv.c
@@ -0,0 +1,370 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+typedef double float64_t;
+
+
+/*
+** test_sf_vc_v_fvv_u16mf4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_fvv_u16mf4(const int bit_field26, vuint16mf4_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16mf4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4(const int bit_field26, vuint16mf4_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u16mf2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_fvv_u16mf2(const int bit_field26, vuint16mf2_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16mf2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_fvv_se_u16mf2(const int bit_field26, vuint16mf2_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u16m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_fvv_u16m1(const int bit_field26, vuint16m1_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_fvv_se_u16m1(const int bit_field26, vuint16m1_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u16m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_fvv_u16m2(const int bit_field26, vuint16m2_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_fvv_se_u16m2(const int bit_field26, vuint16m2_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u16m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_fvv_u16m4(const int bit_field26, vuint16m4_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_fvv_se_u16m4(const int bit_field26, vuint16m4_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u16m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_fvv_u16m8(const int bit_field26, vuint16m8_t vd, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u16m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u16m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_fvv_se_u16m8(const int bit_field26, vuint16m8_t vd, vuint16m8_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u16m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u32mf2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fvv_u32mf2(const int bit_field26, vuint32mf2_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u32mf2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fvv_se_u32mf2(const int bit_field26, vuint32mf2_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u32m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fvv_u32m1(const int bit_field26, vuint32m1_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u32m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fvv_se_u32m1(const int bit_field26, vuint32m1_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u32m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fvv_u32m2(const int bit_field26, vuint32m2_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u32m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fvv_se_u32m2(const int bit_field26, vuint32m2_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u32m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fvv_u32m4(const int bit_field26, vuint32m4_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u32m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fvv_se_u32m4(const int bit_field26, vuint32m4_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u32m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fvv_u32m8(const int bit_field26, vuint32m8_t vd, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u32m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u32m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fvv_se_u32m8(const int bit_field26, vuint32m8_t vd, vuint32m8_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u32m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u64m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fvv_u64m1(const int bit_field26, vuint64m1_t vd, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u64m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u64m1:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fvv_se_u64m1(const int bit_field26, vuint64m1_t vd, vuint64m1_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u64m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u64m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fvv_u64m2(const int bit_field26, vuint64m2_t vd, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u64m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u64m2:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fvv_se_u64m2(const int bit_field26, vuint64m2_t vd, vuint64m2_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u64m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u64m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fvv_u64m4(const int bit_field26, vuint64m4_t vd, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u64m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u64m4:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fvv_se_u64m4(const int bit_field26, vuint64m4_t vd, vuint64m4_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u64m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_u64m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fvv_u64m8(const int bit_field26, vuint64m8_t vd, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_u64m8(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvv_se_u64m8:
+** ...
+** sf\.vc\.v.\fvv\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fvv_se_u64m8(const int bit_field26, vuint64m8_t vd, vuint64m8_t vs2, float64_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvv_se_u64m8(bit_field26, vd, vs2, fs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvw.c
new file mode 100644
index 00000000000..9c7701f8a46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_fvw.c
@@ -0,0 +1,226 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+typedef _Float16 float16_t;
+typedef float float32_t;
+
+
+/*
+** test_sf_vc_v_fvw_u16mf4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fvw_u16mf4(const int bit_field26, vuint32mf2_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u16mf4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_fvw_se_u16mf4(const int bit_field26, vuint32mf2_t vd, vuint16mf4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u16mf4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u16mf2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fvw_u16mf2(const int bit_field26, vuint32m1_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u16mf2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_fvw_se_u16mf2(const int bit_field26, vuint32m1_t vd, vuint16mf2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u16mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u16m1:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fvw_u16m1(const int bit_field26, vuint32m2_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u16m1:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_fvw_se_u16m1(const int bit_field26, vuint32m2_t vd, vuint16m1_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u16m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u16m2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fvw_u16m2(const int bit_field26, vuint32m4_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u16m2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_fvw_se_u16m2(const int bit_field26, vuint32m4_t vd, vuint16m2_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u16m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u16m4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fvw_u16m4(const int bit_field26, vuint32m8_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u16m4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_fvw_se_u16m4(const int bit_field26, vuint32m8_t vd, vuint16m4_t vs2, float16_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u16m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u32mf2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fvw_u32mf2(const int bit_field26, vuint64m1_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u32mf2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_fvw_se_u32mf2(const int bit_field26, vuint64m1_t vd, vuint32mf2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u32mf2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u32m1:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fvw_u32m1(const int bit_field26, vuint64m2_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u32m1:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_fvw_se_u32m1(const int bit_field26, vuint64m2_t vd, vuint32m1_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u32m1(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u32m2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fvw_u32m2(const int bit_field26, vuint64m4_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u32m2:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_fvw_se_u32m2(const int bit_field26, vuint64m4_t vd, vuint32m2_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u32m2(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_u32m4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fvw_u32m4(const int bit_field26, vuint64m8_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
+
+/*
+** test_sf_vc_v_fvw_se_u32m4:
+** ...
+** sf\.vc\.v.\fvw\t[0-9]+,v[0-9]+,v[0-9]+,fa[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_fvw_se_u32m4(const int bit_field26, vuint64m8_t vd, vuint32m4_t vs2, float32_t fs1, size_t vl)
+{
+    return __riscv_sf_vc_v_fvw_se_u32m4(bit_field26, vd, vs2, fs1, vl);
+}
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_i.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_i.c
new file mode 100644
index 00000000000..702b93eb4a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_i.c
@@ -0,0 +1,534 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_v_i_u8mf8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8mf8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8mf8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8mf8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8mf4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_i_u8mf4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8mf4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8mf4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_i_se_u8mf4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8mf4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_i_u8mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_i_se_u8mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_i_u8m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_i_se_u8m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_i_u8m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_i_se_u8m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_i_u8m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_i_se_u8m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u8m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_i_u8m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u8m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u8m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_i_se_u8m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u8m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16mf4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_i_u16mf4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16mf4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16mf4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_i_se_u16mf4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16mf4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_i_u16mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_i_se_u16mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_i_u16m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_i_se_u16m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_i_u16m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_i_se_u16m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_i_u16m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_i_se_u16m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u16m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_i_u16m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u16m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u16m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_i_se_u16m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u16m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u32mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_i_u32mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u32mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u32mf2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_i_se_u32mf2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u32mf2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u32m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_i_u32m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u32m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u32m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_i_se_u32m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u32m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u32m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_i_u32m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u32m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u32m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_i_se_u32m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u32m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u32m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_i_u32m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u32m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u32m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_i_se_u32m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u32m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u32m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_i_u32m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u32m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u32m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_i_se_u32m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u32m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u64m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_i_u64m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u64m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u64m1:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_i_se_u64m1(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u64m1(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u64m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_i_u64m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u64m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u64m2:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_i_se_u64m2(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u64m2(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u64m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_i_u64m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u64m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u64m4:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_i_se_u64m4(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u64m4(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_u64m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_i_u64m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_u64m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_i_se_u64m8:
+** ...
+** sf\.vc\.v\.i\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_i_se_u64m8(const int bit_field27_26, const int bit_field24_20, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_i_se_u64m8(bit_field27_26, bit_field24_20, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_iv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_iv.c
new file mode 100644
index 00000000000..4857f10158d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_iv.c
@@ -0,0 +1,533 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_iv_u8mf8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_iv_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8mf8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8mf8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_iv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8mf8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8mf4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_iv_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8mf4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8mf4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_iv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8mf4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_iv_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_iv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_iv_u8m1(const int bit_field27_26, vuint8m1_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_iv_se_u8m1(const int bit_field27_26, vuint8m1_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_iv_u8m2(const int bit_field27_26, vuint8m2_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_iv_se_u8m2(const int bit_field27_26, vuint8m2_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_iv_u8m4(const int bit_field27_26, vuint8m4_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_iv_se_u8m4(const int bit_field27_26, vuint8m4_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u8m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_iv_u8m8(const int bit_field27_26, vuint8m8_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_u8m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u8m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_iv_se_u8m8(const int bit_field27_26, vuint8m8_t vs2, int simm5, size_t vl)
+{
+	return __riscv_sf_vc_v_iv_se_u8m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16mf4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_iv_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16mf4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16mf4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_iv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16mf4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_iv_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_iv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_iv_u16m1(const int bit_field27_26, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_iv_se_u16m1(const int bit_field27_26, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_iv_u16m2(const int bit_field27_26, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_iv_se_u16m2(const int bit_field27_26, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_iv_u16m4(const int bit_field27_26, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_iv_se_u16m4(const int bit_field27_26, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u16m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_iv_u16m8(const int bit_field27_26, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u16m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u16m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_iv_se_u16m8(const int bit_field27_26, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u16m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u32mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_iv_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u32mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u32mf2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_iv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u32mf2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u32m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_iv_u32m1(const int bit_field27_26, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u32m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u32m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_iv_se_u32m1(const int bit_field27_26, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u32m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u32m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_iv_u32m2(const int bit_field27_26, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u32m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u32m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_iv_se_u32m2(const int bit_field27_26, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u32m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u32m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_iv_u32m4(const int bit_field27_26, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u32m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u32m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_iv_se_u32m4(const int bit_field27_26, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u32m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u32m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_iv_u32m8(const int bit_field27_26, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u32m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u32m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_iv_se_u32m8(const int bit_field27_26, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u32m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u64m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_iv_u64m1(const int bit_field27_26, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u64m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u64m1:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_iv_se_u64m1(const int bit_field27_26, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u64m1(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u64m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_iv_u64m2(const int bit_field27_26, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u64m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u64m2:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_iv_se_u64m2(const int bit_field27_26, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u64m2(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u64m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_iv_u64m4(const int bit_field27_26, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u64m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u64m4:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_iv_se_u64m4(const int bit_field27_26, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u64m4(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_u64m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_iv_u64m8(const int bit_field27_26, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_u64m8(bit_field27_26, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_iv_se_u64m8:
+** ...
+** sf\.vc\.v.\iv\t[0-9]+,[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_iv_se_u64m8(const int bit_field27_26, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_iv_se_u64m8(bit_field27_26, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivv.c
new file mode 100644
index 00000000000..10e0562b150
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivv.c
@@ -0,0 +1,533 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_ivv_u8mf8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_ivv_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8mf8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8mf4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_ivv_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8mf4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_ivv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_ivv_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_ivv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_ivv_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_ivv_se_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_ivv_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_ivv_se_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_ivv_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_ivv_se_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u8m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_ivv_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u8m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u8m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_ivv_se_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u8m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16mf4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_ivv_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16mf4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_ivv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_ivv_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_ivv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_ivv_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_ivv_se_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_ivv_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_ivv_se_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_ivv_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_ivv_se_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u16m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_ivv_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u16m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u16m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_ivv_se_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u16m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u32mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_ivv_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u32mf2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_ivv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u32m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_ivv_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u32m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_ivv_se_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u32m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_ivv_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u32m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_ivv_se_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u32m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_ivv_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u32m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_ivv_se_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u32m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_ivv_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u32m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u32m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_ivv_se_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u32m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u64m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_ivv_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u64m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u64m1:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_ivv_se_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u64m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u64m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_ivv_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u64m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u64m2:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_ivv_se_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u64m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u64m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_ivv_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u64m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u64m4:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_ivv_se_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u64m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_u64m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_ivv_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_u64m8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivv_se_u64m8:
+** ...
+** sf\.vc\.v.\ivv\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_ivv_se_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivv_se_u64m8(bit_field27_26, vd, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivw.c
new file mode 100644
index 00000000000..9db55f43b71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_ivw.c
@@ -0,0 +1,365 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_ivw_u8mf8:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_ivw_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8mf8:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_ivw_se_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8mf8(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u8mf4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_ivw_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8mf4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_ivw_se_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u8mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_ivw_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_ivw_se_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u8m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_ivw_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_ivw_se_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u8m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_ivw_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_ivw_se_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u8m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_ivw_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u8m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_ivw_se_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u8m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u16mf4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_ivw_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u16mf4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_ivw_se_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u16mf4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u16mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_ivw_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u16mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_ivw_se_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u16mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u16m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_ivw_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u16m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_ivw_se_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u16m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u16m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_ivw_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u16m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_ivw_se_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u16m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u16m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_ivw_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u16m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_ivw_se_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u16m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u32mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_ivw_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u32mf2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_ivw_se_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u32mf2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u32m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_ivw_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u32m1:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_ivw_se_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u32m1(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u32m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_ivw_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u32m2:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_ivw_se_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u32m2(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_u32m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_ivw_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
+
+/*
+** test_sf_vc_v_ivw_se_u32m4:
+** ...
+** sf\.vc\.v.\ivw\t[0-9]+,v[0-9]+,v[0-9]+,[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_ivw_se_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, int simm5, size_t vl)
+{
+    return __riscv_sf_vc_v_ivw_se_u32m4(bit_field27_26, vd, vs2, simm5, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vv.c
new file mode 100644
index 00000000000..db41deb1663
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vv.c
@@ -0,0 +1,534 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_v_vv_u8mf8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_vv_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8mf8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8mf8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_vv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8mf8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8mf4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_vv_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8mf4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8mf4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_vv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8mf4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_vv_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_vv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_vv_u8m1(const int bit_field27_26, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_vv_se_u8m1(const int bit_field27_26, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_vv_u8m2(const int bit_field27_26, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_vv_se_u8m2(const int bit_field27_26, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_vv_u8m4(const int bit_field27_26, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_vv_se_u8m4(const int bit_field27_26, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u8m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_vv_u8m8(const int bit_field27_26, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u8m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u8m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_vv_se_u8m8(const int bit_field27_26, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u8m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16mf4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vv_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16mf4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16mf4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16mf4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vv_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vv_u16m1(const int bit_field27_26, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vv_se_u16m1(const int bit_field27_26, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vv_u16m2(const int bit_field27_26, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vv_se_u16m2(const int bit_field27_26, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vv_u16m4(const int bit_field27_26, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vv_se_u16m4(const int bit_field27_26, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u16m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vv_u16m8(const int bit_field27_26, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u16m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u16m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vv_se_u16m8(const int bit_field27_26, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u16m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u32mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vv_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u32mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u32mf2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u32mf2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u32m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vv_u32m1(const int bit_field27_26, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u32m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u32m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vv_se_u32m1(const int bit_field27_26, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u32m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u32m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vv_u32m2(const int bit_field27_26, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u32m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u32m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vv_se_u32m2(const int bit_field27_26, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u32m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u32m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vv_u32m4(const int bit_field27_26, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u32m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u32m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vv_se_u32m4(const int bit_field27_26, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u32m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u32m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vv_u32m8(const int bit_field27_26, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u32m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u32m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vv_se_u32m8(const int bit_field27_26, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u32m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u64m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vv_u64m1(const int bit_field27_26, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u64m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u64m1:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vv_se_u64m1(const int bit_field27_26, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u64m1(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u64m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vv_u64m2(const int bit_field27_26, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u64m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u64m2:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vv_se_u64m2(const int bit_field27_26, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u64m2(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u64m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vv_u64m4(const int bit_field27_26, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u64m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u64m4:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vv_se_u64m4(const int bit_field27_26, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u64m4(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_u64m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vv_u64m8(const int bit_field27_26, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_u64m8(bit_field27_26, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vv_se_u64m8:
+** ...
+** sf\.vc\.v\.vv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vv_se_u64m8(const int bit_field27_26, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vv_se_u64m8(bit_field27_26, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvv.c
new file mode 100644
index 00000000000..901fcc0fc6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvv.c
@@ -0,0 +1,534 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_v_vvv_u8mf8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_vvv_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8mf8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_vvv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8mf4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_vvv_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8mf4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_vvv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_vvv_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_vvv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_vvv_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_vvv_se_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_vvv_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_vvv_se_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_vvv_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_vvv_se_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u8m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_vvv_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u8m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u8m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_vvv_se_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u8m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16mf4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vvv_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16mf4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vvv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vvv_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vvv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vvv_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vvv_se_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vvv_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vvv_se_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vvv_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vvv_se_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u16m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vvv_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u16m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u16m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vvv_se_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u16m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u32mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vvv_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u32mf2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vvv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u32m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vvv_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u32m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vvv_se_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u32m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vvv_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u32m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vvv_se_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u32m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vvv_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u32m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vvv_se_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u32m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vvv_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u32m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u32m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vvv_se_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u32m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u64m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vvv_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u64m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u64m1:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vvv_se_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u64m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u64m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vvv_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u64m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u64m2:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vvv_se_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u64m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u64m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vvv_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u64m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u64m4:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vvv_se_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u64m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_u64m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vvv_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_u64m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvv_se_u64m8:
+** ...
+** sf\.vc\.v.\vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vvv_se_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvv_se_u64m8(bit_field27_26, vd, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvw.c
new file mode 100644
index 00000000000..00972531b48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_vvw.c
@@ -0,0 +1,365 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_vvw_u8mf8:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vvw_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8mf8:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_vvw_se_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u8mf4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vvw_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8mf4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_vvw_se_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u8mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vvw_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_vvw_se_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u8m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vvw_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_vvw_se_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u8m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vvw_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_vvw_se_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u8m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vvw_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u8m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_vvw_se_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u16mf4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vvw_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u16mf4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_vvw_se_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u16mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vvw_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u16mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_vvw_se_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u16m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vvw_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u16m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_vvw_se_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u16m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vvw_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u16m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_vvw_se_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u16m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vvw_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u16m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_vvw_se_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u32mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vvw_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u32mf2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_vvw_se_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u32m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vvw_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u32m1:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_vvw_se_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u32m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vvw_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u32m2:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_vvw_se_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_u32m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vvw_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_v_vvw_se_u32m4:
+** ...
+** sf\.vc\.v.\vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_vvw_se_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    return __riscv_sf_vc_v_vvw_se_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_x.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_x.c
new file mode 100644
index 00000000000..c860798b505
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_x.c
@@ -0,0 +1,533 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_x_u8mf8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_x_u8mf8(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8mf8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8mf8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_x_se_u8mf8(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8mf8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8mf4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_x_u8mf4(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8mf4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8mf4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_x_se_u8mf4(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8mf4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_x_u8mf2(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_x_se_u8mf2(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_x_u8m1(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_x_se_u8m1(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_x_u8m2(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_x_se_u8m2(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_x_u8m4(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_x_se_u8m4(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u8m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_x_u8m8(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u8m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u8m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_x_se_u8m8(const int bit_field27_26, const int bit_field24_20, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u8m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16mf4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_x_u16mf4(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16mf4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16mf4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_x_se_u16mf4(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16mf4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_x_u16mf2(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_x_se_u16mf2(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_x_u16m1(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_x_se_u16m1(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_x_u16m2(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_x_se_u16m2(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_x_u16m4(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_x_se_u16m4(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u16m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_x_u16m8(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u16m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u16m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_x_se_u16m8(const int bit_field27_26, const int bit_field24_20, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u16m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u32mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_x_u32mf2(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u32mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u32mf2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_x_se_u32mf2(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u32mf2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u32m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_x_u32m1(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u32m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u32m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_x_se_u32m1(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u32m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u32m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_x_u32m2(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u32m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u32m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_x_se_u32m2(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u32m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u32m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_x_u32m4(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u32m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u32m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_x_se_u32m4(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u32m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u32m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_x_u32m8(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u32m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u32m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_x_se_u32m8(const int bit_field27_26, const int bit_field24_20, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u32m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u64m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_x_u64m1(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u64m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u64m1:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_x_se_u64m1(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u64m1(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u64m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_x_u64m2(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u64m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u64m2:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_x_se_u64m2(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u64m2(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u64m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_x_u64m4(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u64m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u64m4:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_x_se_u64m4(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u64m4(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_u64m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_x_u64m8(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_u64m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
+
+/*
+** test_sf_vc_v_x_se_u64m8:
+** ...
+** sf\.vc\.v\.x\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_x_se_u64m8(const int bit_field27_26, const int bit_field24_20, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_x_se_u64m8(bit_field27_26, bit_field24_20,  xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xv.c
new file mode 100644
index 00000000000..5632a6f0123
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xv.c
@@ -0,0 +1,534 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_v_xv_u8mf8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_xv_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8mf8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8mf8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_xv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8mf8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8mf4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_xv_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8mf4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8mf4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_xv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8mf4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_xv_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_xv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_xv_u8m1(const int bit_field27_26, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_xv_se_u8m1(const int bit_field27_26, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_xv_u8m2(const int bit_field27_26, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_xv_se_u8m2(const int bit_field27_26, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_xv_u8m4(const int bit_field27_26, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_xv_se_u8m4(const int bit_field27_26, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u8m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_xv_u8m8(const int bit_field27_26, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u8m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u8m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_xv_se_u8m8(const int bit_field27_26, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u8m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16mf4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xv_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16mf4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16mf4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16mf4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xv_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xv_u16m1(const int bit_field27_26, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xv_se_u16m1(const int bit_field27_26, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xv_u16m2(const int bit_field27_26, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xv_se_u16m2(const int bit_field27_26, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xv_u16m4(const int bit_field27_26, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xv_se_u16m4(const int bit_field27_26, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u16m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xv_u16m8(const int bit_field27_26, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u16m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u16m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xv_se_u16m8(const int bit_field27_26, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u16m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u32mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xv_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u32mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u32mf2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u32mf2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u32m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xv_u32m1(const int bit_field27_26, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u32m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u32m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xv_se_u32m1(const int bit_field27_26, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u32m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u32m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xv_u32m2(const int bit_field27_26, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u32m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u32m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xv_se_u32m2(const int bit_field27_26, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u32m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u32m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xv_u32m4(const int bit_field27_26, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u32m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u32m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xv_se_u32m4(const int bit_field27_26, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u32m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u32m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xv_u32m8(const int bit_field27_26, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u32m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u32m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xv_se_u32m8(const int bit_field27_26, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u32m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u64m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xv_u64m1(const int bit_field27_26, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u64m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u64m1:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xv_se_u64m1(const int bit_field27_26, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u64m1(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u64m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xv_u64m2(const int bit_field27_26, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u64m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u64m2:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xv_se_u64m2(const int bit_field27_26, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u64m2(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u64m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xv_u64m4(const int bit_field27_26, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u64m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u64m4:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xv_se_u64m4(const int bit_field27_26, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u64m4(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_u64m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xv_u64m8(const int bit_field27_26, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_u64m8(bit_field27_26, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xv_se_u64m8:
+** ...
+** sf\.vc\.v.\xv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xv_se_u64m8(const int bit_field27_26, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xv_se_u64m8(bit_field27_26, vs2, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvv.c
new file mode 100644
index 00000000000..8176c1306fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvv.c
@@ -0,0 +1,534 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_v_xvv_u8mf8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_xvv_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8mf8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf8_t test_sf_vc_v_xvv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8mf4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_xvv_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8mf4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf4_t test_sf_vc_v_xvv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_xvv_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8mf2_t test_sf_vc_v_xvv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_xvv_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m1_t test_sf_vc_v_xvv_se_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_xvv_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m2_t test_sf_vc_v_xvv_se_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_xvv_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m4_t test_sf_vc_v_xvv_se_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u8m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_xvv_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u8m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u8m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint8m8_t test_sf_vc_v_xvv_se_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u8m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16mf4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xvv_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16mf4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xvv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xvv_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xvv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xvv_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xvv_se_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xvv_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xvv_se_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xvv_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xvv_se_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u16m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xvv_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u16m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u16m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xvv_se_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u16m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u32mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xvv_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u32mf2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xvv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u32m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xvv_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u32m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xvv_se_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u32m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xvv_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u32m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xvv_se_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u32m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xvv_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u32m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xvv_se_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u32m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xvv_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u32m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u32m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xvv_se_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u32m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u64m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xvv_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u64m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u64m1:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xvv_se_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u64m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u64m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xvv_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u64m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u64m2:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xvv_se_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u64m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u64m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xvv_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u64m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u64m4:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xvv_se_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u64m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_u64m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xvv_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_u64m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvv_se_u64m8:
+** ...
+** sf\.vc\.v.\xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xvv_se_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvv_se_u64m8(bit_field27_26, vd, vs2, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvw.c
new file mode 100644
index 00000000000..8338cd0c212
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v_xvw.c
@@ -0,0 +1,365 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+/*
+** test_sf_vc_v_xvw_u8mf8:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xvw_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8mf8:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf4_t test_sf_vc_v_xvw_se_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u8mf4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xvw_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8mf4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16mf2_t test_sf_vc_v_xvw_se_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u8mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xvw_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m1_t test_sf_vc_v_xvw_se_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u8m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xvw_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m2_t test_sf_vc_v_xvw_se_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u8m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xvw_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m4_t test_sf_vc_v_xvw_se_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u8m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xvw_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u8m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint16m8_t test_sf_vc_v_xvw_se_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u16mf4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xvw_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u16mf4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32mf2_t test_sf_vc_v_xvw_se_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u16mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xvw_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u16mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m1_t test_sf_vc_v_xvw_se_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u16m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xvw_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u16m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m2_t test_sf_vc_v_xvw_se_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u16m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xvw_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u16m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m4_t test_sf_vc_v_xvw_se_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u16m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xvw_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u16m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint32m8_t test_sf_vc_v_xvw_se_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u32mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xvw_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u32mf2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m1_t test_sf_vc_v_xvw_se_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u32m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xvw_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u32m1:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m2_t test_sf_vc_v_xvw_se_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u32m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xvw_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u32m2:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m4_t test_sf_vc_v_xvw_se_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_u32m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xvw_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_v_xvw_se_u32m4:
+** ...
+** sf\.vc\.v.\xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+vuint64m8_t test_sf_vc_v_xvw_se_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    return __riscv_sf_vc_v_xvw_se_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vv.c
new file mode 100644
index 00000000000..078c570c703
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_vv_se_u8mf8:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8mf8(const int bit_field27_26, const int bit_field11_7, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8mf8(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8mf4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8mf4(const int bit_field27_26, const int bit_field11_7, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8mf4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8mf2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8mf2(const int bit_field27_26, const int bit_field11_7, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8mf2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8m1:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8m1(const int bit_field27_26, const int bit_field11_7, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8m1(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8m2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8m2(const int bit_field27_26, const int bit_field11_7, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8m2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8m4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8m4(const int bit_field27_26, const int bit_field11_7, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8m4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u8m8:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u8m8(const int bit_field27_26, const int bit_field11_7, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u8m8(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16mf4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16mf4(const int bit_field27_26, const int bit_field11_7, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16mf4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16mf2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16mf2(const int bit_field27_26, const int bit_field11_7, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16mf2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16m1:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16m1(const int bit_field27_26, const int bit_field11_7, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16m1(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16m2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16m2(const int bit_field27_26, const int bit_field11_7, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16m2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16m4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16m4(const int bit_field27_26, const int bit_field11_7, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16m4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u16m8:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u16m8(const int bit_field27_26, const int bit_field11_7, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u16m8(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u32mf2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u32mf2(const int bit_field27_26, const int bit_field11_7, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u32mf2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u32m1:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u32m1(const int bit_field27_26, const int bit_field11_7, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u32m1(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u32m2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u32m2(const int bit_field27_26, const int bit_field11_7, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u32m2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u32m4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u32m4(const int bit_field27_26, const int bit_field11_7, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u32m4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u32m8:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u32m8(const int bit_field27_26, const int bit_field11_7, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u32m8(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u64m1:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u64m1(const int bit_field27_26, const int bit_field11_7, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u64m1(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u64m2:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u64m2(const int bit_field27_26, const int bit_field11_7, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u64m2(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u64m4:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u64m4(const int bit_field27_26, const int bit_field11_7, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u64m4(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vv_se_u64m8:
+** ...
+** sf\.vc\.vv\t[0-9]+,[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vv_se_u64m8(const int bit_field27_26, const int bit_field11_7, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vv_se_u64m8(bit_field27_26, bit_field11_7, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvv.c
new file mode 100644
index 00000000000..e2063614e21
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_vvv_se_u8mf8:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8mf8(const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8mf4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8mf4(const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8mf2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8mf2(const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8m1:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8m1(const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8m2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8m2(const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8m4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8m4(const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u8m8:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u8m8(const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u8m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16mf4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16mf4(const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16mf2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16mf2(const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16m1:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16m1(const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16m2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16m2(const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16m4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16m4(const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u16m8:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u16m8(const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u16m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u32mf2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u32mf2(const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u32m1:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u32m1(const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u32m2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u32m2(const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u32m4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u32m4(const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u32m8:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u32m8(const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u32m8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u64m1:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u64m1(const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u64m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u64m2:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u64m2(const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u64m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u64m4:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u64m4(const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u64m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvv_se_u64m8:
+** ...
+** sf\.vc\.vvv\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvv_se_u64m8(const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvv_se_u64m8(bit_field27_26, vd, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvw.c
new file mode 100644
index 00000000000..19776805651
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_vvw.c
@@ -0,0 +1,186 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_vvw_se_u8mf8:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8mf8(const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8mf8(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u8mf4:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8mf4(const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, vuint8mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u8mf2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8mf2(const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, vuint8mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u8m1:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8m1(const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, vuint8m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u8m2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8m2(const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, vuint8m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u8m4:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u8m4(const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, vuint8m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u8m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u16mf4:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u16mf4(const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, vuint16mf4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u16mf4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u16mf2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u16mf2(const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, vuint16mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u16mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u16m1:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u16m1(const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, vuint16m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u16m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u16m2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u16m2(const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, vuint16m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u16m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u16m4:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u16m4(const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, vuint16m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u16m4(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u32mf2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u32mf2(const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, vuint32mf2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u32mf2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u32m1:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u32m1(const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, vuint32m1_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u32m1(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u32m2:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u32m2(const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, vuint32m2_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u32m2(bit_field27_26, vd, vs2, rs1, vl);
+}
+
+/*
+** test_sf_vc_vvw_se_u32m4:
+** ...
+** sf\.vc\.vvw\t[0-9]+,v[0-9]+,v[0-9]+,v[0-9]+
+** ...
+*/
+
+void test_sf_vc_vvw_se_u32m4(const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, vuint32m4_t rs1, size_t vl)
+{
+    __riscv_sf_vc_vvw_se_u32m4(bit_field27_26, vd, vs2, rs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_x.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_x.c
new file mode 100644
index 00000000000..694fefb2762
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_x.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_x_se_u8mf8:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8mf8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8mf8(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8mf4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8mf4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8mf4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8mf2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8mf2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8m1:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8m1(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8m2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8m2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8m4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8m4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u8m8:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u8m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u8m8(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16mf4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16mf4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16mf4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16mf2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16mf2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16m1:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16m1(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16m2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16m2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16m4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16m4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u16m8:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u16m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u16m8(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u32mf2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u32mf2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u32mf2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u32m1:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u32m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u32m1(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u32m2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u32m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u32m2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u32m4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u32m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u32m4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u32m8:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u32m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u32m8(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u64m1:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u64m1(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u64m1(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u64m2:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u64m2(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u64m2(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u64m4:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u64m4(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u64m4(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
+
+/*
+** test_sf_vc_x_se_u64m8:
+** ...
+** sf\.vc\.x\t[0-9]+,[0-9]+,[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_x_se_u64m8(const int bit_field27_26, const int bit_field24_20, const int bit_field11_7, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_x_se_u64m8(bit_field27_26, bit_field24_20, bit_field11_7, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xv.c
new file mode 100644
index 00000000000..047e8121d33
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_xv_se_u8mf8:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8mf8(const int bit_field27_26, const int bit_field11_7, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8mf8(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8mf4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8mf4(const int bit_field27_26, const int bit_field11_7, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8mf4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8mf2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8mf2(const int bit_field27_26, const int bit_field11_7, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8mf2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8m1:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8m1(const int bit_field27_26, const int bit_field11_7, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8m1(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8m2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8m2(const int bit_field27_26, const int bit_field11_7, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8m2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8m4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8m4(const int bit_field27_26, const int bit_field11_7, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8m4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u8m8:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u8m8(const int bit_field27_26, const int bit_field11_7, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u8m8(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16mf4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16mf4(const int bit_field27_26, const int bit_field11_7, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16mf4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16mf2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16mf2(const int bit_field27_26, const int bit_field11_7, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16mf2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16m1:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16m1(const int bit_field27_26, const int bit_field11_7, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16m1(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16m2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16m2(const int bit_field27_26, const int bit_field11_7, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16m2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16m4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16m4(const int bit_field27_26, const int bit_field11_7, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16m4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u16m8:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u16m8(const int bit_field27_26, const int bit_field11_7, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u16m8(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u32mf2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u32mf2(const int bit_field27_26, const int bit_field11_7, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u32mf2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u32m1:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u32m1(const int bit_field27_26, const int bit_field11_7, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u32m1(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u32m2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u32m2(const int bit_field27_26, const int bit_field11_7, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u32m2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u32m4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u32m4(const int bit_field27_26, const int bit_field11_7, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u32m4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u32m8:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u32m8(const int bit_field27_26, const int bit_field11_7, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u32m8(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u64m1:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u64m1(const int bit_field27_26, const int bit_field11_7, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u64m1(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u64m2:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u64m2(const int bit_field27_26, const int bit_field11_7, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u64m2(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u64m4:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u64m4(const int bit_field27_26, const int bit_field11_7, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u64m4(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xv_se_u64m8:
+** ...
+** sf\.vc\.xv\t[0-9]+,[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xv_se_u64m8(const int bit_field27_26, const int bit_field11_7, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xv_se_u64m8(bit_field27_26, bit_field11_7, vs2, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvv.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvv.c
new file mode 100644
index 00000000000..32458c65a67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvv.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_xvv_se_u8mf8:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8mf8( const int bit_field27_26, vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8mf4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8mf4( const int bit_field27_26, vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8mf2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8mf2( const int bit_field27_26, vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8m1:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8m1( const int bit_field27_26, vuint8m1_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8m2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8m2( const int bit_field27_26, vuint8m2_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8m4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8m4( const int bit_field27_26, vuint8m4_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u8m8:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u8m8( const int bit_field27_26, vuint8m8_t vd, vuint8m8_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u8m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16mf4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16mf4( const int bit_field27_26, vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16mf2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16mf2( const int bit_field27_26, vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16m1:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16m1( const int bit_field27_26, vuint16m1_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16m2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16m2( const int bit_field27_26, vuint16m2_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16m4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16m4( const int bit_field27_26, vuint16m4_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u16m8:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u16m8( const int bit_field27_26, vuint16m8_t vd, vuint16m8_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u16m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u32mf2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u32mf2( const int bit_field27_26, vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u32m1:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u32m1( const int bit_field27_26, vuint32m1_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u32m2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u32m2( const int bit_field27_26, vuint32m2_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u32m4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u32m4( const int bit_field27_26, vuint32m4_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u32m8:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u32m8( const int bit_field27_26, vuint32m8_t vd, vuint32m8_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u32m8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u64m1:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u64m1( const int bit_field27_26, vuint64m1_t vd, vuint64m1_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u64m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u64m2:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u64m2( const int bit_field27_26, vuint64m2_t vd, vuint64m2_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u64m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u64m4:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u64m4( const int bit_field27_26, vuint64m4_t vd, vuint64m4_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u64m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvv_se_u64m8:
+** ...
+** sf\.vc\.xvv\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvv_se_u64m8( const int bit_field27_26, vuint64m8_t vd, vuint64m8_t vs2, uint64_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvv_se_u64m8(bit_field27_26, vd, vs2, xs1, vl);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvw.c b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvw.c
new file mode 100644
index 00000000000..41d83863208
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_xvw.c
@@ -0,0 +1,186 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_xsfvcp -mabi=lp64d -O3" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "riscv_vector.h"
+
+
+/*
+** test_sf_vc_xvw_se_u8mf8:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8mf8( const int bit_field27_26, vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8mf8(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u8mf4:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8mf4( const int bit_field27_26, vuint16mf2_t vd, vuint8mf4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u8mf2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8mf2( const int bit_field27_26, vuint16m1_t vd, vuint8mf2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u8m1:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8m1( const int bit_field27_26, vuint16m2_t vd, vuint8m1_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u8m2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8m2( const int bit_field27_26, vuint16m4_t vd, vuint8m2_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u8m4:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u8m4( const int bit_field27_26, vuint16m8_t vd, vuint8m4_t vs2, uint8_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u8m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u16mf4:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u16mf4( const int bit_field27_26, vuint32mf2_t vd, vuint16mf4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u16mf4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u16mf2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u16mf2( const int bit_field27_26, vuint32m1_t vd, vuint16mf2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u16mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u16m1:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u16m1( const int bit_field27_26, vuint32m2_t vd, vuint16m1_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u16m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u16m2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u16m2( const int bit_field27_26, vuint32m4_t vd, vuint16m2_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u16m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u16m4:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u16m4( const int bit_field27_26, vuint32m8_t vd, vuint16m4_t vs2, uint16_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u16m4(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u32mf2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u32mf2( const int bit_field27_26, vuint64m1_t vd, vuint32mf2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u32mf2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u32m1:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u32m1( const int bit_field27_26, vuint64m2_t vd, vuint32m1_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u32m1(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u32m2:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u32m2( const int bit_field27_26, vuint64m4_t vd, vuint32m2_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u32m2(bit_field27_26, vd, vs2, xs1, vl);
+}
+
+/*
+** test_sf_vc_xvw_se_u32m4:
+** ...
+** sf\.vc\.xvw\t[0-9]+,v[0-9]+,v[0-9]+,a[0-9]+
+** ...
+*/
+
+void test_sf_vc_xvw_se_u32m4( const int bit_field27_26, vuint64m8_t vd, vuint32m4_t vs2, uint32_t xs1, size_t vl)
+{
+    __riscv_sf_vc_xvw_se_u32m4(bit_field27_26, vd, vs2, xs1, vl);
+}