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lines changed- CHANGELOG.md+6
- README.md+2
- docs/attrs.adoc+1-1
- docs/datasheet/cpu.adoc+81-53
- docs/datasheet/cpu_csr.adoc+10-4
- docs/datasheet/cpu_dual_core.adoc+1-1
- docs/datasheet/on_chip_debugger.adoc+3-1
- docs/datasheet/overview.adoc+1
- docs/datasheet/rationale.adoc+1
- docs/datasheet/soc.adoc+83-42
- docs/datasheet/soc_dcache.adoc+12-20
- docs/datasheet/soc_gptmr.adoc+1-1
- docs/datasheet/soc_icache.adoc+12-20
- docs/datasheet/soc_neoled.adoc+2-2
- docs/datasheet/soc_onewire.adoc+2-2
- docs/datasheet/soc_pwm.adoc+1-1
- docs/datasheet/soc_slink.adoc+1-1
- docs/datasheet/soc_spi.adoc+6-6
- docs/datasheet/soc_twi.adoc+1-1
- docs/datasheet/soc_uart.adoc+15-15
- docs/datasheet/soc_wdt.adoc+5-15
- docs/datasheet/soc_xbus.adoc+34-44
- docs/datasheet/software.adoc+1
- docs/datasheet/software_bootloader.adoc+1
- docs/datasheet/software_rte.adoc+1
- docs/figures/bus_interface.png
- docs/figures/neorv32_processor.png
- docs/sources/bus_interface.json+6-3
- rtl/core/neorv32_bus.vhd+156-61
- rtl/core/neorv32_cache.vhd+350-736
- rtl/core/neorv32_cpu.vhd+28-21
- rtl/core/neorv32_cpu_control.vhd+46-21
- rtl/core/neorv32_cpu_icc.vhd+2-1
- rtl/core/neorv32_cpu_lsu.vhd+20-22
- rtl/core/neorv32_dma.vhd+2-3
- rtl/core/neorv32_fifo.vhd+17-10
- rtl/core/neorv32_gpio.vhd+1-1
- rtl/core/neorv32_neoled.vhd+3-2
- rtl/core/neorv32_onewire.vhd+4-2
- rtl/core/neorv32_package.vhd+16-15
- rtl/core/neorv32_sdi.vhd+4-2
- rtl/core/neorv32_slink.vhd+5-3
- rtl/core/neorv32_spi.vhd+5-3
- rtl/core/neorv32_sysinfo.vhd+1-1
- rtl/core/neorv32_top.vhd+126-89
- rtl/core/neorv32_trng.vhd+3-2
- rtl/core/neorv32_twd.vhd+4-2
- rtl/core/neorv32_twi.vhd+5-3
- rtl/core/neorv32_uart.vhd+32-25
- rtl/core/neorv32_wdt.vhd+8-24
- rtl/core/neorv32_xbus.vhd+5-1
- rtl/file_list_soc.f+1-1
- rtl/system_integration/neorv32_vivado_ip.tcl+80-63
- rtl/system_integration/neorv32_vivado_ip.vhd+13-11
- rtl/system_integration/xbus2ahblite_bridge.vhd+1-1
- sim/neorv32_tb.vhd+15-10
- sw/example/demo_dual_core/main.c+3-3
- sw/example/demo_dual_core/spinlock.c+8-3
- sw/example/demo_dual_core_icc/main.c+5-5
- sw/example/demo_wdt/main.c+3-3
- sw/example/processor_check/main.c+68-5
- sw/lib/include/neorv32_cpu.h+56-3
- sw/lib/include/neorv32_cpu_csr.h+3-3
- sw/lib/include/neorv32_wdt.h+5-11
- sw/lib/source/neorv32_aux.c+1
- sw/lib/source/neorv32_smp.c+3-5
- sw/lib/source/neorv32_wdt.c+1-5
- sw/svd/neorv32.svd+3-13
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