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patmos.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 9.1 Build 304 01/25/2010 Service Pack 1 SJ Full Version
# Date created = 10:48:18 May 10, 2010
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# DOC_top_DE2115_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE115F29C7
set_global_assignment -name TOP_LEVEL_ENTITY patmos_top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 11.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:05:10 MARCH 02, 2012"
set_global_assignment -name LAST_QUARTUS_VERSION 14.0
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS ON
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE adc_clk.stp
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
#============================================================
# CLOCK
#============================================================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_Y2 -to inclk0
set_location_assignment PIN_T8 -to oSRAM_A[19]
set_location_assignment PIN_AB8 -to oSRAM_A[18]
set_location_assignment PIN_AB9 -to oSRAM_A[17]
set_location_assignment PIN_AC11 -to oSRAM_A[16]
set_location_assignment PIN_AB11 -to oSRAM_A[15]
set_location_assignment PIN_AA4 -to oSRAM_A[14]
set_location_assignment PIN_AC3 -to oSRAM_A[13]
set_location_assignment PIN_AB4 -to oSRAM_A[12]
set_location_assignment PIN_AD3 -to oSRAM_A[11]
set_location_assignment PIN_AF2 -to oSRAM_A[10]
set_location_assignment PIN_T7 -to oSRAM_A[9]
set_location_assignment PIN_AF5 -to oSRAM_A[8]
set_location_assignment PIN_AC5 -to oSRAM_A[7]
set_location_assignment PIN_AB5 -to oSRAM_A[6]
set_location_assignment PIN_AE6 -to oSRAM_A[5]
set_location_assignment PIN_AB6 -to oSRAM_A[4]
set_location_assignment PIN_AC7 -to oSRAM_A[3]
set_location_assignment PIN_AE7 -to oSRAM_A[2]
set_location_assignment PIN_AD7 -to oSRAM_A[1]
set_location_assignment PIN_AB7 -to oSRAM_A[0]
set_location_assignment PIN_AD5 -to oSRAM_OE_N
set_location_assignment PIN_AE8 -to oSRAM_WE_N
set_location_assignment PIN_AF8 -to oSRAM_CE_N
set_location_assignment PIN_AD4 -to oSRAM_LB_N
set_location_assignment PIN_AC4 -to oSRAM_UB_N
set_location_assignment PIN_AG3 -to SRAM_DQ[15]
set_location_assignment PIN_AF3 -to SRAM_DQ[14]
set_location_assignment PIN_AE4 -to SRAM_DQ[13]
set_location_assignment PIN_AE3 -to SRAM_DQ[12]
set_location_assignment PIN_AE1 -to SRAM_DQ[11]
set_location_assignment PIN_AE2 -to SRAM_DQ[10]
set_location_assignment PIN_AD2 -to SRAM_DQ[9]
set_location_assignment PIN_AD1 -to SRAM_DQ[8]
set_location_assignment PIN_AF7 -to SRAM_DQ[7]
set_location_assignment PIN_AH6 -to SRAM_DQ[6]
set_location_assignment PIN_AG6 -to SRAM_DQ[5]
set_location_assignment PIN_AF6 -to SRAM_DQ[4]
set_location_assignment PIN_AH4 -to SRAM_DQ[3]
set_location_assignment PIN_AG4 -to SRAM_DQ[2]
set_location_assignment PIN_AF4 -to SRAM_DQ[1]
set_location_assignment PIN_AH3 -to SRAM_DQ[0]
set_location_assignment PIN_G12 -to iUartPins_rxd
set_location_assignment PIN_G9 -to oUartPins_txd
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
set_global_assignment -name SEED 6
set_global_assignment -name VERILOG_MACRO "SYNTHESIS=<None>"
#============================================================
# LED
#============================================================
# LEDR
set_location_assignment PIN_G19 -to LED[9]
set_location_assignment PIN_E19 -to LED[10]
set_location_assignment PIN_F19 -to LED[11]
set_location_assignment PIN_F21 -to LED[12]
set_location_assignment PIN_F18 -to LED[13]
set_location_assignment PIN_E18 -to LED[14]
set_location_assignment PIN_J19 -to LED[15]
set_location_assignment PIN_H19 -to LED[16]
set_location_assignment PIN_J17 -to LED[17]
set_location_assignment PIN_G17 -to LED[18]
set_location_assignment PIN_J15 -to LED[19]
set_location_assignment PIN_H16 -to LED[20]
set_location_assignment PIN_J16 -to LED[21]
set_location_assignment PIN_H17 -to LED[22]
set_location_assignment PIN_F15 -to LED[23]
set_location_assignment PIN_G15 -to LED[24]
set_location_assignment PIN_G16 -to LED[25]
set_location_assignment PIN_H15 -to LED[26]
#LEDG
set_location_assignment PIN_E21 -to LED[0]
set_location_assignment PIN_E22 -to LED[1]
set_location_assignment PIN_E25 -to LED[2]
set_location_assignment PIN_E24 -to LED[3]
set_location_assignment PIN_H21 -to LED[4]
set_location_assignment PIN_G20 -to LED[5]
set_location_assignment PIN_G22 -to LED[6]
set_location_assignment PIN_G21 -to LED[7]
set_location_assignment PIN_F17 -to LED[8]
#################################################
#################################################
#################################################
set_location_assignment PIN_G27 -to drive0_endat_RS485_Clk_Out
set_location_assignment PIN_G28 -to drive0_endat_RS485_Data_Input
set_location_assignment PIN_F27 -to drive0_endat_RS485_Data_Out
set_location_assignment PIN_F28 -to drive0_endat_RS485_Data_Enable
set_location_assignment PIN_F26 -to drive0_res_quad_hall[0]
set_location_assignment PIN_E26 -to drive0_res_quad_hall[1]
set_location_assignment PIN_G25 -to drive0_res_quad_hall[2]
set_location_assignment PIN_J27 -to drive0_resolver_feedback_clk
set_location_assignment PIN_C27 -to drive0_adc_Sync_Dat_U
set_location_assignment PIN_F25 -to drive0_adc_Sync_Dat_W
set_location_assignment PIN_D26 -to drive0_adc_Sync_Dat_ipow
set_location_assignment PIN_F24 -to drive0_pwm_u_h
set_location_assignment PIN_K25 -to drive0_pwm_u_l
set_location_assignment PIN_AF27 -to drive0_pwm_v_h
set_location_assignment PIN_H26 -to drive0_pwm_v_l
set_location_assignment PIN_AE28 -to drive0_pwm_w_h
set_location_assignment PIN_H25 -to drive0_pwm_w_l
set_location_assignment PIN_G26 -to drive0_sm_igbt_err
#set_location_assignment PIN_M27 -to drive1_endat_RS485_Clk_Out
#set_location_assignment PIN_M28 -to drive1_endat_RS485_Data_Input
#set_location_assignment PIN_K27 -to drive1_endat_RS485_Data_Out
#set_location_assignment PIN_K28 -to drive1_endat_RS485_Data_Enable
#set_location_assignment PIN_K22 -to drive1_res_quad_hall[0]
#set_location_assignment PIN_K21 -to drive1_res_quad_hall[1]
#set_location_assignment PIN_H24 -to drive1_res_quad_hall[2]
#set_location_assignment PIN_J28 -to drive1_resolver_feedback_clk
#set_location_assignment PIN_L24 -to drive1_adc_Sync_Dat_U
#set_location_assignment PIN_K26 -to drive1_adc_Sync_Dat_W
#set_location_assignment PIN_L23 -to drive1_adc_Sync_Dat_ipow
#set_location_assignment PIN_U25 -to drive1_pwm_u_h
#set_location_assignment PIN_R26 -to drive1_pwm_u_l
#set_location_assignment PIN_T26 -to drive1_pwm_v_h
#set_location_assignment PIN_R25 -to drive1_pwm_v_l
#set_location_assignment PIN_T25 -to drive1_pwm_w_h
#set_location_assignment PIN_M26 -to drive1_pwm_w_l
#set_location_assignment PIN_M25 -to drive1_sm_igbt_err
#
#set_location_assignment PIN_P27 -to drive2_endat_RS485_Clk_Out
#
#set_location_assignment PIN_G24 -to drive2_endat_RS485_Data_Input
#
#set_location_assignment PIN_G23 -to drive2_endat_RS485_Data_Out
#
#set_location_assignment PIN_H23 -to drive2_endat_RS485_Data_Enable
#
#
#set_location_assignment PIN_J26 -to drive2_res_quad_hall[0]
#set_location_assignment PIN_J25 -to drive2_res_quad_hall[1]
#
#set_location_assignment PIN_L28 -to drive2_res_quad_hall[2]
#set_location_assignment PIN_Y27 -to drive2_resolver_feedback_clk
#set_location_assignment PIN_J23 -to drive2_adc_Sync_Dat_U
#set_location_assignment PIN_P28 -to drive2_adc_Sync_Dat_W
#set_location_assignment PIN_J24 -to drive2_adc_Sync_Dat_ipow
#set_location_assignment PIN_V25 -to drive2_pwm_u_h
#set_location_assignment PIN_U27 -to drive2_pwm_u_l
#set_location_assignment PIN_V26 -to drive2_pwm_v_h
#set_location_assignment PIN_U28 -to drive2_pwm_v_l
#set_location_assignment PIN_L27 -to drive2_pwm_w_h
#set_location_assignment PIN_R27 -to drive2_pwm_w_l
#set_location_assignment PIN_R28 -to drive2_sm_igbt_err
#
#set_location_assignment PIN_U22 -to drive3_endat_RS485_Clk_Out
#set_location_assignment PIN_U26 -to drive3_endat_RS485_Data_Input
#set_location_assignment PIN_L21 -to drive3_endat_RS485_Data_Out
#set_location_assignment PIN_L22 -to drive3_endat_RS485_Data_Enable
#set_location_assignment PIN_P25 -to drive3_res_quad_hall[0]
#set_location_assignment PIN_N26 -to drive3_res_quad_hall[1]
#set_location_assignment PIN_N25 -to drive3_res_quad_hall[2]
#set_location_assignment PIN_Y28 -to drive3_resolver_feedback_clk
#set_location_assignment PIN_T22 -to drive3_adc_Sync_Dat_U
#set_location_assignment PIN_R23 -to drive3_adc_Sync_Dat_W
#set_location_assignment PIN_T21 -to drive3_adc_Sync_Dat_ipow
#set_location_assignment PIN_V28 -to drive3_pwm_u_h
#set_location_assignment PIN_R22 -to drive3_pwm_u_l
#set_location_assignment PIN_V27 -to drive3_pwm_v_h
#set_location_assignment PIN_R21 -to drive3_pwm_v_l
#set_location_assignment PIN_V22 -to drive3_pwm_w_h
#set_location_assignment PIN_P21 -to drive3_pwm_w_l
#set_location_assignment PIN_P26 -to drive3_sm_igbt_err
set_location_assignment PIN_D27 -to sys_braking
set_location_assignment PIN_E28 -to dc_link_Sync_Dat_VBUS
set_location_assignment PIN_E27 -to dc_link_Sync_Dat_ipow
set_location_assignment PIN_AD28 -to sys_adc_clk
set_location_assignment PIN_AH15 -to sys_adc_feedback_clk
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
set_location_assignment PIN_M23 -to button[0]
set_location_assignment PIN_M21 -to button[1]
set_location_assignment PIN_N21 -to button[2]
set_location_assignment PIN_R24 -to button[3]
# The following line contains VHDL source files that need compiling to specific library names not supported by Qsys.
# These assignments get removed automatically by Qsys, so have been added in a separate file to prevent this.
source encoder_filelist_DE2115.txt
set_location_assignment PIN_AE27 -to sys_pfc_ld_en
set_location_assignment PIN_AE26 -to sys_pfc_pfw
set_location_assignment PIN_D28 -to sys_pfc_en
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to inclk0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_WE_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[16]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[17]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[18]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_A[19]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_CE_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_LB_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_OE_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oSRAM_UB_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to oUartPins_txd
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SRAM_DQ[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to iUartPins_rxd
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|addrReg"
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|doutReg"
set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|doutEnaReg"
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|noeReg"
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|nweReg"
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|nlbReg"
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "Patmos:comp|SRamCtrl:ramCtrl|nubReg"
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[9]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[10]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[11]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[12]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[13]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[14]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[15]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[16]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[17]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[18]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[19]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[20]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[21]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[22]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[23]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[24]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[25]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[26]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[0]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[1]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[2]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[4]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[5]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[6]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[7]
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED[8]
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to Delta_Sigma_Clk_out
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to u_h
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to u_l
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to v_h
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to v_l
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to w_h
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to w_l
set_instance_assignment -name TCO_REQUIREMENT "2 ns" -to sclk
set_instance_assignment -name TCO_REQUIREMENT "8 ns" -to nras
set_instance_assignment -name TCO_REQUIREMENT "8 ns" -to ncas
set_instance_assignment -name TCO_REQUIREMENT "5 ns" -to nwe
set_instance_assignment -name TCO_REQUIREMENT "5 ns" -to noe
set_instance_assignment -name TCO_REQUIREMENT "8 ns" -to ncs
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to IU_Dat
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to IW_Clk
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to IW_Dat
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to VBUS_Dat
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to IU_Clk
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to Resolver_cosinus
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to Resolver_Ref
set_instance_assignment -name TCO_REQUIREMENT "10 ns" -to Resolver_Ref_not
set_instance_assignment -name TSU_REQUIREMENT "10 ns" -to Resolver_sinus
set_instance_assignment -name IO_STANDARD "2.5 V" -to button
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/biss_synth.vhd -library biss
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/biss_altera.vhd -library biss
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb_vcomponents.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mbz101.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb1.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mbz201.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb2.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb3.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mbz402.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb4.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb5.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb6.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb7.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb8.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb9.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mba.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mbb.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mbc.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/mb0.vhd -library mb
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/resource_pkg_enc.vhd -library endat22
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/resource_pkg_b_enc.vhd -library endat22
#set_global_assignment -name VHDL_FILE hardware/DOC_Multi_Axis4/synthesis/submodules/endat5_pkg_enc.vhd -library endat22
#set_global_assignment -name VERILOG_FILE DOC_top.v
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_adc_clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_adc_feedback_clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_pfc_pfw
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_pfc_ld_en
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_pfc_en
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_braking
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_sm_igbt_err
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_resolver_feedback_clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_res_quad_hall[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_res_quad_hall[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_res_quad_hall[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_w_l
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_w_h
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_v_l
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_v_h
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_u_l
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_pwm_u_h
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_adc_Sync_Dat_W
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_adc_Sync_Dat_U
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_adc_Sync_Dat_ipow
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to dc_link_Sync_Dat_VBUS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to dc_link_Sync_Dat_ipow
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to button[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to button[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to button[3]
set_location_assignment PIN_AG26 -to debug_sys_adc_clk
set_location_assignment PIN_AH26 -to debug_sys_adc_feedback_clk
set_location_assignment PIN_AE25 -to debug_ground
set_location_assignment PIN_AG23 -to debug_dc_link_Sync_Dat_VBUS
set_location_assignment PIN_AF26 -to debug_drive0_adc_Sync_Dat_U
set_location_assignment PIN_AE24 -to debug_drive0_adc_Sync_Dat_W
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_dc_link_Sync_Dat_VBUS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_drive0_adc_Sync_Dat_U
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_drive0_adc_Sync_Dat_W
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_ground
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_sys_adc_clk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_sys_adc_feedback_clk
set_location_assignment PIN_AD25 -to debug_irg
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to debug_irg
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_endat_RS485_Clk_Out
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_endat_RS485_Data_Enable
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_endat_RS485_Data_Input
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to drive0_endat_RS485_Data_Out
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS ON
set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/biss_synth.vhd -library biss
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/biss_altera.vhd -library biss
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb_vcomponents.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mbz101.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb1.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mbz201.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb2.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb3.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mbz402.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb4.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb5.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb6.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb7.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb8.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb9.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mba.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mbb.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mbc.vhd -library mb
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/submodules/mb0.vhd -library mb
set_global_assignment -name QIP_FILE hardware/altpll_patmos.qip
set_global_assignment -name VHDL_FILE hardware/cyc2_pll.vhd
set_global_assignment -name VERILOG_FILE build/Patmos.v
set_global_assignment -name VHDL_FILE "hardware/patmos_de2-115-mc.vhdl"
set_global_assignment -name SDC_FILE patmos.sdc
set_global_assignment -name SOURCE_FILE patmos.qsf
set_global_assignment -name VHDL_FILE hardware/DOC_Monitor/synthesis/DOC_Monitor.vhd -library DOC_Monitor
set_global_assignment -name QIP_FILE hardware/DOC_Monitor/synthesis/DOC_Monitor.qip
set_global_assignment -name VHDL_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/DOC_Axis_Periphs_patmos.vhd -library DOC_Axis_Periphs_patmos
set_global_assignment -name QIP_FILE hardware/DOC_Axis_Periphs_patmos/synthesis/DOC_Axis_Periphs_patmos.qip
#set_global_assignment -name VERILOG_FILE DEFINES_DE2115.v
set_global_assignment -name SOURCE_FILE db/patmos.cmp.rdb
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top