diff --git a/CHIPOS68.asm b/CHIPOSLO.asm
similarity index 92%
rename from CHIPOS68.asm
rename to CHIPOSLO.asm
index bcade9c..a82e238 100755
--- a/CHIPOS68.asm
+++ b/CHIPOSLO.asm
@@ -1,7 +1,8 @@
 ;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
-;                           C H I P O S
+;                         C H I P O S L O
 ;
 ;  COMPACT HEXADECIMAL INTERPRETIVE PROGRAMMING AND OPERATING SYSTEM
+;                       WITH LOGICAL OPERATORS
 ;
 ;     DREAM-6800 OPERATING SYSTEM WITH CHIP8 LANGUAGE INTERPRETER
 ;
@@ -23,7 +24,6 @@ IRQV    EQU     $0000       ; INTERRUPT VECTOR
 BEGA    EQU     $0002       ; BEGIN ADRS FOR LOAD/DUMP
 ENDA    EQU     $0004       ; ENDING ADRS FOR LOAD/DUMP
 ADRS    EQU     $0006       ; ADRS FOR GO AND MEMOD
-DDPAT   EQU     $0008       ; DIGIT PATTERN TEMP (5 BYTES)
 RND     EQU     $000D       ; RANDOM BYTE (SEED)
 N       EQU     $000E       ; TEMP
 ATEMP   EQU     $000F       ; TEMP
@@ -42,7 +42,6 @@ PSP     EQU     $0024       ; PSEUDO STACK-PTR
 I       EQU     $0026       ; CHIP8 MEMORY POINTER
 PIR     EQU     $0028       ; PSEUDO INST-REG
 VXLOC   EQU     $002A       ; POINTS TO VX
-RNDX    EQU     $002C       ; RANDOM POINTER
 VX      EQU     $002E       ; VARIABLE X (ALSO X-COORD)
 VY      EQU     $002F       ; VARIABLE Y (ALSO Y-COORD)
 ;
@@ -51,6 +50,12 @@ VY      EQU     $002F       ; VARIABLE Y (ALSO Y-COORD)
 VO      EQU     $0030
 VF      EQU     $003F
 ;
+; CHIPOSLO MODIFICATIONS
+VXTMP   EQU     $000A       ; VARIABLE X (ALSO X-COORD)
+ALUSUB  EQU     $0040       ; 8XYN SUBROUTINE TEMP (5 BYTES)
+RNDX    EQU     $0047       ; RANDOM POINTER
+DDPAT   EQU     $0050       ; DIGIT PATTERN TEMP (5 BYTES)
+;
 ; CHIP8 SUBROUTINE STACK
 ;
 STACK   EQU     $005F
@@ -87,6 +92,7 @@ FETCH:  LDX     PPC         ; POINT TO NEXT INSTR
         STAB    ZHI
         BSR     FINDV       ; EXTRACT VX ALSO
         STAB    VX          ; STASH VX
+        STAB    VXTMP       ; STASH VX FOR ALU
         STX     VXLOC       ; SAVE LOCATION OF VX
         LDAB    PIR+1       ; FIND Y
         TBA                 ; STASH KK
@@ -140,8 +146,6 @@ EXCALL: LDAB    PIR         ; GET INSTR REG
         BEQ     RETDO
         CMPA    #$E0
         BNE     RETMON      ; NOP, FETCH
-        NOP                 ; PADDING FOR FALLTHROUGH
-        NOP                 ; PADDING FOR FALLTHROUGH
 ;
         ORG     $C079
 ;
@@ -214,44 +218,63 @@ SKFK1:  CMPA    #$9E
 SKFNE:  CMPA    VX
         BNE     SKIP2
         RTS
-;
-; ARITHMETIC/LOGIC ROUTINES
-;
 LETVK:  ADDA    VX
         BRA     PUTVX
 RANDV:  BSR     RANDOM      ; GET RANDOM BYTE
         ANDA    PIR+1
         BRA     PUTVX
-
+;
+; ARITHMETIC/LOGIC ROUTINES
+; CONSTRUCTS A TEMPORARY SUBROUTINE IN RAM
+;
 LETVV:  TAB
-        LDAA    VX
-
+        LDAA    VY
         ANDB    #$0F        ; EXTRACT N
-        BNE     LETV1
-        LDAA    VY          ; VX=VY
-LETV1:  DECB
-        BNE     LETV2
-        ORAA    VY          ; VX=VX!VY (OR)
-LETV2:  DECB
-        BNE     LETV4
-        ANDA    VY          ; VX=VX.VY
-LETV4:  DECB
+        BEQ     PUTVX       ; 8XY0: VX=VY
+        LDX     #$0A39      ; (OP) VX / CLV, RTS
+        CMPB    #$05        ; 8XY5: VX=VX-VY, INVERTED CARRY
+        BNE     LETV7
+        LDAA    VX
+        LDX     #$2F7E      ; (OP) VY, JMP (INVC)
+LETV7:  CMPB    #$07        ; 8XY7: VX=VY-VX, INVERTED CARRY
+        BNE     LETVN
+        LDX     #$0A7E      ; (OP) VX, JMP (INVC)
+LETVN:  STX     ALUSUB+1    ; STASH CONSTRUCTED ROUTINE
+        LDX     #INVC
+        STX     ALUSUB+3    ; STASH ADDRESS TO INVC
+FINDOP: INX
         DECB
-        BNE     LETV5
-        CLR     VF          ; VF=0
-        ADDA    VY          ; VX=VX+VY
-        BCC     LETV5       ; RESULT < 256
-        INC     VF          ; VF=1(OVERFLOW)
-LETV5:  DECB
-        BNE     PUTVX
-        CLR     VF          ; VF=0
-        SUBA    VY          ; VX=VX-VY
-        BCS     PUTVX       ; VX<VY? (UNSIGNED)
-        INC     VF          ; NO PUT VF=l
+        BNE     FINDOP
+        LDAB    3,X         ; FIND OPCODE IN TABLE
+        STAB    ALUSUB      ; STASH OPCODE
+        CLR     VF          ; CLEAR VF
+        JSR     ALUSUB
+        ROL     VF          ; VF=CARRY
 PUTVX:  LDX     VXLOC       ; REPLACE VX
         STAA    0,X
         RTS
 ;
+; INVERT CARRY FLAG
+;
+INVC:   ROLB
+        INCB
+        RORB
+        RTS
+;
+; TABLE WITH ALU OPCODES FOR 8XYN INSTRS
+;
+JUMP8:  ORG     $C12B
+;
+;     ( FCB     $96         ; LDAA VY 8XY0, HANDLED ABOVE )
+        FCB     $9A         ; ORAA VY 8XY1
+        FCB     $94         ; ANDA VY 8XY2
+        FCB     $98         ; EORA VY 8XY3
+        FCB     $9B         ; ADDA VY 8XY4
+        FCB     $90         ; SUBA VY 8XY5
+        FCB     $44         ; ASLA    8XY6
+        FCB     $90         ; SUBA VX 8XY7
+;     ( FCB     $48         ; LSRA    8XYE, BYTE FOUND BELOW )
+;
 ; RANDOM BYTE GENERATOR
 ;
         ORG     $C132
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..93b656a
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,23 @@
+MIT License
+
+Copyright (c) 1978, Michael J. Bauer
+Copyright (c) 2020, Tobias V. Langhoff
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+
diff --git a/README.md b/README.md
index 3dadbe5..6d97a37 100644
--- a/README.md
+++ b/README.md
@@ -1,11 +1,39 @@
-Compact Hexadecimal Interpretive Programming and Operating System
+Compact Hexadecimal Interpretive Programming and Operating System with Logical Operators (CHIPOSLO)
 ========
 
-CHIPOS is the monitor program and operating system for Michael J. Bauer's 1979 DREAM 6800 computer.
+This is a version of the monitor program and operating system CHIPOS for [Michael J. Bauer's 1979 DREAM 6800 computer](http://www.mjbauer.biz/DREAM6800.htm), with added support for four CHIP-8 instructions that appeared in other CHIP-8 interpreters.
 
 It is designed to run from a 1K EPROM (like the 2708) mapped to memory addresses `C000`–`C3FF`.
 
-If you don't own a DREAM 6800 computer, see my emulator project [DRÖM](https://tobiasvl.github.com/drom) (work in progress) or [MAME](https://mamedev.org).
+Replacing CHIPOS with CHIPOSLO will allow you to run more of the original COSMAC VIP programs on your DREAM, or even more [modern CHIP-8 programs](https://johnearnest.github.io/chip8Archive/?sort=platform) written in the decades since.
+
+If you don't own a DREAM 6800 computer, see my emulator project [DRÖM](https://tobiasvl.github.com/drom) (work in progress) or [MAME](https://mamedev.org)..
+
+Features
+--------
+
+* 1024 bytes, fits on a 2708 EPROM (like CHIPOS)
+* Adds four new logical/arithmetic instructions to your DREAM 6800's CHIP-8 interpreter
+* Lets you run more programs and games from the vast, historical CHIP-8 software library
+* Almost completely compatible[*](#Compatibility_notes) with CHIPOS!
+
+Background
+----------
+
+CHIPOS was a monitor program and operating system for the 1979 microcomputer DREAM 6800, written by Michael J. Bauer. It came with an interpreter for the CHIP-8 language, which was originally created by RCA's Joe Weisbecker for the COSMAC VIP computer in 1977.
+
+Weisbecker's original CHIP-8 interpreter for the VIP supported four undocumented arithmetic/logic instructions:
+
+* `8XY3`: `VX = VX XOR VY`
+* `8XY6`: `VX = VY >> 1`
+* `8XY7`: `VX = VY - VX`
+* `8XYE`: `VX = VY << 1`
+
+(You can read more about why these instructions worked in [Laurence Scotford's disassembly of the VIP's CHIP-8 interpreter](http://laurencescotford.co.uk/?p=266).)
+
+These instructions were discovered around 1978 and detailed in the COSMAC VIP's newsletter, [VIPER issue #2](https://archive.org/details/viper_1_02/page/n2/mode/1up). Bauer was not aware of them, and the interpreter that came with its CHIPOS did not include them.
+
+Most CHIP-8 interpreters since, including CHIP-48 and SUPER-CHIP from 1990/1991, support these extra instructions (although they often introduced other incompatibilities with the original VIP implementation). Now they're finally available on the DREAM as well!
 
 Build instructions
 ------------------
@@ -13,10 +41,29 @@ Build instructions
 Assemble using [AS](http://john.ccac.rwth-aachen.de:8000/as/):
 
 ```
-as -cpu 6800 CHIPOS68.asm
-p2bin -l 0 CHIPOS68.p
+as -cpu 6800 CHIPOSLO.asm
+p2bin -l 0 CHIPOSLO.p
 ```
 
-The CHIPOS code in this repo is also available for download on [Michael J. Bauer's DREAM 6800 website](http://www.mjbauer.biz/DREAM6800.htm). Michael has stated to me in private correspondence that the code is in the public domain.
+The code is a modified version of the CHIPOS code available for download on [Michael J. Bauer's DREAM 6800 website](http://www.mjbauer.biz/DREAM6800.htm). Michael has said to me in private correspondence that the code is in the public domain.
+
+The commit history in this repository details the changes I've made (the initial commit contains the original CHIPOS code).
+
+Compatibility notes
+-------------------
+
+All of the subroutines in the "CHIPOS SUBROUTINES (& Calling Sequences)" manual are still located at the same addresses, so any programs that call them should hopefully still work.
+
+However, some of the scratchpad parameter addresses listed at the bottom have moved to compress some code. These are:
+
+* `0040`–`0045` are reserved as scratch (used to construct a temporary logic subroutine)
+* `DDPAT` has moved from `0008` to `0050` (in order to let `0A` pull double duty as temporary VX storage and the opcode for `CLV` as a no-op)
+* `RNDX` has moved from `002C` to `0047` (in order to let `RNDX+1` pull double duty as the opcode for `ASLA`)
+
+This might affect programs that do any of the following:
+
+* Use any memory in the range `0047` through `0055`
+* Initializes `RNDX` as optional input to the `RANDOM` subroutine at `C132`
+* Call `LETDSP` and expect the resulting hex digit to be output at `0008` rather than `0047`
 
-This version is a few (18) bytes smaller than the original CHIPOS, to make room for extra functionality. Therefore, it contains several origins to remain compatible with the addresses found in the document "CHIPOS SUBROUTINES (& Calling Sequences)" from Michael J. Bauer's website.
+I am not aware of any affected programs, but if you know of any, please [create an issue](https://github.com/tobiasvl/chiposlo/issues/new). I want CHIPOSLO to be as compatible as possible.