FSM coding styles in BSV

Wishbone/Bluespec Systemverilog Transactors

BlueSpec Verilog Syntax Highlighting for Notepad++

Learning Bluespec on an iCEBreaker FPGA

Ook!-interpreter in Bluespec System Verilog

Flame thrower is a on-chip network router written in bluespec system verilog

A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance

📚️ A repository for showcasing my knowledge of the BlueSpec programming language, and continuing to learn the language.

⌨️ The BlueSpec programming language IDE submodule for SNU Programming Tools (2D Mode)

To toy around with Bluespec-SystemVerilog and my Basys3 board

Implementação do protocolo TCP para a disciplina de Redes de Computadores da Universidade Federal de São Carlos - UFSCar

Low-cost modular acquisition and stimulation system for neuroscience

Bluespec System Verilog syntax highlighting for Notepad++

RISC-V cores based on Bluespec's Piccolo and Flute

Bluespec SystemVerilog implementation of the Keccak primitive (SHA-3)

Collection of projects using Verilog and Bluespec on the Spartan Edge Accelerator FPGA Board

Hardware implementation of Lightweight Cryptography candidates in Bluespec SystemVerilog.

北航高等计组实验

Bluespec SystemVerilog language definition for the LaTeX listings package

Repository for various experiments done during Aug'21 to Mar'21 related to Side-channel-analysis of Shakti's AES accelerators