A curated list of Computer Architecture and Systems resources
5-stage pipelined 32-bit MIPS microprocessor in Verilog
A collection of curated resources for learning Computer Science subjects and skills, that I garnered throughout my tenure as a CSE student. Contributions, and report of broken links are welcome.
Assignments from Gebze Technical University Computer Science Depertmant
All the homeworks, studies and projects I've done at Metu-CENG
A terminal-based emulator of the ARM instruction set written in Golang
My Second Brain for Computer Science related stuff. Zero bullshit, short and sweet.
tinyGPU: A Predicated-SIMD processor implementation in SystemVerilog
2025计算机考研专业课程408相关的复习经验，笔记，资源，真题
Design and documentation for a very simple 4-bit processor named NibbleBuddy and its assembler.
支持 45 条 MIPS 指令的单周期处理器 -- 计算机组成原理实验 NUAA Spring 2017
Pipelined MIPS CPU（course assignment for BUAA-Computer-Organization）
All the homeworks, testers and projects done at METU-CENG
My solutions for Bilkent University CS224 Computer Organization Labs (Spring 2019). Includes assembly programming assignments together with various processor designs in System Verilog HDL
A repository containing the source codes for the Digital Design and Computer Organization Laboratory course (UE18CS2) at PES University.
CSC403: Computer Organization and Architecture [COA] & CSL403: Processor Architecture Lab [PAL] <Semester IV>
HDU Computer Organization Course Design Beginner Guide - 杭电计组课设新手指南
Efficiently translating MIPS assembly language code to bit or coe code，and vice versa
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