ebaz4205.kicad_pro

{
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        "copper_text_italic": false,
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        "copper_text_upright": false,
        "courtyard_line_width": 0.049999999999999996,
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        "dimension_units": 3,
        "dimensions": {
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          "extension_offset": 500000,
          "keep_text_aligned": true,
          "suppress_zeroes": false,
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        "fab_line_width": 0.09999999999999999,
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        "fab_text_upright": false,
        "other_line_width": 0.09999999999999999,
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        "other_text_size_h": 1.0,
        "other_text_size_v": 1.0,
        "other_text_thickness": 0.15,
        "other_text_upright": false,
        "pads": {
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          "height": 1.524,
          "width": 1.524
        },
        "silk_line_width": 0.12,
        "silk_text_italic": false,
        "silk_text_size_h": 1.0,
        "silk_text_size_v": 1.0,
        "silk_text_thickness": 0.15,
        "silk_text_upright": false,
        "zones": {
          "45_degree_only": false,
          "min_clearance": 0.508
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      "diff_pair_dimensions": [],
      "drc_exclusions": [],
      "meta": {
        "version": 1
      },
      "rule_severities": {
        "annular_width": "error",
        "clearance": "error",
        "copper_edge_clearance": "error",
        "courtyards_overlap": "error",
        "diff_pair_gap_out_of_range": "error",
        "diff_pair_uncoupled_length_too_long": "error",
        "drill_out_of_range": "error",
        "duplicate_footprints": "warning",
        "extra_footprint": "warning",
        "hole_clearance": "error",
        "hole_near_hole": "error",
        "invalid_outline": "error",
        "item_on_disabled_layer": "error",
        "items_not_allowed": "error",
        "length_out_of_range": "error",
        "malformed_courtyard": "error",
        "microvia_drill_out_of_range": "error",
        "missing_courtyard": "ignore",
        "missing_footprint": "warning",
        "net_conflict": "warning",
        "npth_inside_courtyard": "ignore",
        "padstack": "error",
        "pth_inside_courtyard": "ignore",
        "shorting_items": "error",
        "silk_over_copper": "error",
        "silk_overlap": "error",
        "skew_out_of_range": "error",
        "too_many_vias": "error",
        "track_dangling": "warning",
        "track_width": "error",
        "tracks_crossing": "error",
        "unconnected_items": "error",
        "unresolved_variable": "error",
        "via_dangling": "warning",
        "zone_has_empty_net": "error",
        "zones_intersect": "error"
      },
      "rules": {
        "allow_blind_buried_vias": false,
        "allow_microvias": false,
        "max_error": 0.005,
        "min_clearance": 0.0,
        "min_copper_edge_clearance": 0.01,
        "min_hole_clearance": 0.0,
        "min_hole_to_hole": 0.25,
        "min_microvia_diameter": 0.19999999999999998,
        "min_microvia_drill": 0.09999999999999999,
        "min_silk_clearance": 0.0,
        "min_through_hole_diameter": 0.3,
        "min_track_width": 0.19999999999999998,
        "min_via_annular_width": 0.049999999999999996,
        "min_via_diameter": 0.39999999999999997,
        "solder_mask_clearance": 0.0,
        "solder_mask_min_width": 0.0,
        "solder_paste_clearance": 0.0,
        "solder_paste_margin_ratio": 0.0
      },
      "track_widths": [],
      "via_dimensions": [],
      "zones_allow_external_fillets": false,
      "zones_use_no_outline": true
    },
    "layer_presets": []
  },
  "boards": [],
  "cvpcb": {
    "equivalence_files": []
  },
  "erc": {
    "erc_exclusions": [],
    "meta": {
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    "rule_severities": {
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      "bus_label_syntax": "error",
      "bus_to_bus_conflict": "error",
      "bus_to_net_conflict": "error",
      "different_unit_footprint": "error",
      "different_unit_net": "error",
      "duplicate_reference": "error",
      "duplicate_sheet_names": "error",
      "extra_units": "error",
      "global_label_dangling": "warning",
      "hier_label_mismatch": "error",
      "label_dangling": "error",
      "lib_symbol_issues": "warning",
      "multiple_net_names": "error",
      "net_not_bus_member": "error",
      "no_connect_connected": "warning",
      "no_connect_dangling": "warning",
      "pin_not_connected": "error",
      "pin_not_driven": "error",
      "pin_to_pin": "error",
      "power_pin_not_driven": "error",
      "similar_labels": "error",
      "unannotated": "error",
      "unit_value_mismatch": "error",
      "unresolved_variable": "error",
      "wire_dangling": "error"
    }
  },
  "libraries": {
    "pinned_footprint_libs": [],
    "pinned_symbol_libs": []
  },
  "meta": {
    "filename": "ebaz4205.kicad_pro",
    "version": 1
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  "net_settings": {
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        "clearance": 0.199898,
        "diff_pair_gap": 0.249936,
        "diff_pair_via_gap": 0.25,
        "diff_pair_width": 0.199898,
        "line_style": 0,
        "microvia_diameter": 0.299974,
        "microvia_drill": 0.100076,
        "name": "Default",
        "pcb_color": "rgba(0, 0, 0, 0.000)",
        "schematic_color": "rgba(0, 0, 0, 0.000)",
        "track_width": 0.249936,
        "via_diameter": 0.8001,
        "via_drill": 0.40005,
        "wire_width": 6.0
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  "pcbnew": {
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      "idf": "",
      "netlist": "ebaz4205.net",
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      "step": "",
      "vrml": ""
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    "page_layout_descr_file": ""
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  "schematic": {
    "drawing": {
      "default_bus_thickness": 12.0,
      "default_junction_size": 36.0,
      "default_line_thickness": 6.0,
      "default_text_size": 50.0,
      "default_wire_thickness": 6.0,
      "field_names": [],
      "intersheets_ref_prefix": "",
      "intersheets_ref_short": false,
      "intersheets_ref_show": false,
      "intersheets_ref_suffix": "",
      "junction_size_choice": 3,
      "pin_symbol_size": 25.0,
      "text_offset_ratio": 0.3
    },
    "legacy_lib_dir": "",
    "legacy_lib_list": [],
    "meta": {
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    "net_format_name": "Pcbnew",
    "page_layout_descr_file": "/home/tpecar/fpga/git/nl2ksch/blank.kicad_wks",
    "plot_directory": "Plot-OP/",
    "spice_adjust_passive_values": false,
    "spice_external_command": "spice \"%I\"",
    "subpart_first_id": 65,
    "subpart_id_separator": 0
  },
  "sheets": [
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      "3ffd8c95-fcb8-4348-913d-aa766358d9cf",
      "PHY & Sundries"
    ],
    [
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      "Mem & Zynq Sheet"
    ],
    [
      "7371972a-f51d-443b-b695-d796796d7910",
      "Zynq_IO Sheet"
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    [
      "35c92051-32ee-444d-9071-09303a907e64",
      "Zynq Power Sheet"
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    [
      "1dedb3a4-1544-4eea-a6cf-6c065254caaf",
      "IO Sheet"
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    [
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      ""
    ]
  ],
  "text_variables": {}
}