From 1a11f77dff67bd844dbdabb79211fa8211171deb Mon Sep 17 00:00:00 2001 From: tsoutsman Date: Mon, 25 Sep 2023 06:37:39 +0000 Subject: [PATCH] aarch64: support FIQs and use them for TLB shootdown IPIs (#1039) * Add support for fast interrupts on aarch64, aka FIQs. FIQs are designed to be fast and can thus interrupt regular interrupts (IRQs) that are in the process of being handled. They are similar to NMIs on x86_64 in this regard, but can also be explicitly enabled/disabled. * Updated the GIC driver to support both Group 0 (FIQs) and Group 1 (IRQs). * `nano_core`, `captain`, and `ap_start` now enable/disable FIQs. * Broadcasting TLB shootdown IPIs now uses FIQs to ensure that TLB shootdowns occur instantly even if regular interrupts are disabled on one or more other CPUs. * Add a separate trait `Aarch64LocalInterruptController` for arch-specific features, which keeps the `LocalInterruptController` arch-agnostic. * This trait is primarily for configuring/handling fast interrupts (FIQs), but also for acknowledging interrupts, which x86_64 does not require. * The interrupt controller now allows enabling/disabling SPIs too. --------- Co-authored-by: Kevin Boos ac51fc175126cab7d4fd2723a8fc3bb222f546b0 --- doc/ap_start/fn.kstart_ap.html | 2 +- doc/ap_start/index.html | 2 +- doc/captain/fn.init.html | 2 +- doc/captain/index.html | 2 +- doc/first_application/fn.start.html | 2 +- doc/first_application/index.html | 2 +- doc/implementors/core/convert/trait.From.js | 2 +- .../core/future/future/trait.Future.js | 2 +- doc/implementors/core/hash/trait.Hash.js | 2 +- doc/implementors/core/marker/trait.Copy.js | 2 +- doc/implementors/zerocopy/trait.FromBytes.js | 2 +- doc/interrupt_controller/all.html | 2 +- doc/interrupt_controller/arch/index.html | 2 +- .../arch/struct.LocalInterruptController.html | 2 +- .../struct.SystemInterruptController.html | 6 +- doc/interrupt_controller/index.html | 4 +- doc/interrupt_controller/sidebar-items.js | 2 +- ...it.AArch64LocalInterruptControllerApi.html | 31 +++++ .../trait.LocalInterruptControllerApi.html | 21 +-- .../trait.SystemInterruptControllerApi.html | 6 +- doc/irq_safety/fn.disable_interrupts.html | 6 +- doc/irq_safety/fn.enable_interrupts.html | 6 +- doc/irq_safety/fn.hold_interrupts.html | 6 +- doc/irq_safety/fn.interrupts_enabled.html | 5 +- doc/irq_safety/index.html | 6 +- doc/irq_safety/struct.HeldInterrupts.html | 8 +- .../fn.configure_translation_registers.html | 2 +- doc/memory_aarch64/fn.disable_mmu.html | 2 +- doc/memory_aarch64/fn.enable_mmu.html | 2 +- .../fn.find_section_memory_bounds.html | 2 +- doc/memory_aarch64/fn.get_p4.html | 2 +- doc/memory_aarch64/fn.read_mmu_config.html | 2 +- .../fn.set_as_active_page_table_root.html | 2 +- .../fn.tlb_flush_by_theseus_asid.html | 2 +- .../fn.tlb_flush_virt_addr.html | 5 +- doc/memory_aarch64/index.html | 2 +- .../macro.asm_set_mmu_config_x2_x3.html | 2 +- .../struct.AggregatedSectionMemoryBounds.html | 4 +- doc/memory_aarch64/struct.MmuConfig.html | 2 +- .../struct.SectionMemoryBounds.html | 4 +- doc/nano_core/index.html | 2 +- doc/search-index.js | 6 +- doc/serial_port/struct.SerialPort.html | 14 +- doc/spawn/fn.cleanup_bootstrap_tasks.html | 2 +- doc/spawn/fn.init.html | 2 +- .../fn.new_application_task_builder.html | 2 +- doc/spawn/fn.new_task_builder.html | 2 +- doc/spawn/index.html | 2 +- doc/spawn/struct.BootstrapTaskRef.html | 6 +- doc/spawn/struct.TaskBuilder.html | 24 ++-- doc/src/ap_start/lib.rs.html | 6 + doc/src/captain/lib.rs.html | 2 + doc/src/first_application/lib.rs.html | 4 +- doc/src/interrupt_controller/lib.rs.html | 66 ++++++--- doc/src/interrupt_controller/x86_64.rs.html | 40 +----- doc/src/irq_safety/held_interrupts.rs.html | 126 +++++++++++++++--- doc/src/irq_safety/lib.rs.html | 2 +- doc/src/irq_safety/mutex_irqsafe.rs.html | 2 +- doc/src/irq_safety/rwlock_irqsafe.rs.html | 2 +- doc/src/memory_aarch64/lib.rs.html | 76 +++++++++-- doc/src/nano_core/lib.rs.html | 8 +- doc/src/spawn/lib.rs.html | 12 +- doc/src/tlb_shootdown/lib.rs.html | 18 ++- .../fn.handle_tlb_shootdown_ipi.html | 2 +- doc/tlb_shootdown/index.html | 2 +- doc/window_inner/struct.WindowInner.html | 4 +- 66 files changed, 417 insertions(+), 187 deletions(-) create mode 100644 doc/interrupt_controller/trait.AArch64LocalInterruptControllerApi.html diff --git a/doc/ap_start/fn.kstart_ap.html b/doc/ap_start/fn.kstart_ap.html index 7fdbae22d9..47bb05991b 100644 --- a/doc/ap_start/fn.kstart_ap.html +++ b/doc/ap_start/fn.kstart_ap.html @@ -1,4 +1,4 @@ -kstart_ap in ap_start - Rust

Function ap_start::kstart_ap

source · 
pub fn kstart_ap(
+kstart_ap in ap_start - Rust
Function ap_start::kstart_ap
source · 
pub fn kstart_ap(
     processor_id: u32,
     cpu_id: CpuId,
     _stack_start: VirtualAddress,
diff --git a/doc/ap_start/index.html b/doc/ap_start/index.html
index 7ccd782876..0e608aa676 100644
--- a/doc/ap_start/index.html
+++ b/doc/ap_start/index.html
@@ -1,4 +1,4 @@
-ap_start - Rust
Crate ap_start
source · 
Expand description
Routines for booting up secondary CPU cores, 
+ap_start - Rust
Crate ap_start
source · 
Expand description
Routines for booting up secondary CPU cores, 
 aka application processors (APs) on x86_64.

 
Statics

\ No newline at end of file
diff --git a/doc/irq_safety/fn.disable_interrupts.html b/doc/irq_safety/fn.disable_interrupts.html
index 0d926e7c76..dce5b1497c 100644
--- a/doc/irq_safety/fn.disable_interrupts.html
+++ b/doc/irq_safety/fn.disable_interrupts.html
@@ -1 +1,5 @@
-disable_interrupts in irq_safety - Rust
Function irq_safety::disable_interrupts
source · 
pub fn disable_interrupts()

\ No newline at end of file
+disable_interrupts in irq_safety - Rust
Function irq_safety::disable_interrupts
source · 
pub fn disable_interrupts()
Expand description
Unconditionally disables regular interrupts (IRQs),
+not NMIs or fast interrupts (FIQs on aarch64).

+
To disable fast interrupts (FIQs) on aarch64,
+use the [disable_fast_interrupts()] interrupts.

+

\ No newline at end of file
diff --git a/doc/irq_safety/fn.enable_interrupts.html b/doc/irq_safety/fn.enable_interrupts.html
index 7e7141d3bb..4013bb87fa 100644
--- a/doc/irq_safety/fn.enable_interrupts.html
+++ b/doc/irq_safety/fn.enable_interrupts.html
@@ -1 +1,5 @@
-enable_interrupts in irq_safety - Rust
Function irq_safety::enable_interrupts
source · 
pub fn enable_interrupts()

\ No newline at end of file
+enable_interrupts in irq_safety - Rust
Function irq_safety::enable_interrupts
source · 
pub fn enable_interrupts()
Expand description
Unconditionally enables regular interrupts (IRQs),
+not NMIs or fast interrupts (FIQs on aarch64).

+
To enable fast interrupts (FIQs) on aarch64,
+use the [enable_fast_interrupts()] interrupts.

+

\ No newline at end of file
diff --git a/doc/irq_safety/fn.hold_interrupts.html b/doc/irq_safety/fn.hold_interrupts.html
index 379cb4c1bd..9c59a6bde4 100644
--- a/doc/irq_safety/fn.hold_interrupts.html
+++ b/doc/irq_safety/fn.hold_interrupts.html
@@ -1,3 +1,5 @@
-hold_interrupts in irq_safety - Rust
Function irq_safety::hold_interrupts
source · 
pub fn hold_interrupts() -> HeldInterrupts
Expand description
Prevent interrupts from firing until the return value is dropped (goes out of scope).
-After it is dropped, the interrupts are returned to their prior state, not blindly re-enabled.

+hold_interrupts in irq_safety - Rust
Function irq_safety::hold_interrupts
source · 
pub fn hold_interrupts() -> HeldInterrupts
Expand description
Prevents regular interrupts from occurring until the returned
+HeldInterrupts object is dropped.

+
This function only affects regular IRQs;
+it does not affect NMIs or fast interrupts (FIQs on aarch64).

 

\ No newline at end of file
diff --git a/doc/irq_safety/fn.interrupts_enabled.html b/doc/irq_safety/fn.interrupts_enabled.html
index e8d0a3bb14..9c087c9df9 100644
--- a/doc/irq_safety/fn.interrupts_enabled.html
+++ b/doc/irq_safety/fn.interrupts_enabled.html
@@ -1 +1,4 @@
-interrupts_enabled in irq_safety - Rust
Function irq_safety::interrupts_enabled
source · 
pub fn interrupts_enabled() -> bool

\ No newline at end of file
+interrupts_enabled in irq_safety - Rust
Function irq_safety::interrupts_enabled
source · 
pub fn interrupts_enabled() -> bool
Expand description
Returns whether regular interrupts are enabled on the current CPU.

+
This only checks whether regular interrupts are enabled,
+not NMIs or fast interrupts (FIQs on aarch64).

+

\ No newline at end of file
diff --git a/doc/irq_safety/index.html b/doc/irq_safety/index.html
index 5196b28d75..7f8b2bba18 100644
--- a/doc/irq_safety/index.html
+++ b/doc/irq_safety/index.html
@@ -7,5 +7,7 @@
 
  • [ MutexIrqSafe] and [RwLockIrqSafe]: spinlock wrappers that use [spin::Mutex] and [spin::RwLock`] internally to auto-disable interrupts for the duration of 
 the lock being held.
    • 
 
-
    Structs
    Functions
    
\ No newline at end of file
+
    Structs
    Functions
    • disable_interrupts
      Unconditionally disables regular interrupts (IRQs),
+not NMIs or fast interrupts (FIQs on aarch64).
    • enable_interrupts
      Unconditionally enables regular interrupts (IRQs),
+not NMIs or fast interrupts (FIQs on aarch64).
    • hold_interrupts
      Prevents regular interrupts from occurring until the returned
+HeldInterrupts object is dropped.
    • interrupts_enabled
      Returns whether regular interrupts are enabled on the current CPU.
    
\ No newline at end of file
diff --git a/doc/irq_safety/struct.HeldInterrupts.html b/doc/irq_safety/struct.HeldInterrupts.html
index f7c407ef7a..2b7cac245a 100644
--- a/doc/irq_safety/struct.HeldInterrupts.html
+++ b/doc/irq_safety/struct.HeldInterrupts.html
@@ -1,5 +1,9 @@
-HeldInterrupts in irq_safety - Rust
    Struct irq_safety::HeldInterrupts
    source · 
    pub struct HeldInterrupts(_);
    Expand description
    A handle for frozen interrupts
    
-
    Trait Implementations§
    source§
    impl Default for HeldInterrupts
    source§
    fn default() -> HeldInterrupts
    Returns the “default value” for a type. Read more
    source§
    impl Drop for HeldInterrupts
    source§
    fn drop(&mut self)
    Executes the destructor for this type. Read more
    source§
    impl !Send for HeldInterrupts
    Auto Trait Implementations§
    Blanket Implementations§
    source§
    impl<T> Any for Twhere
+HeldInterrupts in irq_safety - Rust
    Struct irq_safety::HeldInterrupts
    source · 
    pub struct HeldInterrupts(_);
    Expand description
    A guard type for withholding regular interrupts on the current CPU.
    
+
    When dropped, interrupts are returned to their prior state rather than
+just blindly re-enabled. For example, if interrupts were enabled
+when hold_interrupts() was invoked, interrupts will be re-enabled
+when this type is dropped.
    
+
    Trait Implementations§
    source§
    impl Default for HeldInterrupts
    source§
    fn default() -> HeldInterrupts
    Returns the “default value” for a type. Read more
    source§
    impl Drop for HeldInterrupts
    source§
    fn drop(&mut self)
    Executes the destructor for this type. Read more
    source§
    impl !Send for HeldInterrupts
    Auto Trait Implementations§
    Blanket Implementations§
    source§
    impl<T> Any for Twhere
     T: 'static + ?Sized,
    source§
    fn type_id(&self) -> TypeId
    Gets the TypeId of self. Read more
    source§
    impl<T> Borrow<T> for Twhere
     T: ?Sized,
    source§
    fn borrow(&self) -> &T
    Immutably borrows from an owned value. Read more
    source§
    impl<T> BorrowMut<T> for Twhere
     T: ?Sized,
    source§
    fn borrow_mut(&mut self) -> &mut T
    Mutably borrows from an owned value. Read more
    source§
    impl<T> From<T> for T
    source§
    fn from(t: T) -> T
    Returns the argument unchanged.
    
diff --git a/doc/memory_aarch64/fn.configure_translation_registers.html b/doc/memory_aarch64/fn.configure_translation_registers.html
index 1bb9bd997f..8f960ef519 100644
--- a/doc/memory_aarch64/fn.configure_translation_registers.html
+++ b/doc/memory_aarch64/fn.configure_translation_registers.html
@@ -1,4 +1,4 @@
-configure_translation_registers in memory_aarch64 - Rust
    Function memory_aarch64::configure_translation_registers
    source · 
    pub fn configure_translation_registers()
    Expand description
    Configures paging for Theseus.
    
+configure_translation_registers in memory_aarch64 - Rust
    Function memory_aarch64::configure_translation_registers
    source · 
    pub fn configure_translation_registers()
    Expand description
    Configures paging for Theseus.
    
 
    Resulting Configuration
    
 
      
 
    • MAIR slot 0 is for cacheable normal DRAM
      • 
diff --git a/doc/memory_aarch64/fn.disable_mmu.html b/doc/memory_aarch64/fn.disable_mmu.html
index 01cdfe2bd9..fd5bab5469 100644
--- a/doc/memory_aarch64/fn.disable_mmu.html
+++ b/doc/memory_aarch64/fn.disable_mmu.html
@@ -1,4 +1,4 @@
-disable_mmu in memory_aarch64 - Rust
      Function memory_aarch64::disable_mmu
      source · 
      pub fn disable_mmu()
      Expand description
      Disable the MMU using aarch64 registers
      
+disable_mmu in memory_aarch64 - Rust
      Function memory_aarch64::disable_mmu
      source · 
      pub fn disable_mmu()
      Expand description
      Disable the MMU using aarch64 registers
      
 
      This uses the SCTLR_EL1 register.
      
 
      When the MMU is disabled, the CPU acts as
 if a full-address-space identity mapping
diff --git a/doc/memory_aarch64/fn.enable_mmu.html b/doc/memory_aarch64/fn.enable_mmu.html
index b32eeeef32..6db0dc09a7 100644
--- a/doc/memory_aarch64/fn.enable_mmu.html
+++ b/doc/memory_aarch64/fn.enable_mmu.html
@@ -1,4 +1,4 @@
-enable_mmu in memory_aarch64 - Rust
      Function memory_aarch64::enable_mmu
      source · 
      pub fn enable_mmu()
      Expand description
      Enable the MMU using aarch64 registers
      
+enable_mmu in memory_aarch64 - Rust
      Function memory_aarch64::enable_mmu
      source · 
      pub fn enable_mmu()
      Expand description
      Enable the MMU using aarch64 registers
      
 
      This uses the SCTLR_EL1 register.
      
 
      When the MMU is disabled, the CPU acts as
 if a full-address-space identity mapping
diff --git a/doc/memory_aarch64/fn.find_section_memory_bounds.html b/doc/memory_aarch64/fn.find_section_memory_bounds.html
index a1c7777abd..f637600bd5 100644
--- a/doc/memory_aarch64/fn.find_section_memory_bounds.html
+++ b/doc/memory_aarch64/fn.find_section_memory_bounds.html
@@ -1,4 +1,4 @@
-find_section_memory_bounds in memory_aarch64 - Rust
      Function memory_aarch64::find_section_memory_bounds
      source · 
      pub fn find_section_memory_bounds<F>(
+find_section_memory_bounds in memory_aarch64 - Rust
      Function memory_aarch64::find_section_memory_bounds
      source · 
      pub fn find_section_memory_bounds<F>(
     boot_info: &impl BootInformation,
     translate: F
 ) -> Result<(AggregatedSectionMemoryBounds, [Option<SectionMemoryBounds>; 32]), &'static str>where
diff --git a/doc/memory_aarch64/fn.get_p4.html b/doc/memory_aarch64/fn.get_p4.html
index 3247f91ae3..6745de1a7a 100644
--- a/doc/memory_aarch64/fn.get_p4.html
+++ b/doc/memory_aarch64/fn.get_p4.html
@@ -1,4 +1,4 @@
-get_p4 in memory_aarch64 - Rust
      Function memory_aarch64::get_p4
      source · 
      pub fn get_p4() -> PhysicalAddress
      Expand description
      Returns the current top-level page table address.
      
+get_p4 in memory_aarch64 - Rust
      Function memory_aarch64::get_p4
      source · 
      pub fn get_p4() -> PhysicalAddress
      Expand description
      Returns the current top-level page table address.
      
 
      We use TTBR0 in Theseus to store the
 top-level page table, so this function
 reads that register.
      
diff --git a/doc/memory_aarch64/fn.read_mmu_config.html b/doc/memory_aarch64/fn.read_mmu_config.html
index cbc7615a9e..04f74e6822 100644
--- a/doc/memory_aarch64/fn.read_mmu_config.html
+++ b/doc/memory_aarch64/fn.read_mmu_config.html
@@ -1,4 +1,4 @@
-read_mmu_config in memory_aarch64 - Rust
      Function memory_aarch64::read_mmu_config
      source · 
      pub fn read_mmu_config() -> MmuConfig
      Expand description
      Reads the current MMU configuration of the current CPU core,
+read_mmu_config in memory_aarch64 - Rust
      Function memory_aarch64::read_mmu_config
      source · 
      pub fn read_mmu_config() -> MmuConfig
      Expand description
      Reads the current MMU configuration of the current CPU core,
 including the following system registers:
      
 
-
      Fields§
      §init: SectionMemoryBounds§text: SectionMemoryBounds§rodata: SectionMemoryBounds§data: SectionMemoryBounds
      Trait Implementations§
      source§
      impl Debug for AggregatedSectionMemoryBounds
      source§
      fn fmt(&self, f: &mut Formatter<'_>) -> Result
      Formats the value using the given formatter. Read more
      Auto Trait Implementations§
      Blanket Implementations§
      source§
      impl<T> Any for Twhere
+
      Fields§
      §init: SectionMemoryBounds§text: SectionMemoryBounds§rodata: SectionMemoryBounds§data: SectionMemoryBounds
      Trait Implementations§
      source§
      impl Debug for AggregatedSectionMemoryBounds
      source§
      fn fmt(&self, f: &mut Formatter<'_>) -> Result
      Formats the value using the given formatter. Read more
      Auto Trait Implementations§
      Blanket Implementations§
      source§
      impl<T> Any for Twhere
     T: 'static + ?Sized,
      source§
      fn type_id(&self) -> TypeId
      Gets the TypeId of self. Read more
      source§
      impl<T> Borrow<T> for Twhere
     T: ?Sized,
      source§
      fn borrow(&self) -> &T
      Immutably borrows from an owned value. Read more
      source§
      impl<T> BorrowMut<T> for Twhere
     T: ?Sized,
      source§
      fn borrow_mut(&mut self) -> &mut T
      Mutably borrows from an owned value. Read more
      source§
      impl<T> From<T> for T
      source§
      fn from(t: T) -> T
      Returns the argument unchanged.
      
diff --git a/doc/memory_aarch64/struct.MmuConfig.html b/doc/memory_aarch64/struct.MmuConfig.html
index 0234299123..391cc5e536 100644
--- a/doc/memory_aarch64/struct.MmuConfig.html
+++ b/doc/memory_aarch64/struct.MmuConfig.html
@@ -1,4 +1,4 @@
-MmuConfig in memory_aarch64 - Rust
      Struct memory_aarch64::MmuConfig
      source · 
      #[repr(C)]
      pub struct MmuConfig { /* private fields */ }
      Expand description
      See read_mmu_config
      
+MmuConfig in memory_aarch64 - Rust
      Struct memory_aarch64::MmuConfig
      source · 
      #[repr(C)]
      pub struct MmuConfig { /* private fields */ }
      Expand description
      See read_mmu_config
      
 
      Auto Trait Implementations§
      Blanket Implementations§
      source§
      impl<T> Any for Twhere
     T: 'static + ?Sized,
      source§
      fn type_id(&self) -> TypeId
      Gets the TypeId of self. Read more
      source§
      impl<T> Borrow<T> for Twhere
     T: ?Sized,
      source§
      fn borrow(&self) -> &T
      Immutably borrows from an owned value. Read more
      source§
      impl<T> BorrowMut<T> for Twhere
diff --git a/doc/memory_aarch64/struct.SectionMemoryBounds.html b/doc/memory_aarch64/struct.SectionMemoryBounds.html
index 5cb64f2af9..37867c9b7e 100644
--- a/doc/memory_aarch64/struct.SectionMemoryBounds.html
+++ b/doc/memory_aarch64/struct.SectionMemoryBounds.html
@@ -1,4 +1,4 @@
-SectionMemoryBounds in memory_aarch64 - Rust
      Struct memory_aarch64::SectionMemoryBounds
      source · 
      pub struct SectionMemoryBounds {
+SectionMemoryBounds in memory_aarch64 - Rust
      Struct memory_aarch64::SectionMemoryBounds
      source · 
      pub struct SectionMemoryBounds {
     pub start: (VirtualAddress, PhysicalAddress),
     pub end: (VirtualAddress, PhysicalAddress),
     pub flags: PteFlags,
@@ -6,7 +6,7 @@
 
      Fields§
      §start: (VirtualAddress, PhysicalAddress)
      The starting virtual address and physical address.
      
 
      §end: (VirtualAddress, PhysicalAddress)
      The ending virtual address and physical address.
      
 
      §flags: PteFlags
      The page table entry flags that should be used for mapping this section.
      
-
      Trait Implementations§
      source§
      impl Debug for SectionMemoryBounds
      source§
      fn fmt(&self, f: &mut Formatter<'_>) -> Result
      Formats the value using the given formatter. Read more
      Auto Trait Implementations§
      Blanket Implementations§
      source§
      impl<T> Any for Twhere
+
      Trait Implementations§
      source§
      impl Debug for SectionMemoryBounds
      source§
      fn fmt(&self, f: &mut Formatter<'_>) -> Result
      Formats the value using the given formatter. Read more
      Auto Trait Implementations§
      Blanket Implementations§
      source§
      impl<T> Any for Twhere
     T: 'static + ?Sized,
      source§
      fn type_id(&self) -> TypeId
      Gets the TypeId of self. Read more
      source§
      impl<T> Borrow<T> for Twhere
     T: ?Sized,
      source§
      fn borrow(&self) -> &T
      Immutably borrows from an owned value. Read more
      source§
      impl<T> BorrowMut<T> for Twhere
     T: ?Sized,
      source§
      fn borrow_mut(&mut self) -> &mut T
      Mutably borrows from an owned value. Read more
      source§
      impl<T> From<T> for T
      source§
      fn from(t: T) -> T
      Returns the argument unchanged.
      
diff --git a/doc/nano_core/index.html b/doc/nano_core/index.html
index 3675dcda5a..c85fa108f2 100644
--- a/doc/nano_core/index.html
+++ b/doc/nano_core/index.html
@@ -1,4 +1,4 @@
-nano_core - Rust
      Crate nano_core
      source · 
      Expand description
      The aptly-named tiny crate containing the first OS code to run.
      
+nano_core - Rust
      Crate nano_core
      source · 
      Expand description
      The aptly-named tiny crate containing the first OS code to run.
      
 
      The nano_core is very simple, and only does the following things:
      
 
        
 
      1. Bootstraps the OS after the bootloader is finished, and initializes simple things like logging.
        2. 
diff --git a/doc/search-index.js b/doc/search-index.js
index f3d886e604..3e4526c113 100644
--- a/doc/search-index.js
+++ b/doc/search-index.js
@@ -68,12 +68,12 @@ var searchIndex = JSON.parse('{\
 "http_client":{"doc":"Functions for creating and sending HTTP requests and …","t":"DGDLLLLLLLFLLLMLLLLMMLMLLLLLLLL","n":["HttpClient","HttpRequest","HttpResponse","abort","as_result","as_result_err_str","borrow","borrow","borrow_mut","borrow_mut","check_http_request","from","from","header_bytes","header_length","into","into","is_closed","new","packet","reason","send","status_code","try_from","try_from","try_into","try_into","type_id","type_id","vzip","vzip"],"q":[[0,"http_client"]],"d":["","TODO: create a proper HttpRequest type with header …","An HttpResponse that has been fully received from a remote …","Aborts the connection.","Returns the content of this HttpResponse as a Result, in …","A convenience function that just returns a standard Err …","","","","","Checks to see if the provided HTTP request can be properly …","Returns the argument unchanged.","Returns the argument unchanged.","","The length of all headers","Calls U::from(self).","Calls U::from(self).","Returns whether the connection used by the client is …","Creates a new HTTP client connected to the given remote …","The actual array of raw bytes received from the server, …","The reason, e.g., “OK”, “File not found”","Sends an HTTP request with an optional timeout.","The status code, e.g., 200, 404","","","","","","","",""],"i":[0,0,0,1,2,2,2,1,2,1,0,2,1,2,2,2,1,1,1,2,2,1,2,2,1,2,1,2,1,2,1],"f":[0,0,0,[1],[2,[[5,[[4,[3]]]]]],[2,[[5,[[4,[3]],6]]]],[[]],[[]],[[]],[[]],[[[4,[3]]],7],[[]],[[]],[2,[[4,[3]]]],0,[[]],[[]],[1,7],[[[9,[8]],10,11],[[5,[1,6]]]],0,0,[[1,12,[14,[13]]],[[5,[2,6]]]],0,[[],5],[[],5],[[],5],[[],5],[[],15],[[],15],[[]],[[]]],"c":[],"p":[[3,"HttpClient"],[3,"HttpResponse"],[15,"u8"],[15,"slice"],[4,"Result"],[15,"str"],[15,"bool"],[3,"NetworkInterface"],[3,"Arc"],[15,"u16"],[3,"Endpoint"],[6,"HttpRequest"],[3,"Duration"],[4,"Option"],[3,"TypeId"]]},\
 "idle":{"doc":"CPU idle management.","t":"DLLLMMLLFLMMMLLL","n":["IdleState","borrow","borrow_mut","clone","eax","exit_latency","fmt","from","idle_states","into","name","target_residency","tlb_flushed","try_from","try_into","type_id"],"q":[[0,"idle"]],"d":["A CPU idle state.","","","","The value of EAX when calling MWAIT to enter the idle …","The amount of time it takes for the CPU to exit the idle …","","Returns the argument unchanged.","","Calls U::from(self).","The name of the idle state.","The amount of time the CPU must spend in the idle state to …","Whether entering the state flushes the TLB.","","",""],"i":[0,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1],"f":[0,[[]],[[]],[1,1],0,0,[[1,2],3],[[]],[[],[[5,[[4,[1]]]]]],[[]],0,0,0,[[],6],[[],6],[[],7]],"c":[],"p":[[3,"IdleState"],[3,"Formatter"],[6,"Result"],[15,"slice"],[4,"Option"],[4,"Result"],[3,"TypeId"]]},\
 "intel_ethernet":{"doc":"Definitions of descriptor types and type aliases for NIC …","t":"ADDDDRRIRRRRRRRRRRRILLLLLLLLMMMMMMKLLMKLLMLLLLLLLLLLLLLLLLLLLMKKLLLLLLLLKLLMMMMMMMKLLKLLKLLMMLLLLLLLLLLLLMMKLL","n":["descriptors","AdvancedRxDescriptor","AdvancedTxDescriptor","LegacyRxDescriptor","LegacyTxDescriptor","RX_STATUS_DD","RX_STATUS_EOP","RxDescriptor","TX_CMD_DEXT","TX_CMD_EOP","TX_CMD_IC","TX_CMD_IDE","TX_CMD_IFCS","TX_CMD_RPS","TX_CMD_RS","TX_CMD_VLE","TX_DTYP_ADV","TX_PAYLEN_SHIFT","TX_STATUS_DD","TxDescriptor","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","checksum","cmd","cso","css","data_len","dcmd","descriptor_done","descriptor_done","descriptor_done","dtyp_mac_rsv","end_of_packet","end_of_packet","end_of_packet","errors","fmt","fmt","fmt","fmt","from","from","from","from","get_ext_error","get_ext_status","get_fdf_id","get_hdr_len","get_packet_type","get_pkt_len","get_rsccnt","get_rss_hash","get_rss_type","get_sph","get_vlan_tag","header_buffer_address","init","init","init","init","init","init","into","into","into","into","length","length","length","length","length","packet_buffer_address","packet_buffer_address","paylen_popts_cc_idx_sta","phys_addr","phys_addr","reset_status","reset_status","reset_status","send","send","send","set_packet_address","set_packet_address","set_packet_address","status","status","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","vlan","vlan","wait_for_packet_tx","wait_for_packet_tx","wait_for_packet_tx"],"q":[[0,"intel_ethernet"],[1,"intel_ethernet::descriptors"]],"d":["The different descriptor types used by Intel NICs. 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We …","","","Updates the descriptor’s physical address.","","","Status bits","Status bits which tell if the descriptor has been used","","","","","","","","","","","","","Vlan tags ","Vlan tags","Polls the Descriptor Done bit until the packet has been …","",""],"i":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,4,2,3,7,4,2,3,7,2,4,4,4,7,7,13,2,3,7,13,2,3,2,4,2,3,7,4,2,3,7,3,3,3,3,3,3,3,3,3,3,3,3,13,14,4,2,3,7,4,2,3,7,13,2,3,4,2,3,7,7,4,2,13,2,3,14,4,7,13,2,3,4,2,4,2,3,7,4,2,3,7,4,2,3,7,4,2,14,4,7],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],0,0,0,0,0,0,[[],1],[2,1],[3,1],0,[[],1],[2,1],[3,1],0,[[4,5],6],[[2,5],6],[[3,5],6],[[7,5],6],[[]],[[]],[[]],[[]],[3,8],[3,8],[3,8],[3,8],[3,8],[3,8],[3,8],[3,8],[3,8],[3,1],[3,8],0,[9],[[]],[4],[[2,9]],[[3,9]],[7],[[]],[[]],[[]],[[]],[[],8],[2,8],[3,8],0,0,0,0,0,0,0,[[]],[2],[3],[[9,10]],[[4,9,10]],[[7,9,10]],[9],[[2,9]],[[3,9]],0,0,[[],11],[[],11],[[],11],[[],11],[[],11],[[],11],[[],11],[[],11],[[],12],[[],12],[[],12],[[],12],0,0,[[]],[4],[7]],"c":[],"p":[[15,"bool"],[3,"LegacyRxDescriptor"],[3,"AdvancedRxDescriptor"],[3,"LegacyTxDescriptor"],[3,"Formatter"],[6,"Result"],[3,"AdvancedTxDescriptor"],[15,"u64"],[3,"PhysicalAddress"],[15,"u16"],[4,"Result"],[3,"TypeId"],[8,"RxDescriptor"],[8,"TxDescriptor"]]},\
-"interrupt_controller":{"doc":"","t":"NEGCICCNCICCKALLLLKKLLKKKKKKKCKLKKKKKLLLLKDDDDDDLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLFLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL","n":["AllOtherCpus","InterruptDestination","InterruptNumber","LocalInterruptController","LocalInterruptControllerApi","LocalInterruptControllerId","Priority","SpecificCpu","SystemInterruptController","SystemInterruptControllerApi","SystemInterruptControllerId","SystemInterruptControllerVersion","acknowledge_interrupt","arch","borrow","borrow_mut","clone","clone_into","enable_local_interrupt","end_of_interrupt","fmt","from","get","get","get_destination","get_local_interrupt_priority","get_minimum_priority","id","id","init","init_secondary_cpu_interface","into","is_local_interrupt_enabled","send_ipi","set_destination","set_local_interrupt_priority","set_minimum_priority","to_owned","try_from","try_into","type_id","version","LocalInterruptController","LocalInterruptControllerId","Priority","SystemInterruptController","SystemInterruptControllerId","SystemInterruptControllerVersion","acknowledge_interrupt","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone","clone","clone","clone_into","clone_into","clone_into","clone_into","enable_local_interrupt","end_of_interrupt","fmt","fmt","fmt","fmt","from","from","from","from","from","from","get","get","get_destination","get_local_interrupt_priority","get_minimum_priority","id","id","init","init_secondary_cpu_interface","into","into","into","into","into","into","is_local_interrupt_enabled","send_ipi","set_destination","set_local_interrupt_priority","set_minimum_priority","to_owned","to_owned","to_owned","to_owned","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","type_id","type_id","version"],"q":[[0,"interrupt_controller"],[42,"interrupt_controller::arch"]],"d":["","The Cpu where this interrupt should be handled, as well as …","","","","","","","","","","","Aarch64-specific way to read the current pending interrupt …","","","","","","","Tell the interrupt controller that the current interrupt …","","Returns the argument unchanged.","","","","","Reads the minimum priority for an interrupt to reach this …","","","","Aarch64-specific way to initialize the secondary CPU …","Calls U::from(self).","","Sends an inter-processor interrupt.","","","Changes the minimum priority for an interrupt to reach …","","","","","","Struct representing per-cpu-core interrupt controller …","","","Structure representing a top-level/system-wide interrupt …","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","","","","","","","Initializes the interrupt controller (not yet used on x86)","","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","","","","","","","","","","","","","","","","","","","","","","","","","","","",""],"i":[1,0,0,0,0,0,0,1,0,0,0,0,16,0,1,1,1,1,16,16,1,1,17,16,17,16,16,17,16,0,16,1,16,16,17,16,16,1,1,1,1,17,0,0,0,0,0,0,14,15,14,13,9,10,8,15,14,13,9,10,8,13,9,10,8,13,9,10,8,14,14,13,9,10,8,15,14,13,9,10,8,15,14,15,14,14,15,14,0,14,15,14,13,9,10,8,14,14,15,14,14,13,9,10,8,15,14,13,9,10,8,15,14,13,9,10,8,15,14,13,9,10,8,15],"f":[0,0,0,0,0,0,0,0,0,0,0,0,[[]],0,[[]],[[]],[1,1],[[]],[[2,3]],[2],[[1,4],5],[[]],[[]],[[]],[2,[[7,[6]]]],[2,8],[[],8],[[],9],[[],10],0,[[]],[[]],[2,3],[[2,1]],[[2,11,8],[[7,[6]]]],[[2,8]],[8],[[]],[[],7],[[],7],[[],12],[[],13],0,0,0,0,0,0,[14],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[13,13],[9,9],[10,10],[8,8],[[]],[[]],[[]],[[]],[[14,2,3]],[[14,2]],[[13,4],5],[[9,4],5],[[10,4],5],[[8,4],5],[[]],[[]],[[]],[[]],[[]],[[]],[[],15],[[],14],[[15,2],[[7,[6]]]],[[14,2],8],[14,8],[15,9],[14,10],[[],[[7,[6]]]],[14],[[]],[[]],[[]],[[]],[[]],[[]],[[14,2],3],[[14,2,1]],[[15,2,11,8],[[7,[6]]]],[[14,2,8]],[[14,8]],[[]],[[]],[[]],[[]],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],7],[[],12],[[],12],[[],12],[[],12],[[],12],[[],12],[15,13]],"c":[],"p":[[4,"InterruptDestination"],[6,"InterruptNumber"],[15,"bool"],[3,"Formatter"],[6,"Result"],[15,"str"],[4,"Result"],[3,"Priority"],[3,"SystemInterruptControllerId"],[3,"LocalInterruptControllerId"],[3,"CpuId"],[3,"TypeId"],[3,"SystemInterruptControllerVersion"],[3,"LocalInterruptController"],[3,"SystemInterruptController"],[8,"LocalInterruptControllerApi"],[8,"SystemInterruptControllerApi"]]},\
+"interrupt_controller":{"doc":"","t":"INEGCICCNCICCKKALLLLKKKKLLKKKKKKKCKLKKKKKKLLLLKDDDDDDLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLFLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL","n":["AArch64LocalInterruptControllerApi","AllOtherCpus","InterruptDestination","InterruptNumber","LocalInterruptController","LocalInterruptControllerApi","LocalInterruptControllerId","Priority","SpecificCpu","SystemInterruptController","SystemInterruptControllerApi","SystemInterruptControllerId","SystemInterruptControllerVersion","acknowledge_fast_interrupt","acknowledge_interrupt","arch","borrow","borrow_mut","clone","clone_into","enable_fast_local_interrupt","enable_local_interrupt","end_of_fast_interrupt","end_of_interrupt","fmt","from","get","get","get_destination","get_local_interrupt_priority","get_minimum_priority","id","id","init","init_secondary_cpu_interface","into","is_local_interrupt_enabled","send_fast_ipi","send_ipi","set_destination","set_local_interrupt_priority","set_minimum_priority","to_owned","try_from","try_into","type_id","version","LocalInterruptController","LocalInterruptControllerId","Priority","SystemInterruptController","SystemInterruptControllerId","SystemInterruptControllerVersion","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone","clone","clone","clone_into","clone_into","clone_into","clone_into","enable_local_interrupt","end_of_interrupt","fmt","fmt","fmt","fmt","from","from","from","from","from","from","get","get","get_destination","get_local_interrupt_priority","id","id","init","into","into","into","into","into","into","is_local_interrupt_enabled","send_ipi","set_destination","set_local_interrupt_priority","to_owned","to_owned","to_owned","to_owned","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","type_id","type_id","version"],"q":[[0,"interrupt_controller"],[47,"interrupt_controller::arch"]],"d":["AArch64-specific methods of a local interrupt controller","","The Cpu where this interrupt should be handled, as well as …","","","","","","","","","","","Same as Self::acknowledge_interrupt but for fast …","Aarch64-specific way to read the current pending interrupt …","","","","","","Same as LocalInterruptControllerApi::enable_local_interrupt…","","Same as LocalInterruptControllerApi::end_of_interrupt but …","Tell the interrupt controller that the current interrupt …","","Returns the argument unchanged.","","","","","Reads the minimum priority for an interrupt to reach this …","","","","Aarch64-specific way to initialize the secondary CPU …","Calls U::from(self).","","Same as LocalInterruptControllerApi::send_ipi but for fast …","Sends an inter-processor interrupt.","","","Changes the minimum priority for an interrupt to reach …","","","","","","Struct representing per-cpu-core interrupt controller …","","","Structure representing a top-level/system-wide interrupt …","","","","","","","","","","","","","","","","","","","","","","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","","","","","","Initializes the interrupt controller (not yet used on x86)","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","","","","","","","","","","","","","","","","","","","","","","","","","","",""],"i":[0,2,0,0,0,0,0,0,2,0,0,0,0,17,17,0,2,2,2,2,17,18,17,18,2,2,19,18,19,18,17,19,18,0,17,2,18,17,18,19,18,17,2,2,2,2,19,0,0,0,0,0,0,16,15,14,10,11,9,16,15,14,10,11,9,14,10,11,9,14,10,11,9,15,15,14,10,11,9,16,15,14,10,11,9,16,15,16,15,16,15,0,16,15,14,10,11,9,15,15,16,15,14,10,11,9,16,15,14,10,11,9,16,15,14,10,11,9,16,15,14,10,11,9,16],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,[[],1],[[],1],0,[[]],[[]],[2,2],[[]],[[3,4]],[[3,4]],[3],[3],[[2,5],6],[[]],[[]],[[]],[3,[[8,[7]]]],[3,9],[[],9],[[],10],[[],11],0,[[]],[[]],[3,4],[[3,2]],[[3,2]],[[3,[1,[12]],9],[[8,[7]]]],[[3,9]],[9],[[]],[[],8],[[],8],[[],13],[[],14],0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[14,14],[10,10],[11,11],[9,9],[[]],[[]],[[]],[[]],[[15,3,4]],[[15,3]],[[14,5],6],[[10,5],6],[[11,5],6],[[9,5],6],[[]],[[]],[[]],[[]],[[]],[[]],[[],16],[[],15],[[16,3],[[8,[7]]]],[[15,3],9],[16,10],[15,11],[[],[[8,[7]]]],[[]],[[]],[[]],[[]],[[]],[[]],[[15,3],4],[[15,3,2]],[[16,3,[1,[12]],9],[[8,[7]]]],[[15,3,9]],[[]],[[]],[[]],[[]],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],8],[[],13],[[],13],[[],13],[[],13],[[],13],[[],13],[16,14]],"c":[],"p":[[4,"Option"],[4,"InterruptDestination"],[6,"InterruptNumber"],[15,"bool"],[3,"Formatter"],[6,"Result"],[15,"str"],[4,"Result"],[3,"Priority"],[3,"SystemInterruptControllerId"],[3,"LocalInterruptControllerId"],[3,"CpuId"],[3,"TypeId"],[3,"SystemInterruptControllerVersion"],[3,"LocalInterruptController"],[3,"SystemInterruptController"],[8,"AArch64LocalInterruptControllerApi"],[8,"LocalInterruptControllerApi"],[8,"SystemInterruptControllerApi"]]},\
 "interrupts":{"doc":"Basic interrupt handling structures and simple handler …","t":"RENNHRGGDLLLLLLFFLLLLLFFOOLLFFFLLLLLL","n":["CPU_LOCAL_TIMER_IRQ","EoiBehaviour","HandlerDidNotSendEoi","HandlerSentEoi","IDT","IRQ_BASE_OFFSET","InterruptHandler","InterruptNumber","InterruptStackFrame","as_mut","borrow","borrow","borrow_mut","borrow_mut","deref","deregister_interrupt","eoi","eq","fmt","fmt","from","from","init","init_ap","interrupt_handler","interrupt_handler","into","into","is_exception_handler_with_error_code","register_interrupt","register_msi_interrupt","try_from","try_from","try_into","try_into","type_id","type_id"],"q":[[0,"interrupts"]],"d":["The IRQ number reserved for CPU-local timer interrupts, …","","The interrupt handler hasn’t called the eoi function, in …","The interrupt handler has called the eoi function.","The single system-wide Interrupt Descriptor Table (IDT).","The offset added to the first IRQ: 0x20.","A handler function for an interrupt or an exception …","","Wrapper type for the interrupt stack frame pushed by the …","Gives mutable access to the contents of the interrupt …","","","","","","Deregisters an interrupt handler, making it available to …","Send an end of interrupt signal, notifying the interrupt …","","","","Returns the argument unchanged.","Returns the argument unchanged.","Initializes the interrupt subsystem and sets up an initial …","Similar to init(), but for APs to call after the BSP has …","Macro which helps writing cross-platform interrupt …","Macro which helps writing cross-platform interrupt …","Calls U::from(self).","Calls U::from(self).","Returns true if the given address is the exception handler …","Registers an interrupt handler at the given IRQ interrupt …","Allocates and returns an unused interrupt number and sets …","","","","","",""],"i":[0,0,10,10,0,0,0,0,0,1,10,1,10,1,1,0,0,10,10,1,10,1,0,0,0,0,10,1,0,0,0,10,1,10,1,10,1],"f":[0,0,0,0,0,0,0,0,0,[1,[[4,[2,3]]]],[[]],[[]],[[]],[[]],[1],[[5,6],[[8,[7]]]],[[[9,[5]]]],[[10,10],11],[[10,12],13],[[1,12],[[8,[14]]]],[[]],[[]],[[15,15],[[8,[16,7]]]],[[17,15,15],[[8,[16,7]]]],0,0,[[]],[[]],[18,11],[[5,6],[[8,[19]]]],[6,[[8,[5,7]]]],[[],8],[[],8],[[],8],[[],8],[[],20],[[],20]],"c":[],"p":[[3,"InterruptStackFrame"],[3,"InterruptStackFrameValue"],[3,"ReadWrite"],[3,"Volatile"],[15,"u8"],[6,"InterruptHandler"],[15,"str"],[4,"Result"],[4,"Option"],[4,"EoiBehaviour"],[15,"bool"],[3,"Formatter"],[6,"Result"],[3,"Error"],[3,"VirtualAddress"],[3,"LockedIdt"],[3,"CpuId"],[15,"u64"],[15,"usize"],[3,"TypeId"]]},\
 "io":{"doc":"Traits and types for expressing I/O transfers of both …","t":"DIIIIDDIDNEIDNDDNDMKLLLLLLLFLLLLLLLLLLLLLLLLLLMMLLLLLKKLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLKLLLLLLLLLLLLLLKLLLLLLKLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLKLLLLLLKLLLLLLLL","n":["BlockByteTransfer","BlockIo","BlockReader","BlockWriter","ByteReader","ByteReaderWrapper","ByteReaderWriterWrapper","ByteWriter","ByteWriterWrapper","InvalidInput","IoError","KnownLength","LockableIo","Other","Reader","ReaderWriter","TimedOut","Writer","block_range","block_size","block_size","block_size","block_size","block_size","block_size","block_size","block_size","blocks_from_bytes","borrow","borrow","borrow","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","byte_range_absolute","bytes_in_block_range","clone","clone_into","deref","deref","deref_mut","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","flush","fmt","fmt","fmt","from","from","from","from","from","from","from","from","from","from","from","from","from","from","from","from","from","from","into","into","into","into","into","into","into","into","into","len","len","len","len","len","len","len","len","new","new","new","read","read","read","read","read_at","read_at","read_at","read_at","read_at","read_at","read_at","read_blocks","read_blocks","read_blocks","read_blocks","read_blocks","read_blocks","read_blocks","seek","seek","seek","seek","seek","to_owned","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","type_id","type_id","type_id","type_id","type_id","write","write","write","write","write_at","write_at","write_at","write_at","write_at","write_at","write_at","write_blocks","write_blocks","write_blocks","write_blocks","write_blocks","write_blocks","write_blocks","write_str","write_str"],"q":[[0,"io"]],"d":["Describes an operation for performing byte-wise I/O on a …","A parent trait used to specify the block size (in bytes) …","A trait that represents an I/O stream (e.g., an I/O …","A trait that represents an I/O stream (e.g., an I/O …","A trait that represents an I/O stream that can be read …","A wrapper struct that implements a byte-wise reader atop a …","A wrapper struct that implements a byte-wise reader and …","A trait that represents an I/O stream that can be written …","A wrapper struct that implements a byte-wise writer atop a …","An input parameter or argument was incorrect or invalid.","Errors that can be returned from I/O operations.","A trait that represents an I/O stream that has a known …","A struct that holds an IO object wrapped in a Lockable …","A miscellaneous error occurred.","A stateful reader that keeps track of its current offset …","A readable and writable “stateful” I/O stream that …","The I/O operation timed out and was canceled.","A stateful writer that keeps track of its current offset …","The range of blocks to transfer.","Returns the size in bytes of a single block (i.e., sector),","","","","","","","","Calculates block-wise bounds for an I/O transfer  based on …","","","","","","","","","","","","","","","","","","","The byte-wise range specified in absolute bytes from the …","The range of bytes relative to the blocks specified by …","","","","","","Flushes this entire writer’s output stream,  ensuring …","Flushes this writer’s output stream,  ensuring all …","","","","","","","","","","","","","","","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","","","","Returns the argument unchanged.","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","","","Returns the argument unchanged.","Returns the argument unchanged.","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Returns the length (size in bytes) of this I/O stream or …","","","","","","","","Creates a new ReaderWriter with an initial offset of 0.","Creates a new Reader with an initial offset of 0.","Creates a new Writer with an initial offset of 0.","","","","","Reads bytes of data from this reader into the given buffer.","","","","","","","Reads blocks of data from this reader into the given buffer…","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","","Writes bytes of data from the given buffer to this writer.","","","","","","","Writes blocks of data from the given buffer to this writer.","","","","","","","",""],"i":[0,0,0,0,0,0,0,0,0,20,0,0,0,20,0,0,20,0,16,7,3,5,6,8,9,10,14,0,3,5,6,8,9,10,20,14,16,3,5,6,8,9,10,20,14,16,16,16,14,14,8,14,8,4,22,5,5,6,6,8,8,8,10,10,10,14,14,14,14,14,14,20,14,16,3,3,3,5,5,5,6,6,6,8,9,10,20,20,14,14,14,16,3,5,6,8,9,10,20,14,16,30,3,5,6,8,9,10,14,8,9,10,8,9,14,14,31,3,5,8,9,14,14,2,3,5,8,9,14,14,8,9,10,14,14,14,3,5,6,8,9,10,20,14,16,3,5,6,8,9,10,20,14,16,3,5,6,8,9,10,20,14,16,8,10,14,14,22,5,6,8,10,14,14,4,5,6,8,10,14,14,14,14],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,[[],1],[[[3,[2]]],1],[[[5,[[0,[2,4]]]]],1],[[[6,[[0,[2,4]]]]],1],[[[8,[7]]],1],[[[9,[7]]],1],[[[10,[7]]],1],[[[14,[[0,[7,11]],[0,[[12,[[0,[7,11]]]],11]],[13,[[0,[[12,[[0,[7,11]]]],11]]]]]]],1],[[[15,[1]],1],[[18,[[17,[16]]]]]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],0,0,[[[14,[11,[0,[[12,[11]],11]],[0,[[13,[[0,[[12,[11]],11]]]],19]]]]],[[14,[11,[0,[[12,[11]],11]],[0,[[13,[[0,[[12,[11]],11]]]],19]]]]]],[[]],[8],[[[14,[11,[0,[[12,[11]],11]],[13,[[0,[[12,[11]],11]]]]]]],[[0,[[12,[11]],11]]]],[8],[[],[[21,[20]]]],[[],[[21,[20]]]],[[[5,[[0,[2,4]]]]],[[21,[20]]]],[[[5,[[0,[2,4]]]]],[[21,[20]]]],[[[6,[[0,[2,4]]]]],[[21,[20]]]],[[[6,[[0,[2,4]]]]],[[21,[20]]]],[[[8,[22]]],23],[[[8,[4]]],[[21,[20]]]],[[[8,[22]]],[[21,[20]]]],[[[10,[22]]],23],[[[10,[4]]],[[21,[20]]]],[[[10,[22]]],[[21,[20]]]],[[[14,[[0,[24,11]],[0,[[12,[[0,[24,11]]]],11]],[13,[[0,[[12,[[0,[24,11]]]],11]]]]]]],23],[[[14,[[0,[24,11]],[0,[[12,[[0,[24,11]]]],11]],[13,[[0,[[12,[[0,[24,11]]]],11]]]]]]],23],[[[14,[[0,[4,11]],[0,[[12,[[0,[4,11]]]],11]],[13,[[0,[[12,[[0,[4,11]]]],11]]]]]]],[[21,[20]]]],[[[14,[[0,[22,11]],[0,[[12,[[0,[22,11]]]],11]],[13,[[0,[[12,[[0,[22,11]]]],11]]]]]]],[[21,[20]]]],[[[14,[[0,[22,11]],[0,[[12,[[0,[22,11]]]],11]],[13,[[0,[[12,[[0,[22,11]]]],11]]]]]]],[[21,[20]]]],[[[14,[[0,[4,11]],[0,[[12,[[0,[4,11]]]],11]],[13,[[0,[[12,[[0,[4,11]]]],11]]]]]]],[[21,[20]]]],[[20,25],26],[[[14,[[0,[11,27]],[0,[[12,[[0,[11,27]]]],11,27]],[0,[[13,[[0,[[12,[[0,[11,27]]]],11,27]]]],27]]]],25],26],[[16,25],26],[2,[[3,[2]]]],[28],[[]],[[]],[28],[[[0,[2,4]]],[[5,[[0,[2,4]]]]]],[28],[[]],[[[0,[2,4]]],[[6,[[0,[2,4]]]]]],[[]],[[]],[[]],[[]],[29,20],[[[13,[[0,[[12,[11]],11]]]]],[[14,[11,[0,[[12,[11]],11]],[13,[[0,[[12,[11]],11]]]]]]]],[28],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[],1],[[[3,[[0,[30,2]]]]],1],[[[5,[[0,[30,2,4]]]]],1],[[[6,[[0,[30,2,4]]]]],1],[[[8,[30]]],1],[[[9,[30]]],1],[[[10,[30]]],1],[[[14,[[0,[30,11]],[0,[[12,[[0,[30,11]]]],11]],[13,[[0,[[12,[[0,[30,11]]]],11]]]]]]],1],[[[0,[31,22]]],[[8,[[0,[31,22]]]]]],[31,[[9,[31]]]],[22,[[10,[22]]]],[[[8,[31]],[33,[32]]],[[23,[1]]]],[[[9,[31]],[33,[32]]],[[23,[1]]]],[[[14,[[0,[34,11]],[0,[[12,[[0,[34,11]]]],11]],[13,[[0,[[12,[[0,[34,11]]]],11]]]]]],[33,[32]]],[[23,[1]]]],[[[14,[[0,[34,11]],[0,[[12,[[0,[34,11]]]],11]],[13,[[0,[[12,[[0,[34,11]]]],11]]]]]],[33,[32]]],[[23,[1]]]],[[[33,[32]],1],[[21,[1,20]]]],[[[3,[2]],[33,[32]],1],[[21,[1,20]]]],[[[5,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[8,[31]],[33,[32]],1],[[21,[1,20]]]],[[[9,[31]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[31,11]],[0,[[12,[[0,[31,11]]]],11]],[13,[[0,[[12,[[0,[31,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[31,11]],[0,[[12,[[0,[31,11]]]],11]],[13,[[0,[[12,[[0,[31,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[33,[32]],1],[[21,[1,20]]]],[[[3,[2]],[33,[32]],1],[[21,[1,20]]]],[[[5,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[8,[2]],[33,[32]],1],[[21,[1,20]]]],[[[9,[2]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[2,11]],[0,[[12,[[0,[2,11]]]],11]],[13,[[0,[[12,[[0,[2,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[2,11]],[0,[[12,[[0,[2,11]]]],11]],[13,[[0,[[12,[[0,[2,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[8,[30]],35],[[23,[36]]]],[[[9,[30]],35],[[23,[36]]]],[[[10,[30]],35],[[23,[36]]]],[[[14,[[0,[37,11]],[0,[[12,[[0,[37,11]]]],11]],[13,[[0,[[12,[[0,[37,11]]]],11]]]]]],35],[[23,[36]]]],[[[14,[[0,[37,11]],[0,[[12,[[0,[37,11]]]],11]],[13,[[0,[[12,[[0,[37,11]]]],11]]]]]],35],[[23,[36]]]],[[]],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],21],[[],38],[[],38],[[],38],[[],38],[[],38],[[],38],[[],38],[[],38],[[],38],[[[8,[22]],[33,[32]]],[[23,[1]]]],[[[10,[22]],[33,[32]]],[[23,[1]]]],[[[14,[[0,[24,11]],[0,[[12,[[0,[24,11]]]],11]],[13,[[0,[[12,[[0,[24,11]]]],11]]]]]],[33,[32]]],[[23,[1]]]],[[[14,[[0,[24,11]],[0,[[12,[[0,[24,11]]]],11]],[13,[[0,[[12,[[0,[24,11]]]],11]]]]]],[33,[32]]],[[23,[1]]]],[[[33,[32]],1],[[21,[1,20]]]],[[[5,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[6,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[8,[22]],[33,[32]],1],[[21,[1,20]]]],[[[10,[22]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[22,11]],[0,[[12,[[0,[22,11]]]],11]],[13,[[0,[[12,[[0,[22,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[22,11]],[0,[[12,[[0,[22,11]]]],11]],[13,[[0,[[12,[[0,[22,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[33,[32]],1],[[21,[1,20]]]],[[[5,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[6,[[0,[2,4]]]],[33,[32]],1],[[21,[1,20]]]],[[[8,[4]],[33,[32]],1],[[21,[1,20]]]],[[[10,[4]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[4,11]],[0,[[12,[[0,[4,11]]]],11]],[13,[[0,[[12,[[0,[4,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[4,11]],[0,[[12,[[0,[4,11]]]],11]],[13,[[0,[[12,[[0,[4,11]]]],11]]]]]],[33,[32]],1],[[21,[1,20]]]],[[[14,[[0,[39,11]],[0,[[12,[[0,[39,11]]]],11]],[13,[[0,[[12,[[0,[39,11]]]],11]]]]]],29],26],[[[14,[[0,[39,11]],[0,[[12,[[0,[39,11]]]],11]],[13,[[0,[[12,[[0,[39,11]]]],11]]]]]],29],26]],"c":[],"p":[[15,"usize"],[8,"BlockReader"],[3,"ByteReaderWrapper"],[8,"BlockWriter"],[3,"ByteReaderWriterWrapper"],[3,"ByteWriterWrapper"],[8,"BlockIo"],[3,"ReaderWriter"],[3,"Reader"],[3,"Writer"],[8,"Sized"],[8,"Lockable"],[8,"Borrow"],[3,"LockableIo"],[3,"Range"],[3,"BlockByteTransfer"],[4,"Option"],[15,"array"],[8,"Clone"],[4,"IoError"],[4,"Result"],[8,"ByteWriter"],[6,"Result"],[8,"Write"],[3,"Formatter"],[6,"Result"],[8,"Debug"],[15,"never"],[15,"str"],[8,"KnownLength"],[8,"ByteReader"],[15,"u8"],[15,"slice"],[8,"Read"],[4,"SeekFrom"],[15,"u64"],[8,"Seek"],[3,"TypeId"],[8,"Write"]]},\
 "ioapic":{"doc":"","t":"DLLLLLFFFLLMLLLLLLL","n":["IoApic","arbitration_id","borrow","borrow_mut","create","from","get_first_ioapic","get_ioapic","get_ioapics","handles_irq","id","id","into","mask_irq","set_irq","try_from","try_into","type_id","version"],"q":[[0,"ioapic"]],"d":["A representation of an IoApic (x86-specific interrupt chip …","gets this IoApic’s arbitration id.","","","Creates a new IoApic struct from the given id, …","Returns the argument unchanged.","Returns the first IoApic that was created, if any, after …","If an IoApic with the given id exists, then lock it …","Returns a reference to the list of IoApics.","Returns whether this IoApic handles the given irq_num, …","gets this IoApic’s id.","The ID of this IoApic.","Calls U::from(self).","Masks (disables) the given IRQ line.  NOTE: this function …","Set IRQ to an interrupt vector.","","","","gets this IoApic’s version."],"i":[0,1,1,1,1,1,0,0,0,1,1,1,1,1,1,1,1,1,1],"f":[0,[1,2],[[]],[[]],[[3,4,5,2],[[7,[6]]]],[[]],[[],[[9,[[8,[1]]]]]],[4,[[9,[[8,[1]]]]]],[[],[[11,[4,[10,[1]]]]]],[[1,2],12],[1,2],0,[[]],[[1,4]],[[1,4,13,4],[[7,[6]]]],[[],7],[[],7],[[],14],[1,2]],"c":[],"p":[[3,"IoApic"],[15,"u32"],[3,"PageTable"],[15,"u8"],[3,"PhysicalAddress"],[15,"str"],[4,"Result"],[3,"MutexGuard"],[4,"Option"],[6,"Mutex"],[3,"AtomicMap"],[15,"bool"],[3,"ApicId"],[3,"TypeId"]]},\
 "iommu":{"doc":"Intel VT-d (IOMMU) implementation.","t":"DLLLFLFLLL","n":["IntelIommu","borrow","borrow_mut","from","init","into","iommu_present","try_from","try_into","type_id"],"q":[[0,"iommu"]],"d":["Struct representing IOMMU (TODO: rename since this is …","","","Returns the argument unchanged.","Initialize the IOMMU hardware.","Calls U::from(self).","Returns true if an IOMMU exists and has been initialized.","","",""],"i":[0,9,9,9,0,9,0,9,9,9],"f":[0,[[]],[[]],[[]],[[1,2,3,4],[[6,[5]]]],[[]],[[],7],[[],6],[[],6],[[],8]],"c":[],"p":[[15,"u8"],[15,"u16"],[3,"PhysicalAddress"],[3,"PageTable"],[15,"str"],[4,"Result"],[15,"bool"],[3,"TypeId"],[3,"IntelIommu"]]},\
-"irq_safety":{"doc":"Types for interrupt-safe operations, i.e., avoiding …","t":"DDDDDDLLLLLLLLLLLLLLLLLLLLFLFLLLLLLLLLLLLLFFLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL","n":["HeldInterrupts","MutexIrqSafe","MutexIrqSafeGuard","RwLockIrqSafe","RwLockIrqSafeReadGuard","RwLockIrqSafeWriteGuard","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","default","default","default","deref","deref","deref","deref_mut","deref_mut","disable_interrupts","drop","enable_interrupts","fmt","fmt","force_read_decrement","force_unlock","force_write_unlock","from","from","from","from","from","from","get_mut","get_mut","hold_interrupts","interrupts_enabled","into","into","into","into","into","into","into_inner","into_inner","is_locked","lock","new","new","read","reader_count","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","try_lock","try_read","try_write","type_id","type_id","type_id","type_id","type_id","type_id","write","writer_count"],"q":[[0,"irq_safety"]],"d":["A handle for frozen interrupts","This type provides interrupt-safe MUTual EXclusion based …","A guard to which the protected data can be accessed","A simple wrapper around a RwLock whose guards disable …","A guard to which the protected data can be read","A guard to which the protected data can be written","","","","","","","","","","","","","","","","","","","","","","","","","","Force decrement the reader count.","Force unlock the spinlock.","Force unlock exclusive write access.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns a mutable reference to the underlying data.","Returns a mutable reference to the underlying data.","Prevent interrupts from firing until the return value is …","","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Consumes this MutexIrqSafe, returning the underlying data.","Consumes this RwLockIrqSafe, returning the underlying data.","Returns true if the lock is currently held.","Locks the spinlock and returns a guard.","Creates a new spinlock wrapping the supplied data.","Creates a new spinlock wrapping the supplied data.","Locks this RwLockIrqSafe with shared read access, blocking …","Return the number of readers that currently hold the lock …","","","","","","","","","","","","","Tries to lock the MutexIrqSafe. If it is already locked, …","Attempt to acquire this lock with shared read access.","Attempt to lock this rwlock with exclusive write access.","","","","","","","Lock this rwlock with exclusive write access, blocking the …","Return the number of writers that currently hold the lock."],"i":[0,0,0,0,0,0,3,6,4,7,8,5,3,6,4,7,8,5,3,4,5,6,7,8,6,8,0,5,0,3,4,4,3,4,3,6,4,7,8,5,3,4,0,0,3,6,4,7,8,5,3,4,3,3,3,4,4,4,3,6,4,7,8,5,3,6,4,7,8,5,3,4,4,3,6,4,7,8,5,4,4],"f":[0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[],[[3,[[0,[1,2]]]]]],[[],[[4,[[0,[1,2]]]]]],[[],5],[[[6,[1]]],1],[[[7,[1]]],1],[[[8,[1]]],1],[[[6,[1]]],1],[[[8,[1]]],1],[[]],[5],[[]],[[[3,[[0,[1,9]]]],10],11],[[[4,[[0,[1,9]]]],10],11],[[[4,[1]]]],[[[3,[1]]]],[[[4,[1]]]],[[]],[[]],[[]],[[]],[[]],[[]],[[[3,[1]]],1],[[[4,[1]]],1],[[],5],[[],12],[[]],[[]],[[]],[[]],[[]],[[]],[3],[4],[[[3,[1]]],12],[[[3,[1]]],[[6,[1]]]],[[],3],[[],4],[[[4,[1]]],[[7,[1]]]],[[[4,[1]]],13],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[[3,[1]]],[[15,[[6,[1]]]]]],[[[4,[1]]],[[15,[[7,[1]]]]]],[[[4,[1]]],[[15,[[8,[1]]]]]],[[],16],[[],16],[[],16],[[],16],[[],16],[[],16],[[[4,[1]]],[[8,[1]]]],[[[4,[1]]],13]],"c":[],"p":[[8,"Sized"],[8,"Default"],[3,"MutexIrqSafe"],[3,"RwLockIrqSafe"],[3,"HeldInterrupts"],[3,"MutexIrqSafeGuard"],[3,"RwLockIrqSafeReadGuard"],[3,"RwLockIrqSafeWriteGuard"],[8,"Debug"],[3,"Formatter"],[6,"Result"],[15,"bool"],[15,"usize"],[4,"Result"],[4,"Option"],[3,"TypeId"]]},\
+"irq_safety":{"doc":"Types for interrupt-safe operations, i.e., avoiding …","t":"DDDDDDLLLLLLLLLLLLLLLLLLLLFLFLLLLLLLLLLLLLFFLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL","n":["HeldInterrupts","MutexIrqSafe","MutexIrqSafeGuard","RwLockIrqSafe","RwLockIrqSafeReadGuard","RwLockIrqSafeWriteGuard","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","default","default","default","deref","deref","deref","deref_mut","deref_mut","disable_interrupts","drop","enable_interrupts","fmt","fmt","force_read_decrement","force_unlock","force_write_unlock","from","from","from","from","from","from","get_mut","get_mut","hold_interrupts","interrupts_enabled","into","into","into","into","into","into","into_inner","into_inner","is_locked","lock","new","new","read","reader_count","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","try_lock","try_read","try_write","type_id","type_id","type_id","type_id","type_id","type_id","write","writer_count"],"q":[[0,"irq_safety"]],"d":["A guard type for withholding regular interrupts on the …","This type provides interrupt-safe MUTual EXclusion based …","A guard to which the protected data can be accessed","A simple wrapper around a RwLock whose guards disable …","A guard to which the protected data can be read","A guard to which the protected data can be written","","","","","","","","","","","","","","","","","","","","","Unconditionally disables regular interrupts (IRQs), not …","","Unconditionally enables regular interrupts (IRQs), not …","","","Force decrement the reader count.","Force unlock the spinlock.","Force unlock exclusive write access.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns a mutable reference to the underlying data.","Returns a mutable reference to the underlying data.","Prevents regular interrupts from occurring until the …","Returns whether regular interrupts are enabled on the …","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Consumes this MutexIrqSafe, returning the underlying data.","Consumes this RwLockIrqSafe, returning the underlying data.","Returns true if the lock is currently held.","Locks the spinlock and returns a guard.","Creates a new spinlock wrapping the supplied data.","Creates a new spinlock wrapping the supplied data.","Locks this RwLockIrqSafe with shared read access, blocking …","Return the number of readers that currently hold the lock …","","","","","","","","","","","","","Tries to lock the MutexIrqSafe. If it is already locked, …","Attempt to acquire this lock with shared read access.","Attempt to lock this rwlock with exclusive write access.","","","","","","","Lock this rwlock with exclusive write access, blocking the …","Return the number of writers that currently hold the lock."],"i":[0,0,0,0,0,0,3,6,4,7,8,5,3,6,4,7,8,5,3,4,5,6,7,8,6,8,0,5,0,3,4,4,3,4,3,6,4,7,8,5,3,4,0,0,3,6,4,7,8,5,3,4,3,3,3,4,4,4,3,6,4,7,8,5,3,6,4,7,8,5,3,4,4,3,6,4,7,8,5,4,4],"f":[0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[],[[3,[[0,[1,2]]]]]],[[],[[4,[[0,[1,2]]]]]],[[],5],[[[6,[1]]],1],[[[7,[1]]],1],[[[8,[1]]],1],[[[6,[1]]],1],[[[8,[1]]],1],[[]],[5],[[]],[[[3,[[0,[1,9]]]],10],11],[[[4,[[0,[1,9]]]],10],11],[[[4,[1]]]],[[[3,[1]]]],[[[4,[1]]]],[[]],[[]],[[]],[[]],[[]],[[]],[[[3,[1]]],1],[[[4,[1]]],1],[[],5],[[],12],[[]],[[]],[[]],[[]],[[]],[[]],[3],[4],[[[3,[1]]],12],[[[3,[1]]],[[6,[1]]]],[[],3],[[],4],[[[4,[1]]],[[7,[1]]]],[[[4,[1]]],13],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[[3,[1]]],[[15,[[6,[1]]]]]],[[[4,[1]]],[[15,[[7,[1]]]]]],[[[4,[1]]],[[15,[[8,[1]]]]]],[[],16],[[],16],[[],16],[[],16],[[],16],[[],16],[[[4,[1]]],[[8,[1]]]],[[[4,[1]]],13]],"c":[],"p":[[8,"Sized"],[8,"Default"],[3,"MutexIrqSafe"],[3,"RwLockIrqSafe"],[3,"HeldInterrupts"],[3,"MutexIrqSafeGuard"],[3,"RwLockIrqSafeReadGuard"],[3,"RwLockIrqSafeWriteGuard"],[8,"Debug"],[3,"Formatter"],[6,"Result"],[15,"bool"],[15,"usize"],[4,"Result"],[4,"Option"],[3,"TypeId"]]},\
 "ixgbe":{"doc":"An ixgbe driver for a 82599 10GbE Network Interface Card.","t":"NNNNNNNNNNNNNNNNERRHRRDNNNNENENNNLLLLLLLLLLLLLLLLLFFLLLLLLLLLLFLLLALLLLLLLLLFLLLLALLLLFFFF","n":["Buffer10KiB","Buffer11KiB","Buffer12KiB","Buffer13KiB","Buffer14KiB","Buffer15KiB","Buffer16KiB","Buffer1KiB","Buffer2KiB","Buffer3KiB","Buffer4KiB","Buffer5KiB","Buffer6KiB","Buffer7KiB","Buffer8KiB","Buffer9KiB","FilterProtocol","INTEL_82599","INTEL_VEND","IXGBE_NICS","IXGBE_NUM_RX_QUEUES_ENABLED","IXGBE_NUM_TX_QUEUES_ENABLED","IxgbeNic","LS100","LS1000","LS10000","LSUnknown","LinkSpeedMbps","Other","RxBufferSizeKiB","Sctp","Tcp","Udp","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone_into","device_id","enable_rss","eq","from","from","from","from","get_ixgbe_nic","get_ixgbe_nics_list","get_stats","init","into","into","into","into","link_speed","link_status","mac_address","receive","rx_poll_mq","send","set_5_tuple_filter","spoof_mac","test_packets","to_owned","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","tx_send_mq","type_id","type_id","type_id","type_id","virtual_function","vzip","vzip","vzip","vzip","create_dhcp_test_packet","create_raw_packet","dhcp_request_packet","create_virtual_nic"],"q":[[0,"ixgbe"],[86,"ixgbe::test_packets"],[89,"ixgbe::virtual_function"]],"d":["","","","","","","","","","","","","","","","","Options for the filter protocol used in the 5-tuple …","Device ID for the 82599ES, used to identify the device …","Vendor ID for Intel","All the 82599 NICs found in the PCI space are initialized …","The number of receive queues that are enabled.  Do NOT set …","The number of transmit queues that are enabled.  Do NOT …","A struct representing an ixgbe network interface card.","","","","","Possible link speeds of the 82599 NIC","","The set of receive buffer sizes that are accepted by the …","","","","","","","","","","","","","","Returns the device id of the PCI device.","Enable multiple receive queues with RSS. Part of queue …","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns a reference to the IxgbeNic wrapped in a …","Returns a reference to the list of all initialized ixgbe …","Returns the Rx and Tx statistics in the form: (Good Rx …","Store required values from the device’s PCI config …","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Returns link speed in Mb/s","Returns value of (links, links2) registers","","","A helper function to poll the nic receive queues (only for …","","Sets the L3/L4 5-tuple filter which can do an exact match …","","A set of functions to create packets for testing the NIC …","","","","","","","","","","A helper function to send a test packet on a nic transmit …","","","","","Interface for an application to request a VirtualNIC from …","","","","","Creates a TransmitBuffer containing a dhcp packet.","Creates a TransmitBuffer that contains a packet with only …","Sends a dhcp request packet on the ixgbe NIC.","Create a virtual NIC from the ixgbe device."],"i":[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,6,6,6,6,0,19,0,19,19,19,2,19,6,1,2,19,6,1,1,1,2,2,6,2,19,6,1,0,0,2,2,2,19,6,1,2,2,2,2,0,2,2,2,0,1,2,19,6,1,2,19,6,1,0,2,19,6,1,0,2,19,6,1,0,0,0,0],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[1,1],[[]],[2,3],0,[[6,6],7],[[]],[[]],[[]],[[]],[3,[[5,[[8,[2]],4]]]],[[],[[10,[[9,[[8,[2]]]]]]]],[2],[[11,3,7,[10,[[9,[12]]]],7,1,13,13],[[5,[[8,[2]],4]]]],[[]],[[]],[[]],[[]],[2,6],[2],[2,[[15,[14]]]],[2,[[10,[16]]]],[[17,3],[[5,[16,4]]]],[[2,18]],[[2,[10,[[15,[14]]]],[10,[[15,[14]]]],[10,[13]],[10,[13]],[10,[19]],14,14],[[5,[14,4]]]],[[2,[15,[14]]]],0,[[]],[[],5],[[],5],[[],5],[[],5],[[],5],[[],5],[[],5],[[],5],[[17,3,[10,[18]]],[[5,[4]]]],[[],20],[[],20],[[],20],[[],20],0,[[]],[[]],[[]],[[]],[[],[[5,[18,4]]]],[[[21,[14]],[21,[14]],[21,[14]]],[[5,[18,4]]]],[3,[[5,[4]]]],[[3,[9,[[15,[14]]]],17,17],[[5,[[24,[0,22,0,23]],4]]]]],"c":[],"p":[[4,"RxBufferSizeKiB"],[3,"IxgbeNic"],[3,"PciLocation"],[15,"str"],[4,"Result"],[4,"LinkSpeedMbps"],[15,"bool"],[6,"IrqSafeMutex"],[3,"Vec"],[4,"Option"],[3,"PciDevice"],[6,"HandlerFunc"],[15,"u16"],[15,"u8"],[15,"array"],[3,"ReceivedFrame"],[15,"usize"],[3,"TransmitBuffer"],[4,"FilterProtocol"],[3,"TypeId"],[15,"slice"],[3,"AdvancedRxDescriptor"],[3,"AdvancedTxDescriptor"],[3,"VirtualNic"]]},\
 "kernel_config":{"doc":"","t":"AAARRRRRRRRRRRRRRRRRRRRRRRRRRRRR","n":["display","memory","time","FRAMEBUFFER_MAX_RESOLUTION","ADDRESSABILITY_PER_P4_ENTRY","BYTES_PER_ADDR","ENTRIES_PER_PAGE_TABLE","KERNEL_HEAP_INITIAL_SIZE","KERNEL_HEAP_MAX_SIZE","KERNEL_HEAP_P4_INDEX","KERNEL_HEAP_START","KERNEL_OFFSET","KERNEL_STACK_SIZE_IN_PAGES","KERNEL_TEXT_P4_INDEX","KERNEL_TEXT_START","MAX_PAGE_NUMBER","MAX_VIRTUAL_ADDRESS","P1_INDEX_SHIFT","P2_INDEX_SHIFT","P3_INDEX_SHIFT","P4_INDEX_SHIFT","PAGE_SHIFT","PAGE_SIZE","RECURSIVE_P4_INDEX","RECURSIVE_P4_START","TEMPORARY_PAGE_VIRT_ADDR","UPCOMING_PAGE_TABLE_RECURSIVE_P4_INDEX","UPCOMING_PAGE_TABLE_RECURSIVE_P4_START","CONFIG_HEARTBEAT_PERIOD_MS","CONFIG_PIT_FREQUENCY_HZ","CONFIG_RTC_FREQUENCY_HZ","CONFIG_TIMESLICE_PERIOD_MICROSECONDS"],"q":[[0,"kernel_config"],[3,"kernel_config::display"],[4,"kernel_config::memory"],[28,"kernel_config::time"]],"d":["","The basic virtual address ranges (virtual memory map) …","","The maximum resolution (width, height) of the graphical …","Value: 512 GiB.","64-bit architecture results in 8 bytes per address.","Value: 512.","","The kernel heap is allowed to grow to fill the entirety of …","Value: 509. The 509th entry is used for the kernel heap.","The higher-half heap gets the 512GB address range starting …","The virtual address where the initial kernel (the …","","Value: 511. The 511th entry is used (in part) for kernel …","The kernel text region is where we load kernel modules.  …","","","Value: 0. Shift the Page number (not the address!) by this …","Value: 9. Shift the Page number (not the address!) by this …","Value: 18. Shift the Page number (not the address!) by …","Value: 27. Shift the Page number (not the address!) by …","The lower 12 bits of a virtual address correspond to the …","Page size is 4096 bytes, 4KiB pages.","Value: 510. The 510th entry is used to recursively map the …","The start of the virtual address range covered by the …","","Value: 508. The 508th entry is used to temporarily …","The start of the virtual address range covered by the …","the heartbeat period in milliseconds","the chosen interrupt frequency (in Hertz) of the PIT clock ","the chosen interrupt frequency (in Hertz) of the RTC. …","The timeslice period, specified in microseconds."],"i":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],"c":[],"p":[]},\
 "keyboard":{"doc":"A basic driver for a keyboard connected to the legacy PS/2 …","t":"F","n":["init"],"q":[[0,"keyboard"]],"d":["Initialize the PS/2 keyboard driver and register its …"],"i":[0],"f":[[[1,[3,[2]]],[[5,[4]]]]],"c":[],"p":[[3,"PS2Keyboard"],[4,"Event"],[3,"Queue"],[15,"str"],[4,"Result"]]},\
@@ -138,7 +138,7 @@ var searchIndex = JSON.parse('{\
 "scheduler_priority":{"doc":"This scheduler implements a priority algorithm.","t":"DLLLLFFLFFLLL","n":["PriorityInheritanceGuard","borrow","borrow_mut","drop","from","get_priority","inherit_priority","into","select_next_task","set_priority","try_from","try_into","type_id"],"q":[[0,"scheduler_priority"]],"d":["Lowers the task’s priority to its previous value when …","","","","Returns the argument unchanged.","","Modifies the given task’s priority to be the maximum of …","Calls U::from(self).","This defines the priority scheduler policy. Returns None …","","","",""],"i":[0,1,1,1,1,0,0,1,0,0,1,1,1],"f":[0,[[]],[[]],[1],[[]],[2,[[4,[3]]]],[2,1],[[]],[3,[[4,[2]]]],[[2,3]],[[],5],[[],5],[[],6]],"c":[],"p":[[3,"PriorityInheritanceGuard"],[3,"TaskRef"],[15,"u8"],[4,"Option"],[4,"Result"],[3,"TypeId"]]},\
 "scheduler_round_robin":{"doc":"This crate picks the next task in round robin fashion. …","t":"DLLLFLFLLL","n":["PriorityInheritanceGuard","borrow","borrow_mut","from","inherit_priority","into","select_next_task","try_from","try_into","type_id"],"q":[[0,"scheduler_round_robin"]],"d":["","","","Returns the argument unchanged.","","Calls U::from(self).","This defines the round robin scheduler policy. Returns …","","",""],"i":[0,2,2,2,0,2,0,2,2,2],"f":[0,[[]],[[]],[[]],[1,2],[[]],[3,[[4,[1]]]],[[],5],[[],5],[[],6]],"c":[],"p":[[3,"TaskRef"],[3,"PriorityInheritanceGuard"],[15,"u8"],[4,"Option"],[4,"Result"],[3,"TypeId"]]},\
 "sdt":{"doc":"ACPI table definitions and basic SDT structures.","t":"DRDMMMMLLLLMLLMMLLLLLLMMMMMMMLLLLLL","n":["GenericAddressStructure","SDT_SIZE_IN_BYTES","Sdt","access_size","address_space","bit_offset","bit_width","borrow","borrow","borrow_mut","borrow_mut","checksum","clone","clone","creator_id","creator_revision","fmt","fmt","from","from","into","into","length","oem_id","oem_revision","oem_table_id","phys_addr","revision","signature","try_from","try_from","try_into","try_into","type_id","type_id"],"q":[[0,"sdt"]],"d":["A struct used to describe the position and layout of …","The size in bytes of the ACPI SDT Header (Sdt struct).","An ACPI System Descriptor Table. This is the header (the …","","","","","","","","","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Calls U::from(self).","Calls U::from(self).","","","","","","","","","","","","",""],"i":[0,0,0,2,2,2,2,1,2,1,2,1,1,2,1,1,1,2,1,2,1,2,1,1,1,1,2,1,1,1,2,1,2,1,2],"f":[0,0,0,0,0,0,0,[[]],[[]],[[]],[[]],0,[1,1],[2,2],0,0,[[1,3],4],[[2,3],4],[[]],[[]],[[]],[[]],0,0,0,0,0,0,0,[[],5],[[],5],[[],5],[[],5],[[],6],[[],6]],"c":[],"p":[[3,"Sdt"],[3,"GenericAddressStructure"],[3,"Formatter"],[6,"Result"],[4,"Result"],[3,"TypeId"]]},\
-"serial_port":{"doc":"A full serial driver with more advanced I/O support, e.g., …","t":"NNNNDNDNDEDENNLLLLLLLLLLLLLLLMLLLLLLLLLLLLLLLLLLFLLFLLLLLLMLLLLLLLLFLFLLLLLLLLLLLLLLLLLLLLLLLL","n":["COM1","COM2","COM3","COM4","DataChunk","DataReceived","DataSenderAlreadyExists","ErrorOrBreak","SerialPort","SerialPortAddress","SerialPortBasic","SerialPortInterruptEvent","StatusChange","TransmitterEmpty","base_port_address","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone_into","data","data_available","deref","deref_mut","drop","empty","enable_interrupt","eq","flush","fmt","fmt","fmt","from","from","from","from","from","from","from_str","get_serial_port","in_byte","in_bytes","init_serial_port","into","into","into","into","into","into","len","new","new","out_byte","out_bytes","out_str","read","ready_to_transmit","register_interrupt_handler","set_connection_listener","set_data_sender","take_serial_port_basic","to_owned","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","type_id","type_id","write","write_str","write_str"],"q":[[0,"serial_port"]],"d":["The base port I/O address for the COM1 serial port.","The base port I/O address for the COM2 serial port.","The base port I/O address for the COM3 serial port.","The base port I/O address for the COM4 serial port.","A chunk of data read from a serial port that will be …","","An empty error type indicating that a data sender could …","","A serial port abstraction with support for interrupt-based …","The base port I/O addresses for COM serial ports.","A serial port and its various data and control registers.","The types of events that can trigger an interrupt on a …","","","","","","","","","","","","","","","","","","","Returns true if the serial port has data available to read.","","","","Returns a new DataChunk filled with zeroes that can be …","Enable or disable interrupts on this serial port for …","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","Obtains a reference to the SerialPort specified by the …","Read one byte from the serial port, blocking until data is …","Reads multiple bytes from the serial port into the given …","Initializes the SerialPort specified by the given …","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","","Creates and returns a new serial port structure,  and …","Initialize this serial port by giving it ownership and …","Write the given byte to the serial port, blocking until …","Write the given bytes to the serial port, blocking until …","Write the given string to the serial port, blocking until …","","Returns true if the serial port is ready to transmit a …","Register the interrupt handler for this serial port and …","A temporary hack to allow the serial port interrupt handler","Tells this SerialPort to push received data bytes onto the …","Takes ownership of the SerialPort specified by the given …","","","","","","","","","","","","","","","","","","","","","","","",""],"i":[2,2,2,2,0,6,0,6,0,0,0,0,6,6,1,1,4,2,5,11,6,1,4,2,5,11,6,2,2,5,1,4,4,1,5,1,2,4,2,11,6,1,4,2,5,11,6,2,0,1,1,0,1,4,2,5,11,6,5,1,4,1,1,1,4,1,4,0,4,0,2,1,4,2,2,2,5,11,6,1,4,2,5,11,6,1,4,2,5,11,6,4,1,4],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,[1,2],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[2,2],[[]],0,[1,3],[4],[4],[1],[[],5],[[1,6,3]],[[2,2],3],[4,7],[[2,8],[[10,[9]]]],[[11,8],12],[[6,8],[[10,[9]]]],[[]],[[]],[[]],[[]],[[]],[[]],[13,[[10,[2]]]],[2,[[16,[[15,[[14,[4]]]]]]]],[1,17],[[1,[18,[17]]],19],[[2,1],[[16,[[15,[[14,[4]]]]]]]],[[]],[[]],[[]],[[]],[[]],[[]],0,[20,1],[1,4],[[1,17]],[[1,[18,[17]]]],[[1,13]],[[4,[18,[17]]],[[7,[19]]]],[1,3],[[[15,[[14,[4]]]],21,22],[[10,[13]]]],[[[23,[2]]],[[23,[2]]]],[[4,[23,[5]]],[[10,[11]]]],[2,[[16,[1]]]],[[]],[[],10],[[],10],[13,[[10,[2]]]],[20,[[10,[2]]]],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],24],[[],24],[[],24],[[],24],[[],24],[[],24],[[4,[18,[17]]],[[7,[19]]]],[[1,13],[[10,[9]]]],[[4,13],12]],"c":[],"p":[[3,"SerialPortBasic"],[4,"SerialPortAddress"],[15,"bool"],[3,"SerialPort"],[3,"DataChunk"],[4,"SerialPortInterruptEvent"],[6,"Result"],[3,"Formatter"],[3,"Error"],[4,"Result"],[3,"DataSenderAlreadyExists"],[6,"Result"],[15,"str"],[6,"IrqSafeMutex"],[3,"Arc"],[4,"Option"],[15,"u8"],[15,"slice"],[15,"usize"],[15,"u16"],[6,"InterruptNumber"],[6,"HandlerFunc"],[3,"Sender"],[3,"TypeId"]]},\
+"serial_port":{"doc":"A full serial driver with more advanced I/O support, e.g., …","t":"NNNNDNDNDEDENNLLLLLLLLLLLLLLLMLLLLLLLLLLLLLLLLLLFLLFLLLLLLMLLLLLLLLFLFLLLLLLLLLLLLLLLLLLLLLLLL","n":["COM1","COM2","COM3","COM4","DataChunk","DataReceived","DataSenderAlreadyExists","ErrorOrBreak","SerialPort","SerialPortAddress","SerialPortBasic","SerialPortInterruptEvent","StatusChange","TransmitterEmpty","base_port_address","borrow","borrow","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone_into","data","data_available","deref","deref_mut","drop","empty","enable_interrupt","eq","flush","fmt","fmt","fmt","from","from","from","from","from","from","from_str","get_serial_port","in_byte","in_bytes","init_serial_port","into","into","into","into","into","into","len","new","new","out_byte","out_bytes","out_str","read","ready_to_transmit","register_interrupt_handler","set_connection_listener","set_data_sender","take_serial_port_basic","to_owned","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","type_id","type_id","write","write_str","write_str"],"q":[[0,"serial_port"]],"d":["The base port I/O address for the COM1 serial port.","The base port I/O address for the COM2 serial port.","The base port I/O address for the COM3 serial port.","The base port I/O address for the COM4 serial port.","A chunk of data read from a serial port that will be …","","An empty error type indicating that a data sender could …","","A serial port abstraction with support for interrupt-based …","The base port I/O addresses for COM serial ports.","A serial port and its various data and control registers.","The types of events that can trigger an interrupt on a …","","","","","","","","","","","","","","","","","","","Returns true if the serial port has data available to read.","","","","Returns a new DataChunk filled with zeroes that can be …","Enable or disable interrupts on this serial port for …","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","Obtains a reference to the SerialPort specified by the …","Read one byte from the serial port, blocking until data is …","Reads multiple bytes from the serial port into the given …","Initializes the SerialPort specified by the given …","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","","Creates and returns a new serial port structure,  and …","Initialize this serial port by giving it ownership and …","Write the given byte to the serial port, blocking until …","Write the given bytes to the serial port, blocking until …","Write the given string to the serial port, blocking until …","","Returns true if the serial port is ready to transmit a …","Register the interrupt handler for this serial port and …","A temporary hack to allow the serial port interrupt handler","Tells this SerialPort to push received data bytes onto the …","Takes ownership of the SerialPort specified by the given …","","","","","","","","","","","","","","","","","","","","","","","",""],"i":[2,2,2,2,0,6,0,6,0,0,0,0,6,6,1,1,4,2,5,11,6,1,4,2,5,11,6,2,2,5,1,4,4,1,5,1,2,4,2,11,6,1,4,2,5,11,6,2,0,1,1,0,1,4,2,5,11,6,5,1,4,1,1,1,4,1,4,0,4,0,2,1,4,2,2,2,5,11,6,1,4,2,5,11,6,1,4,2,5,11,6,4,1,4],"f":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,[1,2],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[2,2],[[]],0,[1,3],[4],[4],[1],[[],5],[[1,6,3]],[[2,2],3],[4,7],[[2,8],[[10,[9]]]],[[11,8],12],[[6,8],[[10,[9]]]],[[]],[[]],[[]],[[]],[[]],[[]],[13,[[10,[2]]]],[2,[[16,[[15,[[14,[4]]]]]]]],[1,17],[[1,[18,[17]]],19],[[2,1],[[16,[[15,[[14,[4]]]]]]]],[[]],[[]],[[]],[[]],[[]],[[]],0,[20,1],[1,4],[[1,17]],[[1,[18,[17]]]],[[1,13]],[[4,[18,[17]]],[[7,[19]]]],[1,3],[[[15,[[14,[4]]]],21,22],[[10,[13]]]],[[[23,[2]]],[[23,[2]]]],[[4,[23,[5]]],[[10,[11]]]],[2,[[16,[1]]]],[[]],[[],10],[[],10],[[],10],[13,[[10,[2]]]],[20,[[10,[2]]]],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],10],[[],24],[[],24],[[],24],[[],24],[[],24],[[],24],[[4,[18,[17]]],[[7,[19]]]],[[1,13],[[10,[9]]]],[[4,13],12]],"c":[],"p":[[3,"SerialPortBasic"],[4,"SerialPortAddress"],[15,"bool"],[3,"SerialPort"],[3,"DataChunk"],[4,"SerialPortInterruptEvent"],[6,"Result"],[3,"Formatter"],[3,"Error"],[4,"Result"],[3,"DataSenderAlreadyExists"],[6,"Result"],[15,"str"],[6,"IrqSafeMutex"],[3,"Arc"],[4,"Option"],[15,"u8"],[15,"slice"],[15,"usize"],[15,"u16"],[6,"InterruptNumber"],[6,"HandlerFunc"],[3,"Sender"],[3,"TypeId"]]},\
 "serial_port_basic":{"doc":"Support for basic serial port access, including …","t":"NNNNNNDEENNLLLLLLLLLLLLLLLLLLLLLLLLLLLLFLLLLLLLLLLLL","n":["COM1","COM2","COM3","COM4","DataReceived","ErrorOrBreak","SerialPort","SerialPortAddress","SerialPortInterruptEvent","StatusChange","TransmitterEmpty","base_port_address","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","clone","data_available","drop","enable_interrupt","eq","fmt","fmt","from","from","from","from_str","in_byte","in_bytes","into","into","into","new","out_byte","out_bytes","out_str","ready_to_transmit","take_serial_port","try_from","try_from","try_from","try_from","try_from","try_into","try_into","try_into","type_id","type_id","type_id","write_str"],"q":[[0,"serial_port_basic"]],"d":["The base port I/O address for the COM1 serial port.","The base port I/O address for the COM2 serial port.","The base port I/O address for the COM3 serial port.","The base port I/O address for the COM4 serial port.","","","A serial port and its various data and control registers.","The base port I/O addresses for COM serial ports.","The types of events that can trigger an interrupt on a …","","","","","","","","","","","Returns true if the serial port has data available to read.","","Enable or disable interrupts on this serial port for …","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","Read one byte from the serial port, blocking until data is …","Reads multiple bytes from the serial port into the given …","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Creates and returns a new serial port structure,  and …","Write the given byte to the serial port, blocking until …","Write the given bytes to the serial port, blocking until …","Write the given string to the serial port, blocking until …","Returns true if the serial port is ready to transmit a …","Takes ownership of the SerialPort specified by the given …","","","","","","","","","","","",""],"i":[2,2,2,2,4,4,0,0,0,4,4,1,1,2,4,1,2,4,2,1,1,1,2,2,4,1,2,4,2,1,1,1,2,4,1,1,1,1,1,0,1,2,2,2,4,1,2,4,1,2,4,1],"f":[0,0,0,0,0,0,0,0,0,0,0,[1,2],[[]],[[]],[[]],[[]],[[]],[[]],[2,2],[1,3],[1],[[1,4,3]],[[2,2],3],[[2,5],6],[[4,5],6],[[]],[[]],[[]],[7,[[8,[2]]]],[1,9],[[1,[10,[9]]],11],[[]],[[]],[[]],[12,1],[[1,9]],[[1,[10,[9]]]],[[1,7]],[1,3],[2,[[13,[1]]]],[[],8],[7,[[8,[2]]]],[12,[[8,[2]]]],[[],8],[[],8],[[],8],[[],8],[[],8],[[],14],[[],14],[[],14],[[1,7],6]],"c":[],"p":[[3,"SerialPort"],[4,"SerialPortAddress"],[15,"bool"],[4,"SerialPortInterruptEvent"],[3,"Formatter"],[6,"Result"],[15,"str"],[4,"Result"],[15,"u8"],[15,"slice"],[15,"usize"],[15,"u16"],[4,"Option"],[3,"TypeId"]]},\
 "shapes":{"doc":"This crate defines the basic shapes used for display.","t":"DDLLLLLLLMLLLLLLLLLLLLLLLLLLLMLLLLLLLMM","n":["Coord","Rectangle","add","add","add","borrow","borrow","borrow_mut","borrow_mut","bottom_right","clone","clone","cmp","eq","eq","fmt","fmt","from","from","hash","hash","height","into","into","new","partial_cmp","sub","sub","sub","top_left","try_from","try_from","try_into","try_into","type_id","type_id","width","x","y"],"q":[[0,"shapes"]],"d":["A 2-D integer coordinate.","A rectangle given by its top-left coordinate and …","","","","","","","","The bottom-right point","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","","","Returns the height of this Rectangle.","Calls U::from(self).","Calls U::from(self).","Creates a new coordinate.","","","","","The top-left point","","","","","","","Returns the width of this Rectangle.","The x coordinate","The y coordinate"],"i":[0,0,1,1,2,1,2,1,2,2,1,2,1,1,2,1,2,1,2,1,2,2,1,2,1,1,1,1,2,2,1,2,1,2,1,2,2,1,1],"f":[0,0,[[1,1],1],[1,1],[[2,1],2],[[]],[[]],[[]],[[]],0,[1,1],[2,2],[[1,1],3],[[1,1],4],[[2,2],4],[[1,5],6],[[2,5],6],[[]],[[]],[[1,7]],[[2,7]],[2,8],[[]],[[]],[[9,9],1],[[1,1],[[10,[3]]]],[1,1],[[1,1],1],[[2,1],2],0,[[],11],[[],11],[[],11],[[],11],[[],12],[[],12],[2,8],0,0],"c":[],"p":[[3,"Coord"],[3,"Rectangle"],[4,"Ordering"],[15,"bool"],[3,"Formatter"],[6,"Result"],[8,"Hasher"],[15,"usize"],[15,"isize"],[4,"Option"],[4,"Result"],[3,"TypeId"]]},\
 "signal_handler":{"doc":"Signal handlers for CPU exceptions/errors, like …","t":"DNNENNNNEDZLLLLLLLLLLLLLLLLLLMLLLLLLLLLLMLLLLLFMMFLLLLLLLLLLLLLLLMM","n":["AlreadyRegistered","ArithmeticError","BusError","ErrorCode","IllegalInstruction","InvalidAddress","Other","PageFaultError","Signal","SignalContext","SignalHandler","borrow","borrow","borrow","borrow","borrow_mut","borrow_mut","borrow_mut","borrow_mut","clone","clone","clone","clone_into","clone_into","clone_into","cmp","eq","eq","eq","error_code","fmt","fmt","fmt","fmt","from","from","from","from","from","hash","instruction_pointer","into","into","into","into","partial_cmp","register_signal_handler","signal","stack_pointer","take_signal_handler","to_owned","to_owned","to_owned","try_from","try_from","try_from","try_from","try_into","try_into","try_into","try_into","type_id","type_id","type_id","type_id","accessed_address","pf_error"],"q":[[0,"signal_handler"],[65,"signal_handler::ErrorCode"]],"d":["An error type indicating a handler had already been …","Bad arithmetic operation, e.g., divide by zero. Analogous …","Bad memory alignment, non-existent physical address. …","Possible error codes that may be provided by the CPU …","Invalid opcode, malformed instruction, etc. Analogous to …","Bad virtual address, unexpected page fault. Analogous to …","","","The possible signals that may occur due to CPU exceptions.","Information that is passed to a registered SignalHandler …","A signal handler is a callback function that will be …","","","","","","","","","","","","","","","","","","","","","","","","Returns the argument unchanged.","Returns the argument unchanged.","Returns the argument unchanged.","","Returns the argument unchanged.","","","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","Calls U::from(self).","","Register a SignalHandler callback function for the current …","","","Take the SignalHandler registered for the given signal for …","","","","","","","","","","","","","","","","",""],"i":[0,1,1,0,1,1,3,3,0,0,0,6,1,2,3,6,1,2,3,1,2,3,1,2,3,1,1,2,3,2,6,1,2,3,6,1,2,3,3,1,2,6,1,2,3,1,0,2,2,0,1,2,3,6,1,2,3,6,1,2,3,6,1,2,3,16,16],"f":[0,0,0,0,0,0,0,0,0,0,0,[[]],[[]],[[]],[[]],[[]],[[]],[[]],[[]],[1,1],[2,2],[3,3],[[]],[[]],[[]],[[1,1],4],[[1,1],5],[[2,2],5],[[3,3],5],0,[[6,7],8],[[1,7],8],[[2,7],8],[[3,7],8],[[]],[[]],[[]],[9,3],[[]],[[1,10]],0,[[]],[[]],[[]],[[]],[[1,1],[[11,[4]]]],[[1,[13,[12]]],[[14,[6]]]],0,0,[1,[[11,[[13,[12]]]]]],[[]],[[]],[[]],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],14],[[],15],[[],15],[[],15],[[],15],0,0],"c":[],"p":[[4,"Signal"],[3,"SignalContext"],[4,"ErrorCode"],[4,"Ordering"],[15,"bool"],[3,"AlreadyRegistered"],[3,"Formatter"],[6,"Result"],[15,"u64"],[8,"Hasher"],[4,"Option"],[25,"SignalHandler"],[3,"Box"],[4,"Result"],[3,"TypeId"],[13,"PageFaultError"]]},\
diff --git a/doc/serial_port/struct.SerialPort.html b/doc/serial_port/struct.SerialPort.html
index abffc6b15e..25f20d0f88 100644
--- a/doc/serial_port/struct.SerialPort.html
+++ b/doc/serial_port/struct.SerialPort.html
@@ -43,20 +43,20 @@ 
        Special characters
 if there are no bytes available to be read, indicating that the read would block.
        
 
      source§
      fn read(&mut self, buf: &mut [u8]) -> Result<usize>
      Pull some bytes from this source into the specified buffer, returning
 how many bytes were read. Read more
      §
      fn read_to_end(&mut self, buf: &mut Vec<u8, Global>) -> Result<usize, Error>
      Read all bytes until EOF in this source, placing them into buf. Read more
      §
      fn read_to_string(&mut self, buf: &mut String) -> Result<usize, Error>
      Read all bytes until EOF in this source, appending them to buf. Read more
      §
      unsafe fn initializer(&self) -> Initializer
      Determines if this Reader can work with buffers of uninitialized
-memory. Read more
      §
      fn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Error>
      Read the exact number of bytes required to fill buf. Read more
      §
      fn by_ref(&mut self) -> &mut Selfwhere
+memory. Read more
      §
      fn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Error>
      Read the exact number of bytes required to fill buf. Read more
      §
      fn by_ref(&mut self) -> &mut Selfwhere
     Self: Sized,
      Creates a “by reference” adaptor for this instance of Read. Read more
      §
      fn bytes(self) -> Bytes<Self>where
     Self: Sized,
      Transforms this Read instance to an Iterator over its bytes. Read more
      §
      fn chain<R>(self, next: R) -> Chain<Self, R>where
     R: Read,
     Self: Sized,
      Creates an adaptor which will chain this stream with another. Read more
      §
      fn take(self, limit: u64) -> Take<Self>where
-    Self: Sized,
      Creates an adaptor which will read at most limit bytes from it. Read more
      source§
      impl Write for SerialPort
      A blocking implementation of [core2::io::Write] that will write bytes from the given buf
+    Self: Sized,
    Creates an adaptor which will read at most limit bytes from it. Read more
    source§
    impl Write for SerialPort
    Forward the implementation of core::fmt::Write to the inner SerialPortBasic.
    
+
    source§
    fn write_str(&mut self, s: &str) -> Result
    Writes a string slice into this writer, returning whether the write
+succeeded. Read more
    1.1.0 · source§
    fn write_char(&mut self, c: char) -> Result<(), Error>
    Writes a char into this writer, returning whether the write succeeded. Read more
    1.0.0 · source§
    fn write_fmt(&mut self, args: Arguments<'_>) -> Result<(), Error>
    Glue for usage of the write! macro with implementors of this trait. Read more
    source§
    impl Write for SerialPort
    A blocking implementation of [core2::io::Write] that will write bytes from the given buf
 to the SerialPort, waiting until it is ready to transfer all bytes. 
    
 
    The flush() function is a no-op, since the SerialPort does not have buffering. 
    
 
    source§
    fn write(&mut self, buf: &[u8]) -> Result<usize>
    Write a buffer into this writer, returning how many bytes were written. Read more
    source§
    fn flush(&mut self) -> Result<()>
    Flush this output stream, ensuring that all intermediately buffered
-contents reach their destination. Read more
    §
    fn write_all(&mut self, buf: &[u8]) -> Result<(), Error>
    Attempts to write an entire buffer into this writer. Read more
    §
    fn write_fmt(&mut self, fmt: Arguments<'_>) -> Result<(), Error>
    Writes a formatted string into this writer, returning any error
-encountered. Read more
    §
    fn by_ref(&mut self) -> &mut Selfwhere
-    Self: Sized,
    Creates a “by reference” adaptor for this instance of Write. Read more
    source§
    impl Write for SerialPort
    Forward the implementation of core::fmt::Write to the inner SerialPortBasic.
    
-
    source§
    fn write_str(&mut self, s: &str) -> Result
    Writes a string slice into this writer, returning whether the write
-succeeded. Read more
    1.1.0 · source§
    fn write_char(&mut self, c: char) -> Result<(), Error>
    Writes a char into this writer, returning whether the write succeeded. Read more
    1.0.0 · source§
    fn write_fmt(&mut self, args: Arguments<'_>) -> Result<(), Error>
    Glue for usage of the write! macro with implementors of this trait. Read more
    Auto Trait Implementations§
    Blanket Implementations§
    source§
    impl<T> Any for Twhere
+contents reach their destination. Read more
    §
    fn write_all(&mut self, buf: &[u8]) -> Result<(), Error>
    Attempts to write an entire buffer into this writer. Read more
    §
    fn write_fmt(&mut self, fmt: Arguments<'_>) -> Result<(), Error>
    Writes a formatted string into this writer, returning any error
+encountered. Read more
    §
    fn by_ref(&mut self) -> &mut Selfwhere
+    Self: Sized,
    Creates a “by reference” adaptor for this instance of Write. Read more

    Auto Trait Implementations§

    Blanket Implementations§

    source§

    impl<T> Any for Twhere T: 'static + ?Sized,

    source§

    fn type_id(&self) -> TypeId

    Gets the TypeId of self. Read more
    source§

    impl<T> Borrow<T> for Twhere T: ?Sized,

    source§

    fn borrow(&self) -> &T

    Immutably borrows from an owned value. Read more
    source§

    impl<T> BorrowMut<T> for Twhere T: ?Sized,

    source§

    fn borrow_mut(&mut self) -> &mut T

    Mutably borrows from an owned value. Read more
    source§

    impl<T> From<T> for T

    source§

    fn from(t: T) -> T

    Returns the argument unchanged.

    diff --git a/doc/spawn/fn.cleanup_bootstrap_tasks.html b/doc/spawn/fn.cleanup_bootstrap_tasks.html index ca6b17de8e..da64e74f65 100644 --- a/doc/spawn/fn.cleanup_bootstrap_tasks.html +++ b/doc/spawn/fn.cleanup_bootstrap_tasks.html @@ -1,4 +1,4 @@ -cleanup_bootstrap_tasks in spawn - Rust

    Function spawn::cleanup_bootstrap_tasks

    source · 
    pub fn cleanup_bootstrap_tasks(num_tasks: u32) -> Result<(), &'static str>
    Expand description

    Spawns a dedicated task to cleanup all bootstrap tasks +cleanup_bootstrap_tasks in spawn - Rust

    Function spawn::cleanup_bootstrap_tasks

    source · 
    pub fn cleanup_bootstrap_tasks(num_tasks: u32) -> Result<(), &'static str>
    Expand description

    Spawns a dedicated task to cleanup all bootstrap tasks by reaping them, i.e., taking their exit value.

    This allows them to be fully dropped and cleaned up safely, as it would be invalid to reap and cleanup bootstrap tasks diff --git a/doc/spawn/fn.init.html b/doc/spawn/fn.init.html index 373621c4cd..cee88398e5 100644 --- a/doc/spawn/fn.init.html +++ b/doc/spawn/fn.init.html @@ -1,4 +1,4 @@ -init in spawn - Rust

    Function spawn::init

    source · 
    pub fn init(
+init in spawn - Rust
    Function spawn::init
    source · 
    pub fn init(
     kernel_mmi_ref: MmiRef,
     cpu_id: CpuId,
     stack: NoDrop<Stack>
diff --git a/doc/spawn/fn.new_application_task_builder.html b/doc/spawn/fn.new_application_task_builder.html
index bbb3170cdb..7613c5cf1c 100644
--- a/doc/spawn/fn.new_application_task_builder.html
+++ b/doc/spawn/fn.new_application_task_builder.html
@@ -1,4 +1,4 @@
-new_application_task_builder in spawn - Rust
    Function spawn::new_application_task_builder
    source · 
    pub fn new_application_task_builder(
+new_application_task_builder in spawn - Rust
    Function spawn::new_application_task_builder
    source · 
    pub fn new_application_task_builder(
     crate_object_file: Path,
     new_namespace: Option<Arc<CrateNamespace>>
 ) -> Result<TaskBuilder<fn(_: Vec<String>) -> isize, Vec<String>, isize>, &'static str>
    Expand description
    Creates a builder for a new application Task. 
    
diff --git a/doc/spawn/fn.new_task_builder.html b/doc/spawn/fn.new_task_builder.html
index c462ee97c7..e4f15a4cfc 100644
--- a/doc/spawn/fn.new_task_builder.html
+++ b/doc/spawn/fn.new_task_builder.html
@@ -1,4 +1,4 @@
-new_task_builder in spawn - Rust
    Function spawn::new_task_builder
    source · 
    pub fn new_task_builder<F, A, R>(func: F, argument: A) -> TaskBuilder<F, A, R>where
+new_task_builder in spawn - Rust
    Function spawn::new_task_builder
    source · 
    pub fn new_task_builder<F, A, R>(func: F, argument: A) -> TaskBuilder<F, A, R>where
     A: Send + 'static,
     R: Send + 'static,
     F: FnOnce(A) -> R,
    Expand description
    Creates a builder for a new Task that starts at the given entry point function func
diff --git a/doc/spawn/index.html b/doc/spawn/index.html
index 30917ba1a4..8c1e029dca 100644
--- a/doc/spawn/index.html
+++ b/doc/spawn/index.html
@@ -1,4 +1,4 @@
-spawn - Rust
    Crate spawn
    source · 
    Expand description
    This crate offers routines for spawning new tasks
+spawn - Rust
    Crate spawn
    source · 
    Expand description
    This crate offers routines for spawning new tasks
 and convenient builder patterns for customizing new tasks. 
    
 
    The two functions of interest to create a TaskBuilder are:
    
 
    //! Routines for booting up secondary CPU cores, 
 //! aka application processors (APs) on x86_64.
 //! 
@@ -189,6 +192,8 @@
     nmi_flags: u16,
 ) -> ! {
     irq_safety::disable_interrupts();
+    #[cfg(target_arch = "aarch64")]
+    irq_safety::disable_fast_interrupts();
 
     info!("Booted CPU {}, proc: {}, stack: {:#X} to {:#X}, nmi_lint: {}, nmi_flags: {:#X}",
         cpu_id, processor_id, _stack_start, _stack_end, nmi_lint, nmi_flags
@@ -237,6 +242,7 @@
 
     #[cfg(target_arch = "aarch64")] {
         interrupts::init_ap();
+        irq_safety::enable_fast_interrupts();
 
         // Register this CPU as online in the system
         // This is the equivalent of `LocalApic::init` on aarch64
diff --git a/doc/src/captain/lib.rs.html b/doc/src/captain/lib.rs.html
index c46e0db134..7dc9d979af 100644
--- a/doc/src/captain/lib.rs.html
+++ b/doc/src/captain/lib.rs.html
@@ -239,6 +239,7 @@
 239
 240
 241
+242
 
    //! The main initialization routine and setup logic of the OS. 
 //!
 //! The `captain` steers the ship of Theseus, meaning that it contains basic logic 
@@ -364,6 +365,7 @@
         interrupt_controller::init()?;
 
         interrupts::init()?;
+        irq_safety::enable_fast_interrupts();
 
         // register BSP CpuId
         cpu::register_cpu(true)?;
diff --git a/doc/src/first_application/lib.rs.html b/doc/src/first_application/lib.rs.html
index 3e770e064f..b1c040ac46 100644
--- a/doc/src/first_application/lib.rs.html
+++ b/doc/src/first_application/lib.rs.html
@@ -57,6 +57,7 @@
 57
 58
 59
+60
 
    //! This crate contains a simple routine to start the first application (or set of applications). 
 //! 
 //! This should be invoked at or towards the end of the kernel initialization procedure. 
@@ -87,7 +88,8 @@
 
 /// See the crate-level docs and this crate's `Cargo.toml` for more.
 const FIRST_APPLICATION_CRATE_NAME: &str = {
-    #[cfg(target_arch = "x86_64")] { "shell-" }
+    #[cfg(all(target_arch = "x86_64", feature = "qemu_test"))] { "qemu_test-" }
+    #[cfg(all(target_arch = "x86_64", not(feature = "qemu_test")))] { "shell-" }
     #[cfg(target_arch = "aarch64")] { "hello-" }
 };
 
diff --git a/doc/src/interrupt_controller/lib.rs.html b/doc/src/interrupt_controller/lib.rs.html
index 15176da847..43a2f7d9dc 100644
--- a/doc/src/interrupt_controller/lib.rs.html
+++ b/doc/src/interrupt_controller/lib.rs.html
@@ -97,6 +97,23 @@
 97
 98
 99
+100
+101
+102
+103
+104
+105
+106
+107
+108
+109
+110
+111
+112
+113
+114
+115
+116
 
    #![no_std]
 #![allow(unused_variables, unused_mut)]
 #![feature(array_try_from_fn)]
@@ -151,7 +168,7 @@
     fn set_destination(
         &self,
         sys_int_num: InterruptNumber,
-        destination: CpuId,
+        destination: Option<CpuId>,
         priority: Priority,
     ) -> Result<(), &'static str>;
 }
@@ -159,13 +176,6 @@
 pub trait LocalInterruptControllerApi {
     fn get() -> &'static Self;
 
-    /// Aarch64-specific way to initialize the secondary CPU interfaces.
-    ///
-    /// Must be called once from every secondary CPU.
-    ///
-    /// Always panics on x86_64.
-    fn init_secondary_cpu_interface(&self);
-
     fn id(&self) -> LocalInterruptControllerId;
     fn get_local_interrupt_priority(&self, num: InterruptNumber) -> Priority;
     fn set_local_interrupt_priority(&self, num: InterruptNumber, priority: Priority);
@@ -178,22 +188,46 @@
     /// If it's None, all CPUs except the sender receive the interrupt.
     fn send_ipi(&self, num: InterruptNumber, dest: InterruptDestination);
 
+    /// Tell the interrupt controller that the current interrupt has been handled.
+    fn end_of_interrupt(&self, number: InterruptNumber);
+}
+
+/// AArch64-specific methods of a local interrupt controller
+pub trait AArch64LocalInterruptControllerApi {
+    /// Same as [`LocalInterruptControllerApi::enable_local_interrupt`] but for fast interrupts (FIQs).
+    fn enable_fast_local_interrupt(&self, num: InterruptNumber, enabled: bool);
+
+    /// Same as [`LocalInterruptControllerApi::send_ipi`] but for fast interrupts (FIQs).
+    fn send_fast_ipi(&self, num: InterruptNumber, dest: InterruptDestination);
+
     /// Reads the minimum priority for an interrupt to reach this CPU.
-    ///
-    /// Note: aarch64-only, at the moment.
     fn get_minimum_priority(&self) -> Priority;
 
     /// Changes the minimum priority for an interrupt to reach this CPU.
-    ///
-    /// Note: aarch64-only, at the moment.
     fn set_minimum_priority(&self, priority: Priority);
 
     /// Aarch64-specific way to read the current pending interrupt number & priority.
+    fn acknowledge_interrupt(&self) -> Option<(InterruptNumber, Priority)>;
+
+    /// Aarch64-specific way to initialize the secondary CPU interfaces.
     ///
-    /// Always panics on x86_64.
-    fn acknowledge_interrupt(&self) -> (InterruptNumber, Priority);
+    /// Must be called once from every secondary CPU.
+    fn init_secondary_cpu_interface(&self);
 
-    /// Tell the interrupt controller that the current interrupt has been handled.
-    fn end_of_interrupt(&self, number: InterruptNumber);
+    /// Same as [`Self::acknowledge_interrupt`] but for fast interrupts (FIQs)
+    ///
+    /// # Safety
+    ///
+    /// This is unsafe because it circumvents the internal Mutex.
+    /// It must only be used by the `interrupts` crate when handling an FIQ.
+    unsafe fn acknowledge_fast_interrupt(&self) -> Option<(InterruptNumber, Priority)>;
+
+    /// Same as [`LocalInterruptControllerApi::end_of_interrupt`] but for fast interrupts (FIQs)
+    ///
+    /// # Safety
+    ///
+    /// This is unsafe because it circumvents the internal Mutex.
+    /// It must only be used by the `interrupts` crate when handling an FIQ.
+    unsafe fn end_of_fast_interrupt(&self, number: InterruptNumber);
 }
    \ No newline at end of file diff --git a/doc/src/interrupt_controller/x86_64.rs.html b/doc/src/interrupt_controller/x86_64.rs.html index d0d43539d6..5570367556 100644 --- a/doc/src/interrupt_controller/x86_64.rs.html +++ b/doc/src/interrupt_controller/x86_64.rs.html @@ -120,20 +120,6 @@ 120 121 122 -123 -124 -125 -126 -127 -128 -129 -130 -131 -132 -133 -134 -135 -136 
    use super::*;
 
 use {
@@ -191,7 +177,7 @@
     fn set_destination(
         &self,
         sys_int_num: InterruptNumber,
-        destination: CpuId,
+        destination: Option<CpuId>,
         priority: Priority,
     ) -> Result<(), &'static str> {
         let mut int_ctlr = get_ioapic(self.id).expect("BUG: set_destination(): get_ioapic() returned None");
@@ -199,7 +185,11 @@
         // no support for priority on x86_64
         let _ = priority;
 
-        int_ctlr.set_irq(sys_int_num, destination.into(), sys_int_num /* <- is this correct? */)
+        if let Some(destination) = destination {
+            int_ctlr.set_irq(sys_int_num, destination.into(), sys_int_num)
+        } else {
+            Err("SystemInterruptController::set_destination: todo on x86: set the IOREDTBL MASK bit")
+        }
     }
 }
 
@@ -209,10 +199,6 @@
         unimplemented!()
     }
 
-    fn init_secondary_cpu_interface(&self) {
-        panic!("This must not be used on x86_64")
-    }
-
     fn id(&self) -> LocalInterruptControllerId {
         let int_ctlr = get_my_apic().expect("BUG: id(): get_my_apic() returned None");
         let int_ctlr = int_ctlr.read();
@@ -248,20 +234,6 @@
         });
     }
 
-    fn get_minimum_priority(&self) -> Priority {
-        // No priority support on x86_64
-        Priority
-    }
-
-    fn set_minimum_priority(&self, priority: Priority) {
-        // No priority support on x86_64
-        let _ = priority;
-    }
-
-    fn acknowledge_interrupt(&self) -> (InterruptNumber, Priority) {
-        panic!("This must not be used on x86_64")
-    }
-
     fn end_of_interrupt(&self, _number: InterruptNumber) {
         let mut int_ctlr = get_my_apic().expect("BUG: end_of_interrupt(): get_my_apic() returned None");
         let mut int_ctlr = int_ctlr.write();
diff --git a/doc/src/irq_safety/held_interrupts.rs.html b/doc/src/irq_safety/held_interrupts.rs.html
index f51bcd3234..ad77f83c5c 100644
--- a/doc/src/irq_safety/held_interrupts.rs.html
+++ b/doc/src/irq_safety/held_interrupts.rs.html
@@ -1,4 +1,4 @@
-held_interrupts.rs - source
    1
+held_interrupts.rs - source
    1
 2
 3
 4
@@ -89,21 +89,77 @@
 89
 90
 91
-
    // Inspired by Tifflin OS
+92
+93
+94
+95
+96
+97
+98
+99
+100
+101
+102
+103
+104
+105
+106
+107
+108
+109
+110
+111
+112
+113
+114
+115
+116
+117
+118
+119
+120
+121
+122
+123
+124
+125
+126
+127
+128
+129
+130
+131
+132
+133
+134
+135
+136
+137
+138
+139
+
    // Originally inspired by Tifflin OS.
 
 use core::{
     arch::asm,
     sync::atomic::{compiler_fence, Ordering},
 };
 
-/// A handle for frozen interrupts
+/// A guard type for withholding regular interrupts on the current CPU.
+///
+/// When dropped, interrupts are returned to their prior state rather than
+/// just blindly re-enabled. For example, if interrupts were enabled
+/// when [`hold_interrupts()`] was invoked, interrupts will be re-enabled
+/// when this type is dropped.
 #[derive(Default)]
 pub struct HeldInterrupts(bool);
 
 impl !Send for HeldInterrupts {}
 
-/// Prevent interrupts from firing until the return value is dropped (goes out of scope).
-/// After it is dropped, the interrupts are returned to their prior state, not blindly re-enabled.
+/// Prevents regular interrupts from occurring until the returned
+/// `HeldInterrupts` object is dropped.
+///
+/// This function only affects *regular* IRQs;
+/// it does not affect NMIs or fast interrupts (FIQs on aarch64).
 pub fn hold_interrupts() -> HeldInterrupts {
     let enabled = interrupts_enabled();
     let retval = HeldInterrupts(enabled);
@@ -121,7 +177,11 @@
     }
 }
 
-// Rust wrappers around the x86-family of interrupt-related instructions.
+/// Unconditionally enables *regular* interrupts (IRQs),
+/// not NMIs or fast interrupts (FIQs on aarch64).
+///
+/// To enable fast interrupts (FIQs) on aarch64,
+/// use the [`enable_fast_interrupts()`] interrupts.
 #[inline(always)]
 pub fn enable_interrupts() {
     compiler_fence(Ordering::SeqCst);
@@ -130,23 +190,28 @@
         asm!("sti", options(nomem, nostack));
 
         #[cfg(target_arch = "aarch64")]
-        // Clear the i and f bits.
-        asm!("msr daifclr, #3", options(nomem, nostack, preserves_flags));
+        // Clear the I bit, which is bit 1 of the DAIF bitset.
+        asm!("msr daifclr, #2", options(nomem, nostack, preserves_flags));
 
         #[cfg(target_arch = "arm")]
         asm!("cpsie i", options(nomem, nostack, preserves_flags));
     }
 }
 
-#[inline(always)]
+/// Unconditionally disables *regular* interrupts (IRQs),
+/// not NMIs or fast interrupts (FIQs on aarch64).
+///
+/// To disable fast interrupts (FIQs) on aarch64,
+/// use the [`disable_fast_interrupts()`] interrupts.
+#[inline(always)]
 pub fn disable_interrupts() {
     unsafe {
         #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
         asm!("cli", options(nomem, nostack));
 
         #[cfg(target_arch = "aarch64")]
-        // Set the i and f bits.
-        asm!("msr daifset, #3", options(nomem, nostack, preserves_flags));
+        // Set the I bit, which is bit 1 of the DAIF bitset.
+        asm!("msr daifset, #2", options(nomem, nostack, preserves_flags));
 
         #[cfg(target_arch = "arm")]
         asm!("cpsid i", options(nomem, nostack, preserves_flags));
@@ -154,7 +219,39 @@
     compiler_fence(Ordering::SeqCst);
 }
 
-#[inline(always)]
+/// Unconditionally enables fast interrupts (FIQs); aarch64-only.
+///
+/// On aarch64, NMIs are only available as a hardware extension,
+/// therefore we only deal with FIQs here, which are widely supported.
+#[inline(always)]
+#[cfg(target_arch = "aarch64")]
+pub fn enable_fast_interrupts() {
+    compiler_fence(Ordering::SeqCst);
+    unsafe {
+        // Clear the F bit, which is bit 0 of the DAIF bitset.
+        asm!("msr daifclr, #1", options(nomem, nostack, preserves_flags));
+    }
+}
+
+/// Unconditionally disables fast interrupts (FIQs); aarch64-only.
+///
+/// On aarch64, NMIs are only available as a hardware extension,
+/// therefore we only deal with FIQs here, which are widely supported.
+#[inline(always)]
+#[cfg(target_arch = "aarch64")]
+pub fn disable_fast_interrupts() {
+    unsafe {
+        // Clear the F bit, which is bit 0 of the DAIF bitset.
+        asm!("msr daifset, #1", options(nomem, nostack, preserves_flags));
+    }
+    compiler_fence(Ordering::SeqCst);
+}
+
+/// Returns whether regular interrupts are enabled on the current CPU.
+///
+/// This only checks whether *regular* interrupts are enabled,
+/// not NMIs or fast interrupts (FIQs on aarch64).
+#[inline(always)]
 pub fn interrupts_enabled() -> bool {
     #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
     unsafe {
@@ -168,9 +265,8 @@
     unsafe {
         let daif: usize;
         asm!("mrs {}, daif", out(reg) daif, options(nomem, nostack, preserves_flags));
-        // The flags are stored in bits 7-10. We only care about i and f,
-        // stored in bits 7 and 8.
-        daif >> 6 & 0x3 == 0
+        // PSTATE flags of interest are in bits [6:9]; we only care about I, stored in bit 7.
+        (daif & (1 << 7)) == 0
     }
 
     #[cfg(target_arch = "arm")]
diff --git a/doc/src/irq_safety/lib.rs.html b/doc/src/irq_safety/lib.rs.html
index 257e927934..61823dcf79 100644
--- a/doc/src/irq_safety/lib.rs.html
+++ b/doc/src/irq_safety/lib.rs.html
@@ -1,4 +1,4 @@
-lib.rs - source
    1
+lib.rs - source
    1
 2
 3
 4
diff --git a/doc/src/irq_safety/mutex_irqsafe.rs.html b/doc/src/irq_safety/mutex_irqsafe.rs.html
index a2073fd7ac..a9122cf90d 100644
--- a/doc/src/irq_safety/mutex_irqsafe.rs.html
+++ b/doc/src/irq_safety/mutex_irqsafe.rs.html
@@ -1,4 +1,4 @@
-mutex_irqsafe.rs - source
    1
+mutex_irqsafe.rs - source
    1
 2
 3
 4
diff --git a/doc/src/irq_safety/rwlock_irqsafe.rs.html b/doc/src/irq_safety/rwlock_irqsafe.rs.html
index 0bc5effae1..0de830b85a 100644
--- a/doc/src/irq_safety/rwlock_irqsafe.rs.html
+++ b/doc/src/irq_safety/rwlock_irqsafe.rs.html
@@ -1,4 +1,4 @@
-rwlock_irqsafe.rs - source
    1
+rwlock_irqsafe.rs - source
    1
 2
 3
 4
diff --git a/doc/src/memory_aarch64/lib.rs.html b/doc/src/memory_aarch64/lib.rs.html
index e3957b66a1..9c81dacd91 100644
--- a/doc/src/memory_aarch64/lib.rs.html
+++ b/doc/src/memory_aarch64/lib.rs.html
@@ -482,6 +482,33 @@
 482
 483
 484
+485
+486
+487
+488
+489
+490
+491
+492
+493
+494
+495
+496
+497
+498
+499
+500
+501
+502
+503
+504
+505
+506
+507
+508
+509
+510
+511
 
    //! This crate implements the virtual memory subsystem interfaces for Theseus on aarch64.
 //! `memory` uses this crate to get the memory layout and do other arch-specific operations on aarch64.  
 //! 
@@ -500,35 +527,62 @@
 use boot_info::{BootInformation, ElfSection};
 use kernel_config::memory::KERNEL_OFFSET;
 
-#[cfg(any(target_arch = "aarch64", doc))]
+#[cfg(any(doc, target_arch = "aarch64"))]
 use core::arch::asm;
 
 const THESEUS_ASID: u16 = 0;
 
-#[cfg(any(target_arch = "aarch64", doc))]
-/// Flushes the specific virtual address in TLB.
+/// Flushes the specific virtual address in TLB.
 ///
 /// TLBI => tlb invalidate instruction
-/// "va" => all translations at execution level
-///         using the supplied address
+/// "va" => all translations at execution level using the supplied address
 /// "e1" => execution level
+#[cfg(any(doc, target_arch = "aarch64"))]
 pub fn tlb_flush_virt_addr(vaddr: VirtualAddress) {
-    #[cfg(target_arch = "aarch64")]
-    unsafe { asm!("tlbi vae1, {}", in(reg) vaddr.value()) };
+    // unsure here: where should the original address ASID go?
+    // it's zero in theseus so it's not important for us
+
+    // about the 48 bit shift:
+    // If the implementation supports 16 bits of ASID, then the
+    // upper 8 bits of the ASID must be written to 0 by software
+    // when the context being invalidated only uses 8 bits
+    let value = ((THESEUS_ASID as usize) << 48) | (vaddr.value() >> 12);
+
+    unsafe {
+        asm!("tlbi vae1, {}", in(reg) value)
+    };
+}
+
+/* NO SUPPORT IN QEMU
+
+/// Flushes the specific virtual address in the TLB of any CPU
+/// in the outer shareable domain.
+///
+/// TLBI => tlb invalidate instruction
+/// "va" => all translations at execution level using the supplied address
+/// "e1" => execution level
+/// "os" => outer shareable domain
+#[cfg(any(doc, target_arch = "aarch64"))]
+pub fn tlb_flush_virt_addr_all_cpus(vaddr: VirtualAddress) {
+    unsafe {
+        let value = ((THESEUS_ASID as usize) << 48) | (vaddr.value() >> 12);
+        asm!(".arch armv8.4-a\ntlbi vae1os, {}", in(reg) value)
+    };
 }
 
-#[cfg(any(target_arch = "aarch64", doc))]
+*/
+
 /// Flushes all TLB entries with Theseus' ASID (=0).
 ///
 /// TLBI => tlb invalidate instruction
 /// "asid" => all entries with specific ASID
 /// "e1" => execution level
+#[cfg(any(doc, target_arch = "aarch64"))]
 pub fn tlb_flush_by_theseus_asid() {
-    #[cfg(target_arch = "aarch64")]
-    unsafe { asm!("tlbi aside1, {:x}", in(reg) THESEUS_ASID) };
+    unsafe { asm!("tlbi aside1, {:x}", in(reg) THESEUS_ASID) };
 }
 
-#[cfg(any(target_arch = "aarch64", doc))]
+#[cfg(any(doc, target_arch = "aarch64"))]
 pub use tlb_flush_by_theseus_asid as tlb_flush_all;
 
 /// Returns the current top-level page table address.
diff --git a/doc/src/nano_core/lib.rs.html b/doc/src/nano_core/lib.rs.html
index c09cc7ef94..2147960ea4 100644
--- a/doc/src/nano_core/lib.rs.html
+++ b/doc/src/nano_core/lib.rs.html
@@ -286,6 +286,9 @@
 286
 287
 288
+289
+290
+291
 
    //! The aptly-named tiny crate containing the first OS code to run.
 //!
 //! The `nano_core` is very simple, and only does the following things:
@@ -376,6 +379,9 @@
     B: boot_info::BootInformation
 {
     irq_safety::disable_interrupts();
+    #[cfg(target_arch = "aarch64")]
+    irq_safety::disable_fast_interrupts();
+
     println!("nano_core(): Entered early setup. Interrupts disabled.");
 
     #[cfg(target_arch = "x86_64")]
@@ -419,7 +425,7 @@
         let logger_ports = [take_serial_port(SerialPortAddress::COM1)];
         logger::early_init(None, IntoIterator::into_iter(logger_ports).flatten());
         log::info!("initialized early logger with aarch64 serial ports.");
-        println!("nano_core(): initialized early logger  with aarch64 serial ports.");
+        println!("nano_core(): initialized early logger with aarch64 serial ports.");
     }
 
     println!("nano_core(): initialized memory subsystem.");
diff --git a/doc/src/spawn/lib.rs.html b/doc/src/spawn/lib.rs.html
index 1322dc5fb0..894652bb9b 100644
--- a/doc/src/spawn/lib.rs.html
+++ b/doc/src/spawn/lib.rs.html
@@ -1019,6 +1019,11 @@
 1019
 1020
 1021
+1022
+1023
+1024
+1025
+1026
 
    //! This crate offers routines for spawning new tasks
 //! and convenient builder patterns for customizing new tasks. 
 //! 
@@ -1052,6 +1057,7 @@
 use memory::{get_kernel_mmi_ref, MmiRef};
 use stack::Stack;
 use task::{Task, TaskRef, RestartInfo, RunState, JoinableTaskRef, ExitableTaskRef, FailureCleanupFunction};
+use task_struct::ExposedTask;
 use mod_mgmt::{CrateNamespace, SectionType, SECTION_HASH_DELIMITER};
 use path::Path;
 use fs_node::FileOrDir;
@@ -1402,7 +1408,11 @@
         )?;
         // If a Task name wasn't provided, then just use the function's name.
         new_task.name = self.name.unwrap_or_else(|| String::from(core::any::type_name::<F>()));
-    
+
+        let exposed = ExposedTask { task: new_task };
+        exposed.inner().lock().pinned_cpu = self.pin_on_cpu;
+        let ExposedTask { task: mut new_task } = exposed;    
+
         #[cfg(simd_personality)] {  
             new_task.simd = self.simd;
         }
diff --git a/doc/src/tlb_shootdown/lib.rs.html b/doc/src/tlb_shootdown/lib.rs.html
index 88c2c1c3d6..05e8039c98 100644
--- a/doc/src/tlb_shootdown/lib.rs.html
+++ b/doc/src/tlb_shootdown/lib.rs.html
@@ -120,6 +120,12 @@
 120
 121
 122
+123
+124
+125
+126
+127
+128
 
    //! Support for broadcasting and handling TLB shootdown IPIs. 
 
 #![no_std]
@@ -150,7 +156,7 @@
     memory::set_broadcast_tlb_shootdown_cb(broadcast_tlb_shootdown);
 
     #[cfg(target_arch = "aarch64")]
-    interrupts::setup_ipi_handler(tlb_shootdown_ipi_handler, interrupts::TLB_SHOOTDOWN_IPI).unwrap();
+    interrupts::setup_tlb_shootdown_handler(tlb_shootdown_ipi_handler).unwrap();
 }
 
 /// Handles a TLB shootdown IPI requested by another CPU.
@@ -162,7 +168,9 @@
 pub fn handle_tlb_shootdown_ipi() -> bool {
     let pages_to_invalidate = TLB_SHOOTDOWN_IPI_PAGES.read().clone();
     if let Some(pages) = pages_to_invalidate {
-        // log::trace!("handle_tlb_shootdown_ipi(): CPU {}, pages: {:?}", apic::current_cpu(), pages);
+        // Note: logging in a NMI (x86_64) or FIQ (aarch64) context can cause deadlock,
+        // so this should only be used sparingly to help debug problems with TLB shootdowns.
+        // log::trace!("handle_tlb_shootdown_ipi(): CPU {}, pages: {:?}", apic::current_cpu(), pages);
         for page in pages {
             tlb_flush_virt_addr(page.start_address());
         }
@@ -219,7 +227,7 @@
     }
 
     #[cfg(target_arch = "aarch64")]
-    interrupts::send_ipi_to_all_other_cpus(interrupts::TLB_SHOOTDOWN_IPI);
+    interrupts::broadcast_tlb_shootdown_ipi();
 
     // wait for all other cores to handle this IPI
     // it must be a blocking, synchronous operation to ensure stale TLB entries don't cause problems
@@ -233,6 +241,10 @@
 
     // release lock
     TLB_SHOOTDOWN_IPI_LOCK.store(false, Ordering::Release); 
+
+    if false {
+        log::warn!("send_tlb_shootdown_ipi(): from CPU {:?}, complete", cpu::current_cpu());
+    }
 }
 
 /// Interrupt Handler for TLB Shootdowns on aarch64
diff --git a/doc/tlb_shootdown/fn.handle_tlb_shootdown_ipi.html b/doc/tlb_shootdown/fn.handle_tlb_shootdown_ipi.html
index d07160871f..6a23a84c82 100644
--- a/doc/tlb_shootdown/fn.handle_tlb_shootdown_ipi.html
+++ b/doc/tlb_shootdown/fn.handle_tlb_shootdown_ipi.html
@@ -1,4 +1,4 @@
-handle_tlb_shootdown_ipi in tlb_shootdown - Rust
    Function tlb_shootdown::handle_tlb_shootdown_ipi
    source · 
    pub fn handle_tlb_shootdown_ipi() -> bool
    Expand description
    Handles a TLB shootdown IPI requested by another CPU.
    
+handle_tlb_shootdown_ipi in tlb_shootdown - Rust
    Function tlb_shootdown::handle_tlb_shootdown_ipi
    source · 
    pub fn handle_tlb_shootdown_ipi() -> bool
    Expand description
    Handles a TLB shootdown IPI requested by another CPU.
    
 
    There is no need to invoke this directly, it will be called by an IPI interrupt handler.
    
 
    Return
    
 
    Returns true if virtual addresses were actually flushed, false otherwise.
    
diff --git a/doc/tlb_shootdown/index.html b/doc/tlb_shootdown/index.html
index 8ca4c6f133..5b0ef4bcfe 100644
--- a/doc/tlb_shootdown/index.html
+++ b/doc/tlb_shootdown/index.html
@@ -1,2 +1,2 @@
-tlb_shootdown - Rust
    Crate tlb_shootdown
    source · 
    Expand description
    Support for broadcasting and handling TLB shootdown IPIs. 
    
+tlb_shootdown - Rust
    Crate tlb_shootdown
    source · 
    Expand description
    Support for broadcasting and handling TLB shootdown IPIs. 
    
 
    Functions
    • handle_tlb_shootdown_ipi
      Handles a TLB shootdown IPI requested by another CPU.
    • init
      Initializes data, functions, and structures for the TLB shootdown. 
    
\ No newline at end of file
diff --git a/doc/window_inner/struct.WindowInner.html b/doc/window_inner/struct.WindowInner.html
index c492e69fa3..fc75038f62 100644
--- a/doc/window_inner/struct.WindowInner.html
+++ b/doc/window_inner/struct.WindowInner.html
@@ -25,7 +25,7 @@
 
    Implementations§
    source§
    impl WindowInner
    source
    pub fn new(
     coordinate: Coord,
     framebuffer: Framebuffer<AlphaPixel>,
-    event_producer: Queue<Event>
+    event_producer: Queue<Event>
 ) -> WindowInner
    Creates a new WindowInner object backed by the given framebuffer
 and that will be rendered at the given coordinate relative to the screen.
    
 
    source
    pub fn contains(&self, coordinate: Coord) -> bool
    Returns true if the given coordinate (relative to the top-left corner of this window)
@@ -45,7 +45,7 @@
 i.e., the area within the window excluding the title bar and border.
    
 
    The returned Rectangle is expressed relative to this Window’s position.
    
 
    source
    pub fn resize(&mut self, new_position: Rectangle) -> Result<(), &'static str>
    Resizes and moves this window to fit the given Rectangle that describes its new position. 
    
-
    source
    pub fn send_event(&self, event: Event) -> Result<(), Event>
    Sends the given event to this window.
    
+
    source
    pub fn send_event(&self, event: Event) -> Result<(), Event>
    Sends the given event to this window.
    
 
    If the event queue was full, Err(event) is returned.
    
 
    Auto Trait Implementations§
    Blanket Implementations§
    source§
    impl<T> Any for Twhere
     T: 'static + ?Sized,
    source§
    fn type_id(&self) -> TypeId
    Gets the TypeId of self. Read more
    source§
    impl<T> Borrow<T> for Twhere