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playmod2.lst
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playmod2.lst
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1 ; ****************************************************************************
2 ; playmod2.asm (for MSDOS)
3 ; ----------------------------------------------------------------------------
4 ; PLAYMOD2.COM ! ICH AC97 MOD PLAYER & VGA DEMO program by Erdogan TAN
5 ;
6 ; 18/02/2017
7 ;
8 ; [ Last Modification: 20/05/2024 ]
9 ;
10 ; Derived from source code of 'PLAYWAV.COM' ('PLAYWAV.ASM') by Erdogan Tan
11 ; (17/02/2017)
12 ; Modified from 'PLAYMOD.COM' ('playmod.asm') source code
13 ; VIA VT8237 MOD PLAYER & VGA DEMO program by Erdogan TAN
14 ; (15/02/2017)
15 ;
16 ; Derived from source code of 'PLAY.EXE' (TINYPLAY) by Carlos Hasan (1993)
17 ; PLAY.EXE: PLAY.ASM, MODLOAD.ASM, MODPLAY.ASM, SB.ASM
18 ;
19 ; Assembler: NASM 2.11
20 ; ----------------------------------------------------------------------------
21 ; nasm playmod2.asm -l playmod2.lst -o PLAYMOD2.COM
22 ; ****************************************************************************
23
24 ; Tiny MOD Player v0.1b by Carlos Hasan.
25 ; July 14th, 1993.
26
27 ;=============================================================================
28 ; PLAYWAV.ASM / PLAYER.ASM / TINYPLAY.ASM
29 ;=============================================================================
30 ; Audio controller, codec & PCI functions are derived from '.wav file player
31 ; for DOS' source code by Jeff Leyda (PLAYER.EXE), Sep 02, 2002.
32
33 ; TUNELOOP version ; 12/05/2024
34
35 [BITS 16]
36 [org 100h]
37
38 Start:
39 00000000 E8CC00 call DetectICH ; Detect AC97 Audio Device
40 GetFileName: ; Parse the Command line...
41 00000003 BE8000 mov si, 80h
42 00000006 8A1C mov bl, [si]
43 00000008 30FF xor bh, bh
44 0000000A 43 inc bx
45 0000000B C60000 mov byte [si+bx], 0 ; make AsciiZ filename.
46 0000000E 46 inc si
47 ScanName:
48 0000000F AC lodsb
49 00000010 84C0 test al, al
50 00000012 0F84AF00 je pmsg_2017
51 00000016 3C20 cmp al, 20h
52 00000018 74F5 je short ScanName ; scan start of name.
53 0000001A 89F7 mov di, si
54 0000001C 4F dec di
55 ScanPeriod:
56 0000001D AC lodsb
57 0000001E 3C2E cmp al, '.' ; if period NOT found,
58 00000020 7410 je short PrintMesg ; then add a .MOD extension.
59 00000022 84C0 test al, al
60 00000024 75F7 jnz short ScanPeriod
61 00000026 4E dec si
62 SetExt:
63 ;mov byte [si+0], '.'
64 ;mov byte [si+1], 'M'
65 ;mov byte [si+2], 'O'
66 ;mov byte [si+3], 'D'
67 00000027 66C7042E4D4F44 mov dword [si], '.MOD'
68 0000002E C6440400 mov byte [si+4], 0
69
70 PrintMesg:
71 00000032 B80009 mov ax, 0900h ; Prints the Credits Text.
72 ;lea dx, [Credits]
73 00000035 BA[0E0E] mov dx, Credits
74 00000038 CD21 int 21h
75
76 ; 13/05/2024
77 0000003A E8320C call write_ac97_dev_info
78 0000003D B80009 mov ax, 0900h ; Prints the Credits Text.
79 00000040 BA[3F0E] mov dx, CRLF
80 00000043 CD21 int 21h
81 LoadMod:
82 ; es:di = Filename address
83 00000045 06 push es
84 00000046 57 push di
85 00000047 E84A05 call LoadModule ; Load the MODule...
86
87 0000004A 833E[FA60]00 cmp word [ErrorInfo], 0 ; any error loading?
88 0000004F 740A je short init_codec
89
90 00000051 B80009 mov ax, 0900h ; yes, print error and Exit.
91 ;lea dx, [ErrorMesg]
92 00000054 BA[420E] mov dx, ErrorMesg
93 00000057 CD21 int 21h
94 00000059 EB63 jmp Exit
95
96 init_codec:
97 ; 13/05/2024
98 ;call write_ac97_dev_info
99
100 ; 08/05/2024
101 ; 17/02/2017
102 ;mov dx, [stats_cmd]
103 ;or dl, IO_ENA+BM_ENA ; enable IO and bus master
104 ;call pciRegWrite16 ; pciRegWrite8
105
106 ; 18/02/2017
107 ;mov word [sample_rate], 22050 ; Mixing at 22.050 kHz
108 ; 14/05/2024
109 0000005B C706[3865]C05D mov word [sample_rate], 24000
110
111 ; 08/05/2024
112 ; (48 kHZ mixing is necessary
113 ; if the AC97 hardware/codec has not got VRA feature)
114 ; ((or frequency converting code would be needed))
115 ;mov word [sample_rate], 48000 ; Mixing at 48 kHz
116
117 ; setup the Codec (actually mixer registers)
118 00000061 E8FD01 call codecConfig ; unmute codec, set rates.
119 00000064 731A jnc short PlayNow
120
121 _codec_err:
122 00000066 0E push cs
123 00000067 1F pop ds
124 00000068 BA[7100] mov dx, CodecErrMsg
125 0000006B B409 mov ah, 9
126 0000006D CD21 int 21h
127 0000006F EB4D jmp Exit
128
129 00000071 436F64656320457272- CodecErrMsg db "Codec Error!"
129 0000007A 6F7221
130 0000007D 0D0A24 db CR,LF,"$"
131 PlayNow:
132 00000080 B8[F80F] mov ax, BdlBuffer
133 00000083 A3[E60F] mov [BDL_BUFFER], ax
134
135 00000086 B8[F810] mov ax, DmaBuffer ; DmaBuffer (4096 bytes) buff addr
136 00000089 A3[E80F] mov [DMA_BUFFER1], ax ; 2048 byte half buffer 1
137
138 0000008C 050028 add ax, BUFFERSIZE ; code/current segment
139 0000008F A3[EA0F] mov [DMA_BUFFER2], ax ; 2048 byte half buffer 2
140
141 ;mov word [MixSpeed], 22050 ; Mixing at 22.050 kHz
142
143 00000092 E8CD0A call StartPlaying
144
145 00000095 B81300 mov ax, 0013h ; Set Mode 320x200x256
146 00000098 CD10 int 10h
147
148 0000009A B98000 mov cx, 128 ; Make a lookup table
149 0000009D 31DB xor bx, bx ; for fastest pixel
150 0000009F BA002D mov dx, 320*(100-64) ; addressing.
151 MakeOfs:
152 000000A2 8997[00C2] mov [RowOfs+bx], dx
153 000000A6 8997[02C2] mov [RowOfs+bx+2], dx
154 000000AA 81C24001 add dx, 320
155 000000AE 83C304 add bx, 4
156 000000B1 E2EF loop MakeOfs
157
158 ; Note: Normally IRQ 0 calls the ModPlay Polling at 18.2Hz thru
159 ; the software interrupt 1Ch. If the IRQ 0 is disabled, then
160 ; the INT 1Ch MUST BE CALLED at least MixSpeed/1024 times per
161 ; second, or the module will sound "looped".
162 ; Because we need better sync with the ModPlayer to draw the scope,
163 ; the polling is called from my routine, and then the irq 0 must be
164 ; disabled. The [DmaBuffer] points to the current buffer of 8-bit
165 ; samples played by the Sound Blaster. Note that some samples are
166 ; discarded in the next code, just for fun!
167
168 ;in al, 21h ; disable irq 0!
169 ;or al, 00000001b
170 ;out 21h, al
171
172 000000B3 E87503 call ModPlay ; 13/02/2017
173
174 ;in al, 21h ; enable irq 0!
175 ;and al, 11111110b
176 ;out 21h, al
177
178 000000B6 B80300 mov ax, 0003h ; Set Text Mode 80x25x16
179 000000B9 CD10 int 10h
180
181 000000BB E8250B call StopPlaying ; STOP!
182 Exit:
183 ;call FreeModule ; Free MODule core.
184 error_exit:
185 000000BE B8004C mov ax, 4C00h ; Bye!
186 000000C1 CD21 int 21h
187 here:
188 000000C3 EBFE jmp short here
189
190 pmsg_2017:
191 000000C5 B80009 mov ax, 0900h ; Prints the Credits Text.
192 ;lea dx, [msg_2017]
193 000000C8 BA[AE0D] mov dx, msg_2017
194 000000CB CD21 int 21h
195 000000CD EBEF jmp short Exit
196
197 DetectICH:
198 ; 18/02/2017
199 ; Detech Intel ICH based AC97 Audio Device
200 000000CF E84E01 call pciFindDevice ; AC97.ASM (PLAYWAV.COM)
201 000000D2 733F jnc short _1
202
203 ; couldn't find the audio device!
204 ;push cs
205 ;pop ds
206 000000D4 BA[DD00] mov dx, noDevMsg
207 000000D7 B409 mov ah, 9
208 000000D9 CD21 int 21h
209 000000DB EBE1 jmp short error_exit
210
211 000000DD 4572726F723A20556E- noDevMsg db "Error: Unable to find Intel ICH based audio device!",CR,LF,"$"
211 000000E6 61626C6520746F2066-
211 000000EF 696E6420496E74656C-
211 000000F8 204943482062617365-
211 00000101 6420617564696F2064-
211 0000010A 6576696365210D0A24
212
213 _1:
214 ; 18/02/2017
215 ; eax = BUS/DEV/FN
216 ; 00000000BBBBBBBBDDDDDFFF00000000
217 ; edx = DEV/VENDOR
218 ; DDDDDDDDDDDDDDDDVVVVVVVVVVVVVVVV
219
220 00000113 66A3[EE0F] mov [bus_dev_fn], eax
221 00000117 668916[F20F] mov [dev_vendor], edx
222
223 ; get ICH base address regs for mixer and bus master
224
225 0000011C B010 mov al, NAMBAR_REG
226 0000011E E87100 call pciRegRead16 ; read PCI registers 10-11
227 ;and dx, IO_ADDR_MASK ; mask off BIT0
228 ; 14/05/2024
229 00000121 80E2FE and dl, 0FEh
230
231 00000124 8916[D80F] mov [NAMBAR], dx ; save audio mixer base addr
232
233 00000128 B014 mov al, NABMBAR_REG
234 0000012A E86500 call pciRegRead16
235 ;and dx, IO_ADDR_MASK
236 ;/14/05/2024
237 0000012D 80E2C0 and dl, 0C0h
238
239 00000130 8916[DA0F] mov [NABMBAR], dx ; save bus master base addr
240
241 ; 08/05/2024
242 ; 06/11/2023
243 ;; init controller
244 ;; 17/02/2017
245 ;mov al, PCI_CMD_REG ; command register (04h)
246 ;call pciRegRead16 ; pciRegRead8
247 ;
248 ;; eax = BUS/DEV/FN/REG
249 ;; dx = PCI Command Register Content ; 17/02/2017
250 ;; 00000000CCCCCCCC
251 ;mov [stats_cmd], dx
252 ;
253 ; 06/11/2023
254 ;mov al, PCI_IO_BASE ; IO base address register (10h)
255 ;call pciRegRead32
256 ;
257 ;and dx, 0FFC0h ; IO_ADDR_MASK (0FFFE) ?
258 ;mov [ac97_io_base], dx
259
260 00000134 B03C mov al, AC97_INT_LINE ; Interrupt line register (3Ch)
261 00000136 E85100 call pciRegRead8 ; 17/02/2017
262
263 00000139 8816[EC0F] mov [ac97_int_ln_reg], dl
264
265 ; 12/05/2024 (tuneloop version)
266 %if 0
267 ; 28/11/2016
268 ;mov bx, 1 ; 08/05/2024
269 xor dh, dh ; 17/02/2017
270 ; 10/11/2023
271 ;mov cx, dx
272 ;shl bx, cl
273
274 ; 04/11/2023
275 cli
276
277 ;not bx
278 in al, 0A1h ; irq 8-15
279 mov ah, al
280 in al, 21h ; irq 0-7
281
282 ; 04/11/2023
283 ; save IRQ status
284 mov [IRQ_status], ax
285
286 ; 08/05/2024
287 ;mov dx, 4D1h ;8259 ELCR1
288 ;in al, dx
289 ;mov ah, al
290 ;mov dx, 4D0h
291 ;in al, dx
292 ;;or ax, bx
293 ;bts ax, cx
294 ;mov dx, 4D0h
295 ;out dx, al ;set level-triggered mode
296 ;mov al, ah
297 ;mov dx, 4D1h
298 ;out dx, al ;set level-triggered mode
299
300 ; 24/11/2016 - Erdogan Tan
301 ;mov bx, cx
302 ; 10/11/2023
303 mov bx, dx
304 mov bl, [bx+irq_int]
305 shl bx, 2 ; * 4
306
307 ; set up interrupt vector
308 ; 30/11/2016
309 push es
310 xor ax, ax
311 mov es, ax
312 ; 04/11/2023
313 ; save interrupt vector
314 mov ax, [es:bx]
315 mov [IRQ_vector], ax
316 mov ax, [es:bx+2]
317 mov [IRQ_vector+2], ax
318
319 mov word [es:bx], ac97_int_handler
320 mov ax, cs
321 mov [es:bx+2], ax
322 pop es
323
324 ; 04/11/2023
325 sti
326 %endif
327 0000013D C3 retn
328
329 ; 12/05/2024 (tuneloop version)
330 %if 0
331
332 ac97_int_handler:
333 ; 11/05/2024
334 ; 11/11/2023
335 ; 10/11/2023
336 ; 17/02/2016
337 push eax ; 11/11/2023
338 push dx
339 ; 05/11/2023
340 ;push cx
341 ;push bx
342 ;push si
343 ;push di
344
345 ; 10/11/2023
346 ; EOI at first
347 mov al, 20h
348 test byte [ac97_int_ln_reg], 8
349 jz short _ih_0
350 out 0A0h, al ; 20h ; EOI
351 _ih_0:
352 out 20h, al ; 20h ; EOI
353
354 ; 11/11/2023
355 ; 09/11/2023
356 mov dx, GLOB_STS_REG
357 add dx, [NABMBAR]
358 in eax, dx
359
360 ; 12/05/2024
361 ; 09/11/2023,
362 ;cmp eax, 0FFFFFFFFh ; -1
363 ;je short _ih_2
364
365 ; 12/05/2024
366 ;test al, 40h ; PCM Out Interrupt
367 ;jnz short _ih_1
368
369 ;test eax, eax
370 ;jz short _ih_2
371 ; 12/05/2024
372 test ax, PCM_OUT_IRQ+BCIS
373 jnz short _ih_1
374
375 ;mov dx, GLOB_STS_REG
376 ;add dx, [NABMBAR]
377 out dx, eax
378 jmp short _ih_2
379
380 ; .....
381 ;mov al, 1
382 ; 10/11/2023
383 ;mov [tLoop], al ; 1
384
385 ;cmp [inside], al ; 1
386 ;jnb short _ih_3 ; busy
387
388 ;mov [inside], al ; 1
389 ;
390 ;; 09/11/2023
391 ;mov dx, [NABMBAR]
392 ;add dx, PO_SR_REG ; set pointer to Status reg
393 ;in al, dx
394 ;; 10/11/2023
395 ;;;out dx, eax
396 ;;out dx, al ; clear interrupt event
397 ; ; (by writing 1 to same bits)
398 ;
399 ;;mov [pcm_irq_status], al ; 05/11/2023
400 ;test al, BCIS ; Buffer Completion Interrupt Status (Bit 3)
401 ;jz short _ih_2
402 ; .....
403
404 _ih_1:
405 ; 11/11/2023
406 push eax
407
408 ;mov ax, 1Ch ; FIFOE(=16)+BCIS(=8)+LVBCI(=4)
409 ;mov dx, PO_SR_REG
410 ;add dx, [NABMBAR]
411 ;out dx, ax
412
413 ; 10/11/2023
414 ; 28/11/2016 - Erdogan Tan
415 call tuneLoop
416
417 ; 11/11/2023
418 pop eax
419 mov dx, GLOB_STS_REG
420 add dx, [NABMBAR]
421 out dx, eax
422 _ih_2:
423 ; 11/11/2023
424 mov dx, [NABMBAR]
425 add dx, PO_SR_REG ; set pointer to Status reg
426 mov ax, 1Ch
427 out dx, ax
428
429 ; ; 10/11/2023
430 ; mov al, 20h
431 ; test byte [ac97_int_ln_reg], 8
432 ; jz short _ih_3
433 ; out 0A0h, al ; 20h ; EOI
434 ;_ih_3:
435 ; out 20h, al ; 20h ; EOI
436 ;_ih_4:
437 ;mov byte [inside], 0
438 ;pop di
439 ;pop si
440 ;pop bx
441 ;pop cx
442 pop dx
443 pop eax ; 11/11/2023
444 iret
445
446 %endif
447
448 ;=============================================================================
449 ; PCI.ASM
450 ;=============================================================================
451
452 ; EQUATES
453
454 ;constants of stuff that seem hard to remember at times.
455
456 TRUE EQU 1
457 FALSE EQU 0
458
459 ENABLED EQU 1
460 DISABLED EQU 0
461
462 BIT0 EQU 1
463 BIT1 EQU 2
464 BIT2 EQU 4
465 BIT3 EQU 8
466 BIT4 EQU 10h
467 BIT5 EQU 20h
468 BIT6 EQU 40h
469 BIT7 EQU 80h
470 BIT8 EQU 100h
471 BIT9 EQU 200h
472 BIT10 EQU 400h
473 BIT11 EQU 800h
474 BIT12 EQU 1000h
475 BIT13 EQU 2000h
476 BIT14 EQU 4000h
477 BIT15 EQU 8000h
478 BIT16 EQU 10000h
479 BIT17 EQU 20000h
480 BIT18 EQU 40000h
481 BIT19 EQU 80000h
482 BIT20 EQU 100000h
483 BIT21 EQU 200000h
484 BIT22 EQU 400000h
485 BIT23 EQU 800000h
486 BIT24 EQU 1000000h
487 BIT25 EQU 2000000h
488 BIT26 EQU 4000000h
489 BIT27 EQU 8000000h
490 BIT28 EQU 10000000h
491 BIT29 EQU 20000000h
492 BIT30 EQU 40000000h
493 BIT31 EQU 80000000h
494
495 ;special characters
496 NUL EQU 0
497 NULL EQU 0
498 BELL EQU 07
499 BS EQU 08
500 TAB EQU 09
501 LF EQU 10
502 CR EQU 13
503 ESCAPE EQU 27 ;ESC is a reserved word....
504
505
506 ;file stuff
507 READONLY EQU BIT0
508 HIDDEN EQU BIT1
509 SYSTEM EQU BIT2
510 VOLUME EQU BIT3 ;ignored for file access
511 DIRECTORY EQU BIT4 ;must be 0 for file access
512 ARCHIVE EQU BIT5
513 SHAREABLE EQU BIT7 ;for novell networks
514 OPEN EQU 2 ; open existing file
515 CREATE EQU 1 ; create new file
516
517
518 ; PCI equates
519 ; PCI function address (PFA)
520 ; bit 31 = 1
521 ; bit 23:16 = bus number (0-255)
522 ; bit 15:11 = device number (0-31)
523 ; bit 10:8 = function number (0-7)
524 ; bit 7:0 = register number (0-255)
525
526 IO_ADDR_MASK EQU 0FFFEh ; mask off bit 0 for reading BARs
527 PCI_INDEX_PORT EQU 0CF8h
528 PCI_DATA_PORT EQU 0CFCh
529 PCI32 EQU BIT31 ; bitflag to signal 32bit access
530 PCI16 EQU BIT30 ; bitflag for 16bit access
531
532 PCI_FN0 EQU 0 << 8
533 PCI_FN1 EQU 1 << 8
534 PCI_FN2 EQU 2 << 8
535 PCI_FN3 EQU 3 << 8
536 PCI_FN4 EQU 4 << 8
537 PCI_FN5 EQU 5 << 8
538 PCI_FN6 EQU 6 << 8
539 PCI_FN7 EQU 7 << 8
540
541 PCI_CMD_REG EQU 04h ; reg 04, command reg
542 IO_ENA EQU BIT0 ; i/o decode enable
543 MEM_ENA EQU BIT1 ; memory decode enable
544 BM_ENA EQU BIT2 ; bus master enable
545
546 ; CODE
547
548 ; AC97.ASM
549 ; PCI device register reader/writers.
550 ; NASM version: Erdogan Tan (29/11/2016)
551 ; Last Update: 17/02/2017
552
553 ;===============================================================
554 ; 8/16/32bit PCI reader
555 ;
556 ; Entry: EAX=PCI Bus/Device/fn/register number
557 ; BIT30 set if 32 bit access requested
558 ; BIT29 set if 16 bit access requested
559 ; otherwise defaults to 8bit read
560 ;
561 ; Exit: DL,DX,EDX register data depending on requested read size
562 ;
563 ; Note: this routine is meant to be called via pciRegRead8, pciRegread16,
564 ; or pciRegRead32, listed below.
565 ;
566 ; Note2: don't attempt to read 32bits of data from a non dword aligned reg
567 ; number. Likewise, don't do 16bit reads from non word aligned reg #
568 ;
569 pciRegRead:
570 0000013E 6653 push ebx
571 00000140 51 push cx
572 00000141 6689C3 mov ebx, eax ; save eax, dh
573 00000144 88F1 mov cl, dh
574 00000146 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
575 0000014C 660D00000080 or eax, BIT31 ; make a PCI access request
576 00000152 24FC and al, ~3 ; NOT 3 ; force index to be dword
577
578 00000154 BAF80C mov dx, PCI_INDEX_PORT
579 00000157 66EF out dx, eax ; write PCI selector
580
581 00000159 BAFC0C mov dx, PCI_DATA_PORT
582 0000015C 88D8 mov al, bl
583 0000015E 2403 and al, 3 ; figure out which port to
584 00000160 00C2 add dl, al ; read to
585
586 00000162 66ED in eax, dx ; do 32bit read
587 00000164 66F7C300000080 test ebx, PCI32
588 0000016B 7403 jz short _pregr1
589
590 0000016D 6689C2 mov edx, eax ; return 32bits of data
591 _pregr1:
592 00000170 89C2 mov dx, ax ; return 16bits of data
593 00000172 66F7C3000000C0 test ebx, PCI32+PCI16
594 00000179 7502 jnz short _pregr2
595 0000017B 88CE mov dh, cl ; restore dh for 8 bit read
596 _pregr2:
597 0000017D 6689D8 mov eax, ebx ; restore eax
598 00000180 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
599 00000186 59 pop cx
600 00000187 665B pop ebx
601 00000189 C3 retn
602
603 pciRegRead8:
604 0000018A 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 8 bit read size
605 00000190 EBAC jmp short pciRegRead ; call generic PCI access
606
607 pciRegRead16:
608 00000192 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 16 bit read size
609 00000198 660D00000040 or eax, PCI16 ; call generic PCI access
610 0000019E EB9E jmp short pciRegRead
611
612 pciRegRead32:
613 000001A0 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 32 bit read size
614 000001A6 660D00000080 or eax, PCI32 ; call generic PCI access
615 000001AC EB90 jmp short pciRegRead
616
617 ;===============================================================
618 ; 8/16/32bit PCI writer
619 ;
620 ; Entry: EAX=PCI Bus/Device/fn/register number
621 ; BIT31 set if 32 bit access requested
622 ; BIT30 set if 16 bit access requested
623 ; otherwise defaults to 8bit read
624 ; DL/DX/EDX data to write depending on size
625 ;
626 ;
627 ; note: this routine is meant to be called via pciRegWrite8, pciRegWrite16,
628 ; or pciRegWrite32 as detailed below.
629 ;
630 ; Note2: don't attempt to write 32bits of data from a non dword aligned reg
631 ; number. Likewise, don't do 16bit writes from non word aligned reg #
632 ;
633 pciRegWrite:
634 000001AE 6653 push ebx
635 000001B0 51 push cx
636 000001B1 6689C3 mov ebx, eax ; save eax, dx
637 000001B4 89D1 mov cx, dx
638 000001B6 660D00000080 or eax, BIT31 ; make a PCI access request
639 000001BC 6625FFFFFFBF and eax, ~PCI16 ; NOT PCI16 ; clear out data size request
640 000001C2 24FC and al, ~3 ; NOT 3 ; force index to be dword
641
642 000001C4 BAF80C mov dx, PCI_INDEX_PORT
643 000001C7 66EF out dx, eax ; write PCI selector
644
645 000001C9 BAFC0C mov dx, PCI_DATA_PORT
646 000001CC 88D8 mov al, bl
647 000001CE 2403 and al, 3 ; figure out which port to
648 000001D0 00C2 add dl, al ; write to
649
650 000001D2 6689D0 mov eax, edx ; put data into eax
651 000001D5 89C8 mov ax, cx
652
653 000001D7 EE out dx, al
654 000001D8 66F7C3000000C0 test ebx, PCI16+PCI32 ; only 8bit access? bail
655 000001DF 740C jz short _pregw1
656
657 000001E1 EF out dx, ax ; write 16 bit value
658 000001E2 66F7C300000040 test ebx, PCI16 ; 16bit requested? bail
659 000001E9 7502 jnz short _pregw1
660
661 000001EB 66EF out dx, eax ; write full 32bit
662 _pregw1:
663 000001ED 6689D8 mov eax, ebx ; restore eax
664 000001F0 6625FFFFFFBF and eax, (~PCI32)+PCI16 ; clear out data size request
665 000001F6 89CA mov dx, cx ; restore dx
666 000001F8 59 pop cx
667 000001F9 665B pop ebx
668 000001FB C3 ret
669
670 pciRegWrite8:
671 000001FC 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 8 bit write size
672 00000202 EBAA jmp short pciRegWrite ; call generic PCI access
673
674 pciRegWrite16:
675 00000204 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 16 bit write size
676 0000020A 660D00000040 or eax, PCI16 ; call generic PCI access
677 00000210 EB9C jmp short pciRegWrite
678
679 pciRegWrite32:
680 00000212 6625FFFFFF3F and eax, (~PCI16)+PCI32 ; set up 32 bit write size
681 00000218 660D00000080 or eax, PCI32 ; call generic PCI access
682 0000021E EB8E jmp short pciRegWrite
683
684 ; AC97.ASM (PLAYWAV.COM)
685 ; 17/02/2017 (Modifed by Erdogan Tan for various ICH device IDs)
686 ;===============================================================
687 ; PCIFindDevice: scan through PCI space looking for a device+vendor ID
688 ;
689 ; ENTRY: none
690 ;; Entry: EAX=Device+Vendor ID
691 ;
692 ; Exit: EAX=PCI address if device found
693 ; EDX=Device+Vendor ID
694 ; CY clear if found, set if not found. EAX invalid if CY set.
695 ;
696 ; [old stackless] Destroys: ebx, esi, edi, cl
697 ;
698 pciFindDevice:
699 ;push cx
700 ;push eax ; *
701 ;push esi
702 ;push edi
703
704 ;mov esi, eax ; save off vend+device ID
705
706 ; 17/02/2017
707 00000220 BE[D70E] mov si, valid_ids ; address of Valid ICH (AC97) Device IDs
708 00000223 B91500 mov cx, valid_id_count
709 pfd_0:
710 00000226 66BF00FFFF7F mov edi, (80000000h - 100h) ; start with bus 0, dev 0 func 0
711 nextPCIdevice:
712 0000022C 6681C700010000 add edi, 100h
713 00000233 6681FF00F8FF80 cmp edi, 80FFF800h ; scanned all devices?
714 ;stc
715 ;je short PCIScanExit ; not found
716 0000023A 720D jb short pfd_1
717 0000023C 66BF00000080 mov edi, 80000000h
718 00000242 83C604 add si, 4 ; scan for next device ID
719 00000245 E202 loop pfd_1
720 00000247 F9 stc
721 ;jmp short PCIScanExit
722 00000248 C3 retn
723 pfd_1:
724 00000249 6689F8 mov eax, edi ; read PCI registers
725 0000024C E851FF call pciRegRead32
726 ;cmp edx, esi ; found device?
727 0000024F 663B14 cmp edx, dword [si]
728 00000252 75D8 jne short nextPCIdevice
729 ;clc
730 PCIScanExit:
731 ;pushf
732 00000254 66B800000080 mov eax, BIT31
733 0000025A 66F7D0 not eax
734 0000025D 6621F8 and eax, edi ; return only bus/dev/fn #
735 ;popf
736
737 ;pop edi
738 ;pop esi
739 ;pop edx ; *
740 ;pop cx
741 00000260 C3 retn
742
743 ;=============================================================================
744 ; CODEC.ASM
745 ;=============================================================================
746
747 ; EQUATES
748
749 ;Codec registers.
750 ;
751 ;Not all codecs are created equal. Refer to the spec for your specific codec.
752 ;
753 ;All registers are 16bits wide. Access to codec registers over the AC97 link
754 ;is defined by the OEM.
755 ;
756 ;Secondary codec's are accessed by ORing in BIT7 of all register accesses.
757 ;
758
759 ; each codec/mixer register is 16bits
760
761 CODEC_RESET_REG equ 00 ; reset codec
762 CODEC_MASTER_VOL_REG equ 02 ; master volume
763 CODEC_HP_VOL_REG equ 04 ; headphone volume
764 CODEC_MASTER_MONO_VOL_REG equ 06 ; master mono volume
765 CODEC_MASTER_TONE_REG equ 08 ; master tone (R+L)
766 CODEC_PCBEEP_VOL_REG equ 0ah ; PC beep volume
767 CODEC_PHONE_VOL_REG equ 0bh ; phone volume
768 CODEC_MIC_VOL_REG equ 0eh ; MIC volume
769 CODEC_LINE_IN_VOL_REG equ 10h ; line input volume
770 CODEC_CD_VOL_REG equ 12h ; CD volume
771 CODEC_VID_VOL_REG equ 14h ; video volume
772 CODEC_AUX_VOL_REG equ 16h ; aux volume
773 CODEC_PCM_OUT_REG equ 18h ; PCM output volume
774 CODEC_RECORD_SELECT_REG equ 1ah ; record select input
775 CODEC_RECORD_VOL_REG equ 1ch ; record volume
776 CODEC_RECORD_MIC_VOL_REG equ 1eh ; record mic volume
777 CODEC_GP_REG equ 20h ; general purpose
778 CODEC_3D_CONTROL_REG equ 22h ; 3D control
779 ; 24h is reserved
780 CODEC_POWER_CTRL_REG equ 26h ; powerdown control
781 CODEC_EXT_AUDIO_REG equ 28h ; extended audio
782 CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
783 CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
784 CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
785 CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
786 CODEC_LR_ADCRATE_REG equ 32h ; PCM in sample rate
787 CODEC_MIC_ADCRATE_REG equ 34h ; mic in sample rate
788
789 ; registers 36-7a are reserved on the ICH
790
791 CODEC_VENDORID1_REG equ 7ch ; codec vendor ID 1
792 CODEC_VENDORID2_REG equ 7eh ; codec vendor ID 2
793
794 ; Mixer registers 0 through 51h reside in the ICH and are not forwarded over
795 ; the AC97 link to the codec, which I think is a little weird. Looks like
796 ; the ICH makes it so you don't need a fully functional codec to play audio?
797 ;
798 ; whenever 2 codecs are present in the system, use BIT7 to access the 2nd
799 ; set of registers, ie 80h-feh
800
801 PRIMARY_CODEC equ 0 ; 0-7F for primary codec
802 SECONDARY_CODEC equ BIT7 ; 80-8f registers for 2ndary
803
804 SAMPLE_RATE_441khz equ 44100 ; 44.1Khz (cd quality) rate
805
806 ; ----------------------------------------------------------------------------
807 ; 17/02/2017
808 PCI_IO_BASE equ 10h ; = NAMBAR register offset
809 AC97_INT_LINE equ 3Ch ; AC97 Interrupt Line register offset
810
811 ; ----------------------------------------------------------------------------
812 ; ICH2AC97.INC
813 ; ----------------------------------------------------------------------------
814
815 ; PCI stuff
816
817 ; Intel ICH2 equates. It is assumed that ICH0 and plain ole ICH are compatible.
818
819 INTEL_VID equ 8086h ; Intel's PCI vendor ID
820
821 ; 08/05/2024
822 ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
823 SIS_VID equ 1039h
824 NVIDIA_VID equ 10DEh ; Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source c.
825 AMD_VID equ 1022h
826
827 ICH_DID equ 2415h ; ICH device ID
828 ICH0_DID equ 2425h ; ICH0
829 ICH2_DID equ 2445h ; ICH2 I think there are more ICHes.
830 ; they all should be compatible.
831 ; 08/05/2024
832 ; 17/02/2017 (Erdogan Tan, ref: ALSA Device IDs, ALSA project)
833 ICH3_DID equ 2485h ; ICH3
834 ICH4_DID equ 24C5h ; ICH4
835 ICH5_DID equ 24D5h ; ICH5
836 ICH6_DID equ 266Eh ; ICH6
837 ESB6300_DID equ 25A6h ; 6300ESB
838 ESB631X_DID equ 2698h ; 631XESB
839 ICH7_DID equ 27DEh ; ICH7
840 ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
841 MX82440_DID equ 7195h
842 SI7012_DID equ 7012h
843 NFORCE_DID equ 01B1h
844 NFORCE2_DID equ 006Ah
845 AMD8111_DID equ 746Dh
846 AMD768_DID equ 7445h
847 ; 03/11/2023 - Erdogan Tan - Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source code
848 CK804_DID equ 0059h
849 MCP04_DID equ 003Ah
850 CK8_DID equ 008Ah
851 NFORCE3_DID equ 00DAh
852 CK8S_DID equ 00EAh
853
854 NAMBAR_REG equ 10h ; native audio mixer BAR
855 NAM_SIZE equ 256 ; 256 bytes required.
856
857 NABMBAR_REG equ 14h ; native audio bus mastering BAR
858 NABM_SIZE equ 64 ; 64 bytes
859
860 ; BUS master registers, accessed via NABMBAR+offset
861
862 ; ICH supports 3 different types of register sets for three types of things
863 ; it can do, thus:
864 ;
865 ; PCM in (for recording) aka PI
866 ; PCM out (for playback) aka PO
867 ; MIC in (for recording) aka MC
868
869 PI_BDBAR_REG equ 0 ; PCM in buffer descriptor BAR
870 PO_BDBAR_REG equ 10h ; PCM out buffer descriptor BAR
871 MC_BDBAR_REG equ 20h ; MIC in buffer descriptor BAR
872
873 ; each buffer descriptor BAR holds a pointer which has entries to the buffer
874 ; contents of the .WAV file we're going to play. Each entry is 8 bytes long
875 ; (more on that later) and can contain 32 entries total, so each BAR is
876 ; 256 bytes in length, thus:
877
878 BDL_SIZE equ 32*8 ; Buffer Descriptor List size
879 INDEX_MASK equ 31 ; indexes must be 0-31
880
881
882
883 PI_CIV_REG equ 4 ; PCM in current Index value (RO)
884 PO_CIV_REG equ 14h ; PCM out current Index value (RO)
885 MC_CIV_REG equ 24h ; MIC in current Index value (RO)
886 ;8bit read only
887 ; each current index value is simply a pointer showing us which buffer
888 ; (0-31) the codec is currently processing. Once this counter hits 31, it
889 ; wraps back to 0.
890 ; this can be handy to know, as once it hits 31, we're almost out of data to
891 ; play back or room to record!
892
893
894 PI_LVI_REG equ 5 ; PCM in Last Valid Index
895 PO_LVI_REG equ 15h ; PCM out Last Valid Index
896 MC_LVI_REG equ 25h ; MIC in Last Valid Index
897 ;8bit read/write
898 ; The Last Valid Index is a number (0-31) to let the codec know what buffer
899 ; number to stop on after processing. It could be very nasty to play audio
900 ; from buffers that aren't filled with the audio we want to play.
901
902
903 PI_SR_REG equ 6 ; PCM in Status register
904 PO_SR_REG equ 16h ; PCM out Status register
905 MC_SR_REG equ 26h ; MIC in Status register
906 ;16bit read/write
907 ; status registers. Bitfields follow:
908
909 FIFO_ERR equ BIT4 ; FIFO Over/Underrun W1TC.
910
911 BCIS equ BIT3 ; buffer completion interrupt status.
912 ; Set whenever the last sample in ANY
913 ; buffer is finished. Bit is only
914 ; set when the Interrupt on Complete
915 ; (BIT4 of control reg) is set.
916
917 LVBCI equ BIT2 ; Set whenever the codec has processed
918 ; the last buffer in the buffer list.
919 ; Will fire an interrupt if IOC bit is
920 ; set. Probably set after the last
921 ; sample in the last buffer is
922 ; processed. W1TC
923
924 ;
925 CELV equ BIT1 ; Current buffer == last valid.
926 ; Bit is RO and remains set until LVI is
927 ; cleared. Probably set up the start
928 ; of processing for the last buffer.
929
930
931 DCH equ BIT0 ; DMA controller halted.
932 ; set whenever audio stream is stopped
933 ; or something else goes wrong.
934
935 PI_PICB_REG equ 8 ; PCM in position in current buffer(RO)
936 PO_PICB_REG equ 18h ; PCM out position in current buffer(RO)
937 MC_PICB_REG equ 28h ; MIC in position in current buffer (RO)
938 ;16bit read only
939 ; position in current buffer regs show the number of dwords left to be
940 ; processed in the current buffer.
941 ;
942
943 PI_PIV_REG equ 0ah ; PCM in Prefected index value
944 PO_PIV_REG equ 1ah ; PCM out Prefected index value
945 MC_PIV_REG equ 2ah ; MIC in Prefected index value
946 ;8bit, read only
947 ; Prefetched index value register.
948 ; tells which buffer number (0-31) has be prefetched. I'd imagine this
949 ; value follows the current index value fairly closely. (CIV+1)
950 ;
951
952 PI_CR_REG equ 0bh ; PCM in Control Register
953 PO_CR_REG equ 1bh ; PCM out Control Register
954 MC_CR_REG equ 2bh ; MIC in Control Register
955 ; 8bit
956 ; Control register *MUST* only be accessed as an 8bit value.
957 ; Control register. See bitfields below.
958 ;
959
960 IOCE equ BIT4 ; interrupt on complete enable.
961 ; set this bit if you want an intrtpt
962 ; to fire whenever LVBCI is set.
963 FEIFE equ BIT3 ; set if you want an interrupt to fire
964 ; whenever there is a FIFO (over or
965 ; under) error.
966 LVBIE equ BIT2 ; last valid buffer interrupt enable.
967 ; set if you want an interrupt to fire
968 ; whenever the completion of the last
969 ; valid buffer.
970 RR equ BIT1 ; reset registers. Nukes all regs
971 ; except bits 4:2 of this register.
972 ; Only set this bit if BIT 0 is 0
973 RPBM equ BIT0 ; Run/Pause
974 ; set this bit to start the codec!
975
976
977 GLOB_CNT_REG equ 2ch ; Global control register
978 SEC_RES_EN equ BIT5 ; secondary codec resume event
979 ; interrupt enable. Not used here.
980 PRI_RES_EN equ BIT4 ; ditto for primary. Not used here.
981 ACLINK_OFF equ BIT3 ; Turn off the AC97 link
982 ACWARM_RESET equ BIT2 ; Awaken the AC97 link from sleep.
983 ; registers preserved, bit self clears
984 ACCOLD_RESET equ BIT1 ; Reset everything in the AC97 and
985 ; reset all registers. Not self clearing
986
987 GPIIE equ BIT0 ; GPI Interrupt enable.
988 ; set if you want an interrupt to
989 ; fire upon ANY of the bits in the
990 ; GPI (general pursose inputs?) not used.
991
992 GLOB_STS_REG equ 30h ; Global Status register (RO)
993
994 MD3 equ BIT17 ; modem powerdown status (yawn)