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playwav3.lst
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playwav3.lst
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1 ; ****************************************************************************
2 ; PLAYWAV.ASM - ICH AC97 .wav player for DOS. PLAYWAV.COM
3 ; ----------------------------------------------------------------------------
4 ; Last Update: 19/05/2024 (Previous: 08/05/2024)
5 ; ----------------------------------------------------------------------------
6 ; Beginning: 17/02/2017
7 ; ----------------------------------------------------------------------------
8 ; Assembler: NASM version 2.15
9 ; nasm playwav.asm -l playwav.lst -o PLAYWAV.COM
10 ; ----------------------------------------------------------------------------
11 ; Derived from '.wav file player for DOS' Jeff Leyda, Sep 02, 2002
12 ; ****************************************************************************
13 ; Modidified from 'PLAYER.COM' for VIA VT8233 wav player source code by
14 ; (PLAYER.ASM) by Erdogan Tan (07/11/2016 - 08/12/2016)
15
16 ; AC97 interrupt version - 09/11/2023 - Erdogan Tan
17 ; sample rate conversion version - 13/11/2023 - Erdogan Tan
18
19 [BITS 16]
20
21 [ORG 100h]
22
23 %include 'ac97.inc' ; 17/02/2017
1 <1> ; 11/11/2023
2 <1> ; 05/11/2023
3 <1> ; 03/11/2023
4 <1> ; 17/02/2017 (Erdogan Tan, PLAYWAV.ASM)
5 <1> ; constant.inc & codec.inc (for ICH AC97 wav player, 'PLAYWAV.COM')
6 <1>
7 <1> ; ----------------------------------------------------------------------------
8 <1> ; CONSTANT.INC
9 <1> ; ----------------------------------------------------------------------------
10 <1>
11 <1> ;constants of stuff that seem hard to remember at times.
12 <1>
13 <1> TRUE EQU 1
14 <1> FALSE EQU 0
15 <1>
16 <1> ENABLED EQU 1
17 <1> DISABLED EQU 0
18 <1>
19 <1> BIT0 EQU 1
20 <1> BIT1 EQU 2
21 <1> BIT2 EQU 4
22 <1> BIT3 EQU 8
23 <1> BIT4 EQU 10h
24 <1> BIT5 EQU 20h
25 <1> BIT6 EQU 40h
26 <1> BIT7 EQU 80h
27 <1> BIT8 EQU 100h
28 <1> BIT9 EQU 200h
29 <1> BIT10 EQU 400h
30 <1> BIT11 EQU 800h
31 <1> BIT12 EQU 1000h
32 <1> BIT13 EQU 2000h
33 <1> BIT14 EQU 4000h
34 <1> BIT15 EQU 8000h
35 <1> BIT16 EQU 10000h
36 <1> BIT17 EQU 20000h
37 <1> BIT18 EQU 40000h
38 <1> BIT19 EQU 80000h
39 <1> BIT20 EQU 100000h
40 <1> BIT21 EQU 200000h
41 <1> BIT22 EQU 400000h
42 <1> BIT23 EQU 800000h
43 <1> BIT24 EQU 1000000h
44 <1> BIT25 EQU 2000000h
45 <1> BIT26 EQU 4000000h
46 <1> BIT27 EQU 8000000h
47 <1> BIT28 EQU 10000000h
48 <1> BIT29 EQU 20000000h
49 <1> BIT30 EQU 40000000h
50 <1> BIT31 EQU 80000000h
51 <1>
52 <1> ;special characters
53 <1> NUL EQU 0
54 <1> NULL EQU 0
55 <1> BELL EQU 07
56 <1> BS EQU 08
57 <1> TAB EQU 09
58 <1> LF EQU 10
59 <1> CR EQU 13
60 <1> ESCAPE EQU 27 ;ESC is a reserved word....
61 <1>
62 <1>
63 <1> ;file stuff
64 <1> READONLY EQU BIT0
65 <1> HIDDEN EQU BIT1
66 <1> SYSTEM EQU BIT2
67 <1> VOLUME EQU BIT3 ;ignored for file access
68 <1> DIRECTORY EQU BIT4 ;must be 0 for file access
69 <1> ARCHIVE EQU BIT5
70 <1> SHAREABLE EQU BIT7 ;for novell networks
71 <1> OPEN EQU 2 ; open existing file
72 <1> CREATE EQU 1 ; create new file
73 <1>
74 <1>
75 <1> ; PCI equates
76 <1> ; PCI function address (PFA)
77 <1> ; bit 31 = 1
78 <1> ; bit 23:16 = bus number (0-255)
79 <1> ; bit 15:11 = device number (0-31)
80 <1> ; bit 10:8 = function number (0-7)
81 <1> ; bit 7:0 = register number (0-255)
82 <1>
83 <1> IO_ADDR_MASK EQU 0FFFEh ; mask off bit 0 for reading BARs
84 <1> PCI_INDEX_PORT EQU 0CF8h
85 <1> PCI_DATA_PORT EQU 0CFCh
86 <1> PCI32 EQU BIT31 ; bitflag to signal 32bit access
87 <1> PCI16 EQU BIT30 ; bitflag for 16bit access
88 <1>
89 <1> PCI_FN0 EQU 0 << 8
90 <1> PCI_FN1 EQU 1 << 8
91 <1> PCI_FN2 EQU 2 << 8
92 <1> PCI_FN3 EQU 3 << 8
93 <1> PCI_FN4 EQU 4 << 8
94 <1> PCI_FN5 EQU 5 << 8
95 <1> PCI_FN6 EQU 6 << 8
96 <1> PCI_FN7 EQU 7 << 8
97 <1>
98 <1> PCI_CMD_REG EQU 04h ; reg 04, command reg
99 <1> IO_ENA EQU BIT0 ; i/o decode enable
100 <1> MEM_ENA EQU BIT1 ; memory decode enable
101 <1> BM_ENA EQU BIT2 ; bus master enable
102 <1>
103 <1> ; ----------------------------------------------------------------------------
104 <1> ; CODEC.INC
105 <1> ; ----------------------------------------------------------------------------
106 <1>
107 <1> ;Codec registers.
108 <1> ;
109 <1> ;Not all codecs are created equal. Refer to the spec for your specific codec.
110 <1> ;
111 <1> ;All registers are 16bits wide. Access to codec registers over the AC97 link
112 <1> ;is defined by the OEM.
113 <1> ;
114 <1> ;Secondary codec's are accessed by ORing in BIT7 of all register accesses.
115 <1> ;
116 <1>
117 <1> ; each codec/mixer register is 16bits
118 <1>
119 <1> CODEC_RESET_REG equ 00 ; reset codec
120 <1> CODEC_MASTER_VOL_REG equ 02 ; master volume
121 <1> CODEC_HP_VOL_REG equ 04 ; headphone volume
122 <1> CODEC_MASTER_MONO_VOL_REG equ 06 ; master mono volume
123 <1> CODEC_MASTER_TONE_REG equ 08 ; master tone (R+L)
124 <1> CODEC_PCBEEP_VOL_REG equ 0ah ; PC beep volume
125 <1> CODEC_PHONE_VOL_REG equ 0bh ; phone volume
126 <1> CODEC_MIC_VOL_REG equ 0eh ; MIC volume
127 <1> CODEC_LINE_IN_VOL_REG equ 10h ; line input volume
128 <1> CODEC_CD_VOL_REG equ 12h ; CD volume
129 <1> CODEC_VID_VOL_REG equ 14h ; video volume
130 <1> CODEC_AUX_VOL_REG equ 16h ; aux volume
131 <1> CODEC_PCM_OUT_REG equ 18h ; PCM output volume
132 <1> CODEC_RECORD_SELECT_REG equ 1ah ; record select input
133 <1> CODEC_RECORD_VOL_REG equ 1ch ; record volume
134 <1> CODEC_RECORD_MIC_VOL_REG equ 1eh ; record mic volume
135 <1> CODEC_GP_REG equ 20h ; general purpose
136 <1> CODEC_3D_CONTROL_REG equ 22h ; 3D control
137 <1> ; 24h is reserved
138 <1> CODEC_POWER_CTRL_REG equ 26h ; powerdown control
139 <1> CODEC_EXT_AUDIO_REG equ 28h ; extended audio
140 <1> CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
141 <1> CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
142 <1> CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
143 <1> CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
144 <1> CODEC_LR_ADCRATE_REG equ 32h ; PCM in sample rate
145 <1> CODEC_MIC_ADCRATE_REG equ 34h ; mic in sample rate
146 <1>
147 <1> ; registers 36-7a are reserved on the ICH
148 <1>
149 <1> CODEC_VENDORID1_REG equ 7ch ; codec vendor ID 1
150 <1> CODEC_VENDORID2_REG equ 7eh ; codec vendor ID 2
151 <1>
152 <1> ; Mixer registers 0 through 51h reside in the ICH and are not forwarded over
153 <1> ; the AC97 link to the codec, which I think is a little weird. Looks like
154 <1> ; the ICH makes it so you don't need a fully functional codec to play audio?
155 <1> ;
156 <1> ; whenever 2 codecs are present in the system, use BIT7 to access the 2nd
157 <1> ; set of registers, ie 80h-feh
158 <1>
159 <1> PRIMARY_CODEC equ 0 ; 0-7F for primary codec
160 <1> SECONDARY_CODEC equ BIT7 ; 80-8f registers for 2ndary
161 <1>
162 <1> SAMPLE_RATE_441khz equ 44100 ; 44.1Khz (cd quality) rate
163 <1>
164 <1> ; ----------------------------------------------------------------------------
165 <1> ; 17/02/2017
166 <1> PCI_IO_BASE equ 10h ; = NAMBAR register offset
167 <1> AC97_INT_LINE equ 3Ch ; AC97 Interrupt Line register offset
168 <1>
169 <1> ; ----------------------------------------------------------------------------
170 <1> ; ICH2AC97.INC
171 <1> ; ----------------------------------------------------------------------------
172 <1>
173 <1> ; PCI stuff
174 <1>
175 <1> ; Intel ICH2 equates. It is assumed that ICH0 and plain ole ICH are compatible.
176 <1>
177 <1> INTEL_VID equ 8086h ; Intel's PCI vendor ID
178 <1> ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
179 <1> SIS_VID equ 1039h
180 <1> NVIDIA_VID equ 10DEh ; Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source c.
181 <1> AMD_VID equ 1022h
182 <1>
183 <1> ICH_DID equ 2415h ; ICH device ID
184 <1> ICH0_DID equ 2425h ; ICH0
185 <1> ICH2_DID equ 2445h ; ICH2 I think there are more ICHes.
186 <1> ; they all should be compatible.
187 <1>
188 <1> ; 17/02/2017 (Erdogan Tan, ref: ALSA Device IDs, ALSA project)
189 <1> ICH3_DID equ 2485h ; ICH3
190 <1> ICH4_DID equ 24C5h ; ICH4
191 <1> ICH5_DID equ 24D5h ; ICH5
192 <1> ICH6_DID equ 266Eh ; ICH6
193 <1> ESB6300_DID equ 25A6h ; 6300ESB
194 <1> ESB631X_DID equ 2698h ; 631XESB
195 <1> ICH7_DID equ 27DEh ; ICH7
196 <1> ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
197 <1> MX82440_DID equ 7195h
198 <1> SI7012_DID equ 7012h
199 <1> NFORCE_DID equ 01B1h
200 <1> NFORCE2_DID equ 006Ah
201 <1> AMD8111_DID equ 746Dh
202 <1> AMD768_DID equ 7445h
203 <1> ; 03/11/2023 - Erdogan Tan - Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source code
204 <1> CK804_DID equ 0059h
205 <1> MCP04_DID equ 003Ah
206 <1> CK8_DID equ 008Ah
207 <1> NFORCE3_DID equ 00DAh
208 <1> CK8S_DID equ 00EAh
209 <1>
210 <1> NAMBAR_REG equ 10h ; native audio mixer BAR
211 <1> NAM_SIZE equ 256 ; 256 bytes required.
212 <1>
213 <1> NABMBAR_REG equ 14h ; native audio bus mastering BAR
214 <1> NABM_SIZE equ 64 ; 64 bytes
215 <1>
216 <1> ; BUS master registers, accessed via NABMBAR+offset
217 <1>
218 <1> ; ICH supports 3 different types of register sets for three types of things
219 <1> ; it can do, thus:
220 <1> ;
221 <1> ; PCM in (for recording) aka PI
222 <1> ; PCM out (for playback) aka PO
223 <1> ; MIC in (for recording) aka MC
224 <1>
225 <1> PI_BDBAR_REG equ 0 ; PCM in buffer descriptor BAR
226 <1> PO_BDBAR_REG equ 10h ; PCM out buffer descriptor BAR
227 <1> MC_BDBAR_REG equ 20h ; MIC in buffer descriptor BAR
228 <1>
229 <1> ; each buffer descriptor BAR holds a pointer which has entries to the buffer
230 <1> ; contents of the .WAV file we're going to play. Each entry is 8 bytes long
231 <1> ; (more on that later) and can contain 32 entries total, so each BAR is
232 <1> ; 256 bytes in length, thus:
233 <1>
234 <1> BDL_SIZE equ 32*8 ; Buffer Descriptor List size
235 <1> INDEX_MASK equ 31 ; indexes must be 0-31
236 <1>
237 <1>
238 <1>
239 <1> PI_CIV_REG equ 4 ; PCM in current Index value (RO)
240 <1> PO_CIV_REG equ 14h ; PCM out current Index value (RO)
241 <1> MC_CIV_REG equ 24h ; MIC in current Index value (RO)
242 <1> ;8bit read only
243 <1> ; each current index value is simply a pointer showing us which buffer
244 <1> ; (0-31) the codec is currently processing. Once this counter hits 31, it
245 <1> ; wraps back to 0.
246 <1> ; this can be handy to know, as once it hits 31, we're almost out of data to
247 <1> ; play back or room to record!
248 <1>
249 <1>
250 <1> PI_LVI_REG equ 5 ; PCM in Last Valid Index
251 <1> PO_LVI_REG equ 15h ; PCM out Last Valid Index
252 <1> MC_LVI_REG equ 25h ; MIC in Last Valid Index
253 <1> ;8bit read/write
254 <1> ; The Last Valid Index is a number (0-31) to let the codec know what buffer
255 <1> ; number to stop on after processing. It could be very nasty to play audio
256 <1> ; from buffers that aren't filled with the audio we want to play.
257 <1>
258 <1>
259 <1> PI_SR_REG equ 6 ; PCM in Status register
260 <1> PO_SR_REG equ 16h ; PCM out Status register
261 <1> MC_SR_REG equ 26h ; MIC in Status register
262 <1> ;16bit read/write
263 <1> ; status registers. Bitfields follow:
264 <1>
265 <1> FIFO_ERR equ BIT4 ; FIFO Over/Underrun W1TC.
266 <1>
267 <1> BCIS equ BIT3 ; buffer completion interrupt status.
268 <1> ; Set whenever the last sample in ANY
269 <1> ; buffer is finished. Bit is only
270 <1> ; set when the Interrupt on Complete
271 <1> ; (BIT4 of control reg) is set.
272 <1>
273 <1> LVBCI equ BIT2 ; Set whenever the codec has processed
274 <1> ; the last buffer in the buffer list.
275 <1> ; Will fire an interrupt if IOC bit is
276 <1> ; set. Probably set after the last
277 <1> ; sample in the last buffer is
278 <1> ; processed. W1TC
279 <1>
280 <1> ;
281 <1> CELV equ BIT1 ; Current buffer == last valid.
282 <1> ; Bit is RO and remains set until LVI is
283 <1> ; cleared. Probably set up the start
284 <1> ; of processing for the last buffer.
285 <1>
286 <1>
287 <1> DCH equ BIT0 ; DMA controller halted.
288 <1> ; set whenever audio stream is stopped
289 <1> ; or something else goes wrong.
290 <1>
291 <1>
292 <1> PI_PICB_REG equ 8 ; PCM in position in current buffer(RO)
293 <1> PO_PICB_REG equ 18h ; PCM out position in current buffer(RO)
294 <1> MC_PICB_REG equ 28h ; MIC in position in current buffer (RO)
295 <1> ;16bit read only
296 <1> ; position in current buffer regs show the number of dwords left to be
297 <1> ; processed in the current buffer.
298 <1> ;
299 <1>
300 <1> PI_PIV_REG equ 0ah ; PCM in Prefected index value
301 <1> PO_PIV_REG equ 1ah ; PCM out Prefected index value
302 <1> MC_PIV_REG equ 2ah ; MIC in Prefected index value
303 <1> ;8bit, read only
304 <1> ; Prefetched index value register.
305 <1> ; tells which buffer number (0-31) has be prefetched. I'd imagine this
306 <1> ; value follows the current index value fairly closely. (CIV+1)
307 <1> ;
308 <1>
309 <1>
310 <1> PI_CR_REG equ 0bh ; PCM in Control Register
311 <1> PO_CR_REG equ 1bh ; PCM out Control Register
312 <1> MC_CR_REG equ 2bh ; MIC in Control Register
313 <1> ; 8bit
314 <1> ; Control register *MUST* only be accessed as an 8bit value.
315 <1> ; Control register. See bitfields below.
316 <1> ;
317 <1>
318 <1>
319 <1> IOCE equ BIT4 ; interrupt on complete enable.
320 <1> ; set this bit if you want an intrtpt
321 <1> ; to fire whenever LVBCI is set.
322 <1> FEIFE equ BIT3 ; set if you want an interrupt to fire
323 <1> ; whenever there is a FIFO (over or
324 <1> ; under) error.
325 <1> LVBIE equ BIT2 ; last valid buffer interrupt enable.
326 <1> ; set if you want an interrupt to fire
327 <1> ; whenever the completion of the last
328 <1> ; valid buffer.
329 <1> RR equ BIT1 ; reset registers. Nukes all regs
330 <1> ; except bits 4:2 of this register.
331 <1> ; Only set this bit if BIT 0 is 0
332 <1> RPBM equ BIT0 ; Run/Pause
333 <1> ; set this bit to start the codec!
334 <1>
335 <1>
336 <1> GLOB_CNT_REG equ 2ch ; Global control register
337 <1> SEC_RES_EN equ BIT5 ; secondary codec resume event
338 <1> ; interrupt enable. Not used here.
339 <1> PRI_RES_EN equ BIT4 ; ditto for primary. Not used here.
340 <1> ACLINK_OFF equ BIT3 ; Turn off the AC97 link
341 <1> ACWARM_RESET equ BIT2 ; Awaken the AC97 link from sleep.
342 <1> ; registers preserved, bit self clears
343 <1> ACCOLD_RESET equ BIT1 ; Reset everything in the AC97 and
344 <1> ; reset all registers. Not self clearing
345 <1>
346 <1> GPIIE equ BIT0 ; GPI Interrupt enable.
347 <1> ; set if you want an interrupt to
348 <1> ; fire upon ANY of the bits in the
349 <1> ; GPI (general pursose inputs?) not used.
350 <1>
351 <1> GLOB_STS_REG equ 30h ; Global Status register (RO)
352 <1>
353 <1> MD3 equ BIT17 ; modem powerdown status (yawn)
354 <1> AD3 equ BIT16 ; Audio powerdown status (yawn)
355 <1> RD_COMPLETE_STS equ BIT15 ; Codec read timed out. 0=normal
356 <1> BIT3SLOT12 equ BIT14 ; shadowed status of bit 3 in slot 12
357 <1> BIT2SLOT12 equ BIT13 ; shadowed status of bit 2 in slot 12
358 <1> BIT1SLOT12 equ BIT12 ; shadowed status of bit 1 in slot 12
359 <1> SEC_RESUME_STS equ BIT11 ; secondary codec has resumed (and irqed)
360 <1> PRI_RESUME_STS equ BIT10 ; primary codec has resumed (and irqed)
361 <1> SEC_CODEC_RDY equ BIT9 ; secondary codec is ready for action
362 <1> PRI_CODEC_RDY equ BIT8 ; Primary codec is ready for action
363 <1> ; software must check these bits before
364 <1> ; starting the codec!
365 <1> MIC_IN_IRQ equ BIT7 ; MIC in caused an interrupt
366 <1> PCM_OUT_IRQ equ BIT6 ; One of the PCM out channels IRQed
367 <1> PCM_IN_IRQ equ BIT5 ; One of the PCM in channels IRQed
368 <1> MODEM_OUT_IRQ equ BIT2 ; modem out channel IRQed
369 <1> MODEM_IN_IRQ equ BIT1 ; modem in channel IRQed
370 <1> GPI_STS_CHANGE equ BIT0 ; set whenever GPI's have changed.
371 <1> ; BIT0 of slot 12 also reflects this.
372 <1>
373 <1> ACC_SEMA_REG equ 34h ; Codec write semiphore register
374 <1> CODEC_BUSY equ BIT0 ; codec register I/O is happening
375 <1> ; self clearing
376 <1> ;
377 <1> ; Buffer Descriptors List
378 <1> ; As stated earlier, each buffer descriptor list is a set of (up to) 32
379 <1> ; descriptors, each 8 bytes in length. Bytes 0-3 of a descriptor entry point
380 <1> ; to a chunk of memory to either play from or record to. Bytes 4-7 of an
381 <1> ; entry describe various control things detailed below.
382 <1> ;
383 <1> ; Buffer pointers must always be aligned on a Dword boundry.
384 <1> ;
385 <1>
386 <1> IOC equ BIT31 ; Fire an interrupt whenever this
387 <1> ; buffer is complete.
388 <1>
389 <1> BUP equ BIT30 ; Buffer Underrun Policy.
390 <1> ; if this buffer is the last buffer
391 <1> ; in a playback, fill the remaining
392 <1> ; samples with 0 (silence) or not.
393 <1> ; It's a good idea to set this to 1
394 <1> ; for the last buffer in playback,
395 <1> ; otherwise you're likely to get a lot
396 <1> ; of noise at the end of the sound.
397 <1>
398 <1> ;
399 <1> ; Bits 15:0 contain the length of the buffer, in number of samples, which
400 <1> ; are 16 bits each, coupled in left and right pairs, or 32bits each.
401 <1> ; Luckily for us, that's the same format as .wav files.
402 <1> ;
403 <1> ; A value of FFFF is 65536 samples. Running at 44.1Khz, that's just about
404 <1> ; 1.5 seconds of sample time. FFFF * 32bits is 1FFFFh bytes or 128k of data.
405 <1> ;
406 <1> ; A value of 0 in these bits means play no samples.
407 <1> ;
408 <1>
409 <1> ; 11/11/2023
410 <1> CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
411 <1> CODEC_REG_POWERDOWN equ 26h
24
25 _STARTUP:
26
27 ; memory allocation
28
29 00000000 E85A01 call setFree ; deallocate unused DOS mem
30
31 ; 17/02/2017
32 ; Clear BSS (uninitialized data) area
33 00000003 31C0 xor ax, ax ; 0
34 00000005 B91A6E mov cx, (EOF - bss_start)/2
35 00000008 BF[E61D] mov di, bss_start
36 0000000B F3AB rep stosw
37
38 ; allocate 256 bytes of data for DCM_OUT Buffer Descriptor List. (BDL)
39
40 0000000D B81000 mov ax, BDL_SIZE / 16
41 00000010 E85201 call memAlloc
42 00000013 A3[121E] mov [BDL_BUFFER], ax ; segment
43
44 ; allocate 2 buffers, 64k each for now.
45
46 00000016 B80010 mov ax, BUFFERSIZE / 16 ; 64k for .WAV file
47 00000019 E84901 call memAlloc
48 0000001C A3[141E] mov [WAV_BUFFER1], ax ; segment
49
50 0000001F B80010 mov ax, BUFFERSIZE / 16
51 00000022 E84001 call memAlloc
52 00000025 A3[161E] mov [WAV_BUFFER2], ax
53
54 ; Detect/reset AC97
55
56 00000028 E8AD02 call pciFindDevice
57 0000002B 7342 jnc short _1
58
59 ; couldn't find the audio device!
60
61 0000002D 0E push cs
62 0000002E 1F pop ds
63 0000002F BA[3900] mov dx, noDevMsg
64 00000032 B409 mov ah, 9
65 00000034 CD21 int 21h
66 00000036 E91401 jmp exit
67
68 ; 17/02/2017
69 00000039 4572726F723A20556E- noDevMsg: db "Error: Unable to find intel ICH based audio device!",CR,LF,"$"
69 00000042 61626C6520746F2066-
69 0000004B 696E6420696E74656C-
69 00000054 204943482062617365-
69 0000005D 6420617564696F2064-
69 00000066 6576696365210D0A24
70
71 _1:
72 ; eax = BUS/DEV/FN
73 ; 00000000BBBBBBBBDDDDDFFF00000000
74 ; edx = DEV/VENDOR
75 ; DDDDDDDDDDDDDDDDVVVVVVVVVVVVVVVV
76
77 0000006F 66A3[181E] mov [bus_dev_fn], eax
78 00000073 668916[1C1E] mov [dev_vendor], edx
79
80 ; get ICH base address regs for mixer and bus master
81
82 00000078 B010 mov al, NAMBAR_REG
83 0000007A E8CD01 call pciRegRead16 ; read PCI registers 10-11
84 ;and dx, IO_ADDR_MASK ; mask off BIT0
85 ; 19/05/2024
86 0000007D 80E2FE and dl, 0FEh
87
88 00000080 8916[0E1E] mov [NAMBAR], dx ; save audio mixer base addr
89
90 00000084 B014 mov al, NABMBAR_REG
91 00000086 E8C101 call pciRegRead16
92 ;and dx, IO_ADDR_MASK
93 ; 19/05/2024
94 00000089 80E2C0 and dl, 0C0h
95
96 0000008C 8916[101E] mov [NABMBAR], dx ; save bus master base addr
97
98 ; 06/11/2023
99 ;; init controller
100 ;; 17/02/2017
101 ;mov al, PCI_CMD_REG ; command register (04h)
102 ;call pciRegRead16 ; pciRegRead8
103 ;
104 ;; eax = BUS/DEV/FN/REG
105 ;; dx = PCI Command Register Content ; 17/02/2017
106 ;; 00000000CCCCCCCC
107 ;mov [stats_cmd], dx
108 ;
109 ; 06/11/2023
110 ;mov al, PCI_IO_BASE ; IO base address register (10h)
111 ;call pciRegRead32
112 ;
113 ;and dx, 0FFC0h ; IO_ADDR_MASK (0FFFE) ?
114 ;mov [ac97_io_base], dx
115
116 00000090 B03C mov al, AC97_INT_LINE ; Interrupt line register (3Ch)
117 00000092 E8AD01 call pciRegRead8 ; 17/02/2017
118
119 00000095 8816[051E] mov [ac97_int_ln_reg], dl
120
121 ; 09/11/2023
122 ; 05/11/2023
123 %if 1
124 ; 28/11/2016
125 ;mov bx, 1 ; 08/05/2024
126 00000099 30F6 xor dh, dh ; 17/02/2017
127 ; 10/11/2023
128 ;mov cx, dx
129 ;shl bx, cl
130
131 ; 04/11/2023
132 0000009B FA cli
133
134 ;not bx
135 0000009C E4A1 in al, 0A1h ; irq 8-15
136 0000009E 88C4 mov ah, al
137 000000A0 E421 in al, 21h ; irq 0-7
138
139 ; 04/11/2023
140 ; save IRQ status
141 000000A2 A3[081E] mov [IRQ_status], ax
142
143 ;and ax, bx ; unmask
144 000000A5 0FB3D0 btr ax, dx ; unmask
145 000000A8 E621 out 21h, al ; enable interrupt (if irq <= 7)
146 000000AA 88E0 mov al, ah
147 000000AC E6A1 out 0A1h, al ; enable interrupt (if irq > 7)
148 ;not bx
149
150 ; 04/11/2023
151 ;mov dx, 4D1h ;8259 ELCR1
152 ;in al, dx
153 ;mov ah, al
154 ;mov dx, 4D0h
155 ;in al, dx
156 ;;or ax, bx
157 ;bts ax, cx
158 ;mov dx, 4D0h
159 ;out dx, al ;set level-triggered mode
160 ;mov al, ah
161 ;mov dx, 4D1h
162 ;out dx, al ;set level-triggered mode
163
164 ; 24/11/2016 - Erdogan Tan
165 ;mov bx, cx
166 ; 10/11/2023
167 000000AE 89D3 mov bx, dx
168 000000B0 8A9F[311C] mov bl, [bx+irq_int]
169 000000B4 C1E302 shl bx, 2 ; * 4
170
171 ; set up interrupt vector
172 ; 30/11/2016
173 000000B7 06 push es
174 000000B8 31C0 xor ax, ax
175 000000BA 8EC0 mov es, ax
176 ; 04/11/2023
177 ; save interrupt vector
178 000000BC 268B07 mov ax, [es:bx]
179 000000BF A3[0A1E] mov [IRQ_vector], ax
180 000000C2 268B4702 mov ax, [es:bx+2]
181 000000C6 A3[0C1E] mov [IRQ_vector+2], ax
182
183 000000C9 26C707[A01B] mov word [es:bx], ac97_int_handler
184 000000CE 8CC8 mov ax, cs
185 000000D0 26894702 mov [es:bx+2], ax
186 000000D4 07 pop es
187
188 ; 04/11/2023
189 000000D5 FB sti
190
191 %endif
192 000000D6 E82019 call write_ac97_dev_info
193
194 ; check the command line for a file to play
195
196 ;push ds
197 000000D9 E89200 call processCmdline ; get the filename
198
199 ; open the file
200 000000DC B002 mov al, OPEN ; open existing file
201 000000DE E8AD00 call openFile ; no error? ok.
202 ;pop ds
203 000000E1 7322 jnc short _gsr
204
205 ; file not found!
206
207 ;push cs
208 ;pop ds
209 000000E3 BA[EC00] mov dx, noFileErrMsg
210 000000E6 B409 mov ah, 9
211 000000E8 CD21 int 21h
212 000000EA EB61 jmp exit
213
214 noFileErrMsg:
215 000000EC 4572726F723A206669- db "Error: file not found.",CR,LF,"$"
215 000000F5 6C65206E6F7420666F-
215 000000FE 756E642E0D0A24
216
217 _gsr:
218 00000105 E8AD00 call getSampleRate ; read the sample rate
219 ; pass it onto codec.
220 00000108 7243 jc short exit ; 19/11/2016 - nothing to do
221
222 0000010A A3[201E] mov [sample_rate], ax
223
224 ; 19/11/2016
225 0000010D 880E[221E] mov [stmo], cl
226 00000111 8816[241E] mov [bps], dl
227
228 ; 17/02/2017
229 00000115 C606[261E]00 mov byte [fbs_shift], 0 ; 0 = stereo and 16 bit
230 0000011A FEC9 dec cl
231 0000011C 7504 jnz short _gsr_1 ; stereo
232 0000011E FE06[261E] inc byte [fbs_shift] ; 1 = mono or 8 bit
233 _gsr_1:
234 00000122 80FA08 cmp dl, 8
235 00000125 7704 ja short _gsr_2 ; 16 bit samples
236 00000127 FE06[261E] inc byte [fbs_shift] ; 2 = mono and 8 bit
237 _gsr_2:
238 0000012B E8211A call write_sample_rate
239
240 ; 05/11/2023
241 _2:
242 0000012E E85E07 call check4keyboardstop ; flush keyboard buffer
243 00000131 72FB jc short _2 ; 07/11/2023
244
245 ; 09/11/2023
246 ;; 05/11/2023
247 ;mov eax, [bus_dev_fn]
248 ;mov al, PCI_CMD_REG
249 ;call pciRegRead16 ; read PCI command register
250 ;; 17/02/2017
251 ;;mov dx, [stats_cmd]
252 ;or dl, IO_ENA+BM_ENA ; enable IO and bus master
253 ;call pciRegWrite16 ; pciRegWrite8
254
255 ;; 06/11/2023
256 ;;mov eax, [bus_dev_fn]
257 ;;mov al, PCI_CMD_REG
258 ;;call pciRegRead8 ; read PCI command register
259 ;;or dl, IO_ENA+BM_ENA ; enable IO and bus master
260 ;;call pciRegWrite8
261
262 ; setup the Codec (actually mixer registers)
263 00000133 E8E401 call codecConfig ; unmute codec, set rates.
264 ; 11/11/2023
265 00000136 721C jc short init_err
266 ;
267 ; position file pointer to start in actual wav data
268 ; MUCH improvement should really be done here to check if sample size is
269 ; supported, make sure there are 2 channels, etc.
270 ;
271 00000138 B442 mov ah, 42h
272 0000013A B000 mov al, 0 ; from start of file
273 0000013C 8B1E[021E] mov bx, [filehandle]
274 00000140 31C9 xor cx, cx
275 00000142 BA2C00 mov dx, 44 ; jump past .wav/riff header
276 00000145 CD21 int 21h
277
278 ; play the .wav file. Most of the good stuff is in here.
279
280 00000147 E88503 call playWav
281
282 ; close the .wav file and exit.
283
284 close_exit: ; 11/11/2023
285 0000014A E85300 call closeFile
286
287 exit:
288 0000014D B8004C mov ax, 4c00h
289 00000150 CD21 int 21h
290
291 here:
292 00000152 EBFE jmp short here
293
294 ; 11/11/2023
295 init_err:
296 00000154 BA[7C1D] mov dx, msg_init_err
297 vra_err: ; 12/11/2023
298 00000157 B409 mov ah, 9
299 00000159 CD21 int 21h
300 0000015B EBED jmp short close_exit
301
302 ; MEMALLOC.ASM
303 ;-- SETFREE: Release memory not used ----------------
304 ;-- Input : ES = address of PSP
305 ;-- Output : none
306 ;-- Register : AX, BX, CL and FLAGS are changed
307 ;-- Info : Since the stack-segment is always the last segment in an
308 ; EXE-file, ES:0000 points to the beginning and SS:SP
309 ; to the end of the program in memory. Through this the
310 ; length of the program can be calculated
311 ; call this routine once at the beginning of the program to free up memory
312 ; assigned to it by DOS.
313
314 setFree:
315 0000015D BB0010 mov bx, 65536/16 ; 4K paragraphs ; 17/02/2017 (Erdogan Tan)
316
317 00000160 B44A mov ah, 4ah ; pass new length to DOS
318 00000162 CD21 int 21h
319
320 00000164 C3 retn ; back to caller
321 ; new size (allocated memory) = 64KB
322
323 memAlloc:
324 ; input: AX = # of paragraphs required
325 ; output: AX = segment of block to use
326
327 00000165 53 push bx
328 00000166 89C3 mov bx, ax
329 00000168 B448 mov ah, 48h
330 0000016A CD21 int 21h
331 0000016C 5B pop bx
332 0000016D C3 retn
333
334 ; CMDLINE.ASM
335 ; parse the command line
336 ; entry: none
337 ; exit: DS:DX to the 1st supplied item on the command line
338
339 processCmdline:
340 0000016E 53 push bx
341 0000016F 56 push si
342
343 ;mov ah, 51h
344 ;int 21h
345 ;mov ds, bx
346
347 00000170 BE8000 mov si, 80h
348 00000173 0FB61C movzx bx, byte [si]
349 00000176 01DE add si, bx
350 00000178 46 inc si
351
352 00000179 C60400 mov byte [si], NULL ; zero terminate
353
354 0000017C BE8100 mov si, 81h
355
356 cmdlineloop:
357 0000017F AC lodsb
358
359 00000180 3C00 cmp al, NULL ; found end of line?
360 00000182 7404 je short exitpc
361 00000184 3C20 cmp al, ' ' ; found a space?
362 00000186 74F7 je short cmdlineloop
363
364 ; must be the filename here.
365 exitpc:
366 00000188 4E dec si ; point to start of filename
367 00000189 89F2 mov dx, si
368 0000018B 5E pop si
369 0000018C 5B pop bx
370 0000018D C3 retn
371
372 ; FILE.ASM
373 ;open or create file
374 ;
375 ;input: ds:dx-->filename (asciiz)
376 ; al=file Mode (create or open)
377 ;output: none cs:[filehandle] filled
378 ;
379 openFile:
380 0000018E 50 push ax
381 0000018F 51 push cx
382 00000190 B43B mov ah, 3bh ; start with a mode
383 00000192 00C4 add ah, al ; add in create or open mode
384 00000194 31C9 xor cx, cx
385 00000196 CD21 int 21h
386 00000198 7203 jc short _of1
387 ;mov [cs:filehandle], ax
388 0000019A A3[021E] mov [filehandle], ax
389 _of1:
390 0000019D 59 pop cx
391 0000019E 58 pop ax
392 0000019F C3 retn
393
394 ; close the currently open file
395 ; input: none, uses cs:[filehandle]
396 closeFile:
397 000001A0 50 push ax
398 000001A1 53 push bx
399 000001A2 833E[021E]FF cmp word [filehandle], -1
400 000001A7 7409 jz short _cf1
401 000001A9 8B1E[021E] mov bx, [filehandle]
402 000001AD B8003E mov ax,3e00h
403 000001B0 CD21 int 21h ;close file
404 _cf1:
405 000001B2 5B pop bx
406 000001B3 58 pop ax
407 000001B4 C3 retn
408
409 getSampleRate:
410 ; 08/12/2016
411 ; reads the sample rate from the .wav file.
412 ; entry: none - assumes file is already open
413 ; 19/11/2016 - Erdogan Tan
414 ; exit: ax = sample rate (11025, 22050, 44100, 48000)
415 ; cx = number of channels (mono=1, stereo=2)
416 ; dx = bits per sample (8, 16)
417
418 000001B5 53 push bx
419
420 000001B6 B442 mov ah, 42h
421 000001B8 B000 mov al, 0 ; from start of file
422 000001BA 8B1E[021E] mov bx, [filehandle]
423 000001BE 31C9 xor cx, cx
424 000001C0 BA0800 mov dx, 08h ; "WAVE"
425 000001C3 CD21 int 21h
426
427 000001C5 BA[E61D] mov dx, smpRBuff
428 000001C8 B91C00 mov cx, 28 ; 28 bytes
429 000001CB B43F mov ah, 3fh
430 000001CD CD21 int 21h
431
432 000001CF 813E[E61D]5741 cmp word [smpRBuff], 'WA'
433 000001D5 751C jne short gsr_stc
434
435 000001D7 813E[E81D]5645 cmp word [smpRBuff+2], 'VE'
436 000001DD 7514 jne short gsr_stc
437
438 000001DF 833E[F21D]01 cmp word [smpRBuff+12], 1 ; Offset 20, must be 1 (= PCM)
439 000001E4 750D jne short gsr_stc
440
441
442 000001E6 8B0E[F41D] mov cx, [smpRBuff+14] ; return num of channels in CX
443 000001EA A1[F61D] mov ax, [smpRBuff+16] ; return sample rate in AX
444 000001ED 8B16[001E] mov dx, [smpRBuff+26] ; return bits per sample value in DX
445 gsr_retn:
446 000001F1 5B pop bx
447 000001F2 C3 retn
448
449 gsr_stc:
450 000001F3 F9 stc
451 000001F4 EBFB jmp short gsr_retn
452
453 ;%include 'ac97.asm' ; 29/11/2016 (AC97 codec configuration)
454 %include 'ac97_vra.asm' ; 19/11/2023 (AC97 codec configuration)
1 <1> ; 19/05/2024
2 <1> ; 19/11/2023
3 <1> ; (ready status optimization -in order to prevent wrong init error- )
4 <1> ; 18/11/2023
5 <1> ; 15/11/2023
6 <1> ; 13/11/2023
7 <1> ; 12/11/2023
8 <1> ; 11/11/2023
9 <1> ; 03/11/2023 - 06/11/2023
10 <1> ; PCI and AC97 codec functions for wav player
11 <1> ; Erdogan Tan (17/02/2017)
12 <1>
13 <1> ; ----------------------------------------------------------------------------
14 <1> ; PCI.ASM
15 <1> ; ----------------------------------------------------------------------------
16 <1>
17 <1> ; PCI device register reader/writers.
18 <1> ; NASM version: Erdogan Tan (29/11/2016)
19 <1> ; Last Update: 17/02/2017
20 <1>
21 <1> ;===============================================================
22 <1> ; 8/16/32bit PCI reader
23 <1> ;
24 <1> ; Entry: EAX=PCI Bus/Device/fn/register number
25 <1> ; BIT30 set if 32 bit access requested
26 <1> ; BIT29 set if 16 bit access requested
27 <1> ; otherwise defaults to 8 bit read
28 <1> ;
29 <1> ; Exit: DL,DX,EDX register data depending on requested read size
30 <1> ;
31 <1> ; Note: this routine is meant to be called via pciRegRead8, pciRegread16,
32 <1> ; or pciRegRead32, listed below.
33 <1> ;
34 <1> ; Note2: don't attempt to read 32bits of data from a non dword aligned reg
35 <1> ; number. Likewise, don't do 16bit reads from non word aligned reg #
36 <1> ;
37 <1> pciRegRead:
38 000001F6 6653 <1> push ebx
39 000001F8 51 <1> push cx
40 000001F9 6689C3 <1> mov ebx, eax ; save eax, dh
41 000001FC 88F1 <1> mov cl, dh
42 000001FE 6625FFFFFFBF <1> and eax, (~PCI32)+PCI16 ; clear out data size request
43 00000204 660D00000080 <1> or eax, BIT31 ; make a PCI access request
44 0000020A 24FC <1> and al, ~3 ; NOT 3 ; force index to be dword
45 <1>
46 0000020C BAF80C <1> mov dx, PCI_INDEX_PORT
47 0000020F 66EF <1> out dx, eax ; write PCI selector
48 <1>
49 00000211 BAFC0C <1> mov dx, PCI_DATA_PORT
50 00000214 88D8 <1> mov al, bl
51 00000216 2403 <1> and al, 3 ; figure out which port to
52 00000218 00C2 <1> add dl, al ; read to
53 <1>
54 0000021A 66ED <1> in eax, dx ; do 32bit read
55 0000021C 66F7C300000080 <1> test ebx, PCI32
56 00000223 7403 <1> jz short _pregr1
57 <1>
58 00000225 6689C2 <1> mov edx, eax ; return 32bits of data
59 <1> _pregr1:
60 00000228 89C2 <1> mov dx, ax ; return 16bits of data
61 0000022A 66F7C3000000C0 <1> test ebx, PCI32+PCI16
62 00000231 7502 <1> jnz short _pregr2
63 00000233 88CE <1> mov dh, cl ; restore dh for 8 bit read
64 <1> _pregr2:
65 00000235 6689D8 <1> mov eax, ebx ; restore eax
66 00000238 6625FFFFFFBF <1> and eax, (~PCI32)+PCI16 ; clear out data size request
67 0000023E 59 <1> pop cx
68 0000023F 665B <1> pop ebx
69 00000241 C3 <1> retn
70 <1>
71 <1> pciRegRead8:
72 00000242 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 8 bit read size
73 00000248 EBAC <1> jmp short pciRegRead ; call generic PCI access
74 <1>
75 <1> pciRegRead16:
76 0000024A 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 16 bit read size
77 00000250 660D00000040 <1> or eax, PCI16 ; call generic PCI access
78 00000256 EB9E <1> jmp short pciRegRead
79 <1>
80 <1> pciRegRead32:
81 00000258 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 32 bit read size
82 0000025E 660D00000080 <1> or eax, PCI32 ; call generic PCI access
83 00000264 EB90 <1> jmp short pciRegRead
84 <1>
85 <1> ;===============================================================
86 <1> ; 8/16/32bit PCI writer
87 <1> ;
88 <1> ; Entry: EAX=PCI Bus/Device/fn/register number
89 <1> ; BIT31 set if 32 bit access requested
90 <1> ; BIT30 set if 16 bit access requested
91 <1> ; otherwise defaults to 8bit read
92 <1> ; DL/DX/EDX data to write depending on size
93 <1> ;
94 <1> ;
95 <1> ; note: this routine is meant to be called via pciRegWrite8, pciRegWrite16,
96 <1> ; or pciRegWrite32 as detailed below.
97 <1> ;
98 <1> ; Note2: don't attempt to write 32bits of data from a non dword aligned reg
99 <1> ; number. Likewise, don't do 16bit writes from non word aligned reg #
100 <1> ;
101 <1> pciRegWrite:
102 00000266 6653 <1> push ebx
103 00000268 51 <1> push cx
104 00000269 6689C3 <1> mov ebx, eax ; save eax, dx
105 0000026C 89D1 <1> mov cx, dx
106 0000026E 660D00000080 <1> or eax, BIT31 ; make a PCI access request
107 00000274 6625FFFFFFBF <1> and eax, ~PCI16 ; NOT PCI16 ; clear out data size request
108 0000027A 24FC <1> and al, ~3 ; NOT 3 ; force index to be dword
109 <1>
110 0000027C BAF80C <1> mov dx, PCI_INDEX_PORT
111 0000027F 66EF <1> out dx, eax ; write PCI selector
112 <1>
113 00000281 BAFC0C <1> mov dx, PCI_DATA_PORT
114 00000284 88D8 <1> mov al, bl
115 00000286 2403 <1> and al, 3 ; figure out which port to
116 00000288 00C2 <1> add dl, al ; write to
117 <1>
118 0000028A 6689D0 <1> mov eax, edx ; put data into eax
119 0000028D 89C8 <1> mov ax, cx
120 <1>
121 0000028F EE <1> out dx, al
122 00000290 66F7C3000000C0 <1> test ebx, PCI16+PCI32 ; only 8bit access? bail
123 00000297 740C <1> jz short _pregw1
124 <1>
125 00000299 EF <1> out dx, ax ; write 16 bit value
126 0000029A 66F7C300000040 <1> test ebx, PCI16 ; 16bit requested? bail
127 000002A1 7502 <1> jnz short _pregw1
128 <1>