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playwav5.lst
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playwav5.lst
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1 ; ****************************************************************************
2 ; PLAYWAV.ASM - ICH AC97 .wav player for DOS. PLAYWAV.COM
3 ; ----------------------------------------------------------------------------
4 ; Last Update: 20/05/2024 (Previous: 08/05/2024)
5 ; ----------------------------------------------------------------------------
6 ; Beginning: 17/02/2017
7 ; ----------------------------------------------------------------------------
8 ; Assembler: NASM version 2.15
9 ; nasm playwav.asm -l playwav.lst -o PLAYWAV.COM
10 ; ----------------------------------------------------------------------------
11 ; Derived from '.wav file player for DOS' Jeff Leyda, Sep 02, 2002
12 ; ****************************************************************************
13 ; Modidified from 'PLAYER.COM' for VIA VT8233 wav player source code by
14 ; (PLAYER.ASM) by Erdogan Tan (07/11/2016 - 08/12/2016)
15
16 ; AC97 interrupt version - 09/11/2023 - Erdogan Tan
17 ; sample rate conversion version - 13/11/2023 - Erdogan Tan
18 ; LVI interrupt version (instead of IOC) - 18/11/2023 - Erdogan Tan
19
20 [BITS 16]
21
22 [ORG 100h]
23
24 %include 'ac97.inc' ; 17/02/2017
1 <1> ; 11/11/2023
2 <1> ; 05/11/2023
3 <1> ; 03/11/2023
4 <1> ; 17/02/2017 (Erdogan Tan, PLAYWAV.ASM)
5 <1> ; constant.inc & codec.inc (for ICH AC97 wav player, 'PLAYWAV.COM')
6 <1>
7 <1> ; ----------------------------------------------------------------------------
8 <1> ; CONSTANT.INC
9 <1> ; ----------------------------------------------------------------------------
10 <1>
11 <1> ;constants of stuff that seem hard to remember at times.
12 <1>
13 <1> TRUE EQU 1
14 <1> FALSE EQU 0
15 <1>
16 <1> ENABLED EQU 1
17 <1> DISABLED EQU 0
18 <1>
19 <1> BIT0 EQU 1
20 <1> BIT1 EQU 2
21 <1> BIT2 EQU 4
22 <1> BIT3 EQU 8
23 <1> BIT4 EQU 10h
24 <1> BIT5 EQU 20h
25 <1> BIT6 EQU 40h
26 <1> BIT7 EQU 80h
27 <1> BIT8 EQU 100h
28 <1> BIT9 EQU 200h
29 <1> BIT10 EQU 400h
30 <1> BIT11 EQU 800h
31 <1> BIT12 EQU 1000h
32 <1> BIT13 EQU 2000h
33 <1> BIT14 EQU 4000h
34 <1> BIT15 EQU 8000h
35 <1> BIT16 EQU 10000h
36 <1> BIT17 EQU 20000h
37 <1> BIT18 EQU 40000h
38 <1> BIT19 EQU 80000h
39 <1> BIT20 EQU 100000h
40 <1> BIT21 EQU 200000h
41 <1> BIT22 EQU 400000h
42 <1> BIT23 EQU 800000h
43 <1> BIT24 EQU 1000000h
44 <1> BIT25 EQU 2000000h
45 <1> BIT26 EQU 4000000h
46 <1> BIT27 EQU 8000000h
47 <1> BIT28 EQU 10000000h
48 <1> BIT29 EQU 20000000h
49 <1> BIT30 EQU 40000000h
50 <1> BIT31 EQU 80000000h
51 <1>
52 <1> ;special characters
53 <1> NUL EQU 0
54 <1> NULL EQU 0
55 <1> BELL EQU 07
56 <1> BS EQU 08
57 <1> TAB EQU 09
58 <1> LF EQU 10
59 <1> CR EQU 13
60 <1> ESCAPE EQU 27 ;ESC is a reserved word....
61 <1>
62 <1>
63 <1> ;file stuff
64 <1> READONLY EQU BIT0
65 <1> HIDDEN EQU BIT1
66 <1> SYSTEM EQU BIT2
67 <1> VOLUME EQU BIT3 ;ignored for file access
68 <1> DIRECTORY EQU BIT4 ;must be 0 for file access
69 <1> ARCHIVE EQU BIT5
70 <1> SHAREABLE EQU BIT7 ;for novell networks
71 <1> OPEN EQU 2 ; open existing file
72 <1> CREATE EQU 1 ; create new file
73 <1>
74 <1>
75 <1> ; PCI equates
76 <1> ; PCI function address (PFA)
77 <1> ; bit 31 = 1
78 <1> ; bit 23:16 = bus number (0-255)
79 <1> ; bit 15:11 = device number (0-31)
80 <1> ; bit 10:8 = function number (0-7)
81 <1> ; bit 7:0 = register number (0-255)
82 <1>
83 <1> IO_ADDR_MASK EQU 0FFFEh ; mask off bit 0 for reading BARs
84 <1> PCI_INDEX_PORT EQU 0CF8h
85 <1> PCI_DATA_PORT EQU 0CFCh
86 <1> PCI32 EQU BIT31 ; bitflag to signal 32bit access
87 <1> PCI16 EQU BIT30 ; bitflag for 16bit access
88 <1>
89 <1> PCI_FN0 EQU 0 << 8
90 <1> PCI_FN1 EQU 1 << 8
91 <1> PCI_FN2 EQU 2 << 8
92 <1> PCI_FN3 EQU 3 << 8
93 <1> PCI_FN4 EQU 4 << 8
94 <1> PCI_FN5 EQU 5 << 8
95 <1> PCI_FN6 EQU 6 << 8
96 <1> PCI_FN7 EQU 7 << 8
97 <1>
98 <1> PCI_CMD_REG EQU 04h ; reg 04, command reg
99 <1> IO_ENA EQU BIT0 ; i/o decode enable
100 <1> MEM_ENA EQU BIT1 ; memory decode enable
101 <1> BM_ENA EQU BIT2 ; bus master enable
102 <1>
103 <1> ; ----------------------------------------------------------------------------
104 <1> ; CODEC.INC
105 <1> ; ----------------------------------------------------------------------------
106 <1>
107 <1> ;Codec registers.
108 <1> ;
109 <1> ;Not all codecs are created equal. Refer to the spec for your specific codec.
110 <1> ;
111 <1> ;All registers are 16bits wide. Access to codec registers over the AC97 link
112 <1> ;is defined by the OEM.
113 <1> ;
114 <1> ;Secondary codec's are accessed by ORing in BIT7 of all register accesses.
115 <1> ;
116 <1>
117 <1> ; each codec/mixer register is 16bits
118 <1>
119 <1> CODEC_RESET_REG equ 00 ; reset codec
120 <1> CODEC_MASTER_VOL_REG equ 02 ; master volume
121 <1> CODEC_HP_VOL_REG equ 04 ; headphone volume
122 <1> CODEC_MASTER_MONO_VOL_REG equ 06 ; master mono volume
123 <1> CODEC_MASTER_TONE_REG equ 08 ; master tone (R+L)
124 <1> CODEC_PCBEEP_VOL_REG equ 0ah ; PC beep volume
125 <1> CODEC_PHONE_VOL_REG equ 0bh ; phone volume
126 <1> CODEC_MIC_VOL_REG equ 0eh ; MIC volume
127 <1> CODEC_LINE_IN_VOL_REG equ 10h ; line input volume
128 <1> CODEC_CD_VOL_REG equ 12h ; CD volume
129 <1> CODEC_VID_VOL_REG equ 14h ; video volume
130 <1> CODEC_AUX_VOL_REG equ 16h ; aux volume
131 <1> CODEC_PCM_OUT_REG equ 18h ; PCM output volume
132 <1> CODEC_RECORD_SELECT_REG equ 1ah ; record select input
133 <1> CODEC_RECORD_VOL_REG equ 1ch ; record volume
134 <1> CODEC_RECORD_MIC_VOL_REG equ 1eh ; record mic volume
135 <1> CODEC_GP_REG equ 20h ; general purpose
136 <1> CODEC_3D_CONTROL_REG equ 22h ; 3D control
137 <1> ; 24h is reserved
138 <1> CODEC_POWER_CTRL_REG equ 26h ; powerdown control
139 <1> CODEC_EXT_AUDIO_REG equ 28h ; extended audio
140 <1> CODEC_EXT_AUDIO_CTRL_REG equ 2ah ; extended audio control
141 <1> CODEC_PCM_FRONT_DACRATE_REG equ 2ch ; PCM out sample rate
142 <1> CODEC_PCM_SURND_DACRATE_REG equ 2eh ; surround sound sample rate
143 <1> CODEC_PCM_LFE_DACRATE_REG equ 30h ; LFE sample rate
144 <1> CODEC_LR_ADCRATE_REG equ 32h ; PCM in sample rate
145 <1> CODEC_MIC_ADCRATE_REG equ 34h ; mic in sample rate
146 <1>
147 <1> ; registers 36-7a are reserved on the ICH
148 <1>
149 <1> CODEC_VENDORID1_REG equ 7ch ; codec vendor ID 1
150 <1> CODEC_VENDORID2_REG equ 7eh ; codec vendor ID 2
151 <1>
152 <1> ; Mixer registers 0 through 51h reside in the ICH and are not forwarded over
153 <1> ; the AC97 link to the codec, which I think is a little weird. Looks like
154 <1> ; the ICH makes it so you don't need a fully functional codec to play audio?
155 <1> ;
156 <1> ; whenever 2 codecs are present in the system, use BIT7 to access the 2nd
157 <1> ; set of registers, ie 80h-feh
158 <1>
159 <1> PRIMARY_CODEC equ 0 ; 0-7F for primary codec
160 <1> SECONDARY_CODEC equ BIT7 ; 80-8f registers for 2ndary
161 <1>
162 <1> SAMPLE_RATE_441khz equ 44100 ; 44.1Khz (cd quality) rate
163 <1>
164 <1> ; ----------------------------------------------------------------------------
165 <1> ; 17/02/2017
166 <1> PCI_IO_BASE equ 10h ; = NAMBAR register offset
167 <1> AC97_INT_LINE equ 3Ch ; AC97 Interrupt Line register offset
168 <1>
169 <1> ; ----------------------------------------------------------------------------
170 <1> ; ICH2AC97.INC
171 <1> ; ----------------------------------------------------------------------------
172 <1>
173 <1> ; PCI stuff
174 <1>
175 <1> ; Intel ICH2 equates. It is assumed that ICH0 and plain ole ICH are compatible.
176 <1>
177 <1> INTEL_VID equ 8086h ; Intel's PCI vendor ID
178 <1> ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
179 <1> SIS_VID equ 1039h
180 <1> NVIDIA_VID equ 10DEh ; Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source c.
181 <1> AMD_VID equ 1022h
182 <1>
183 <1> ICH_DID equ 2415h ; ICH device ID
184 <1> ICH0_DID equ 2425h ; ICH0
185 <1> ICH2_DID equ 2445h ; ICH2 I think there are more ICHes.
186 <1> ; they all should be compatible.
187 <1>
188 <1> ; 17/02/2017 (Erdogan Tan, ref: ALSA Device IDs, ALSA project)
189 <1> ICH3_DID equ 2485h ; ICH3
190 <1> ICH4_DID equ 24C5h ; ICH4
191 <1> ICH5_DID equ 24D5h ; ICH5
192 <1> ICH6_DID equ 266Eh ; ICH6
193 <1> ESB6300_DID equ 25A6h ; 6300ESB
194 <1> ESB631X_DID equ 2698h ; 631XESB
195 <1> ICH7_DID equ 27DEh ; ICH7
196 <1> ; 03/11/2023 - Erdogan Tan (Ref: MenuetOS AC97 WAV Player source code, 2004)
197 <1> MX82440_DID equ 7195h
198 <1> SI7012_DID equ 7012h
199 <1> NFORCE_DID equ 01B1h
200 <1> NFORCE2_DID equ 006Ah
201 <1> AMD8111_DID equ 746Dh
202 <1> AMD768_DID equ 7445h
203 <1> ; 03/11/2023 - Erdogan Tan - Ref: MPXPLAY/SBEMU/KOLIBRIOS AC97 source code
204 <1> CK804_DID equ 0059h
205 <1> MCP04_DID equ 003Ah
206 <1> CK8_DID equ 008Ah
207 <1> NFORCE3_DID equ 00DAh
208 <1> CK8S_DID equ 00EAh
209 <1>
210 <1> NAMBAR_REG equ 10h ; native audio mixer BAR
211 <1> NAM_SIZE equ 256 ; 256 bytes required.
212 <1>
213 <1> NABMBAR_REG equ 14h ; native audio bus mastering BAR
214 <1> NABM_SIZE equ 64 ; 64 bytes
215 <1>
216 <1> ; BUS master registers, accessed via NABMBAR+offset
217 <1>
218 <1> ; ICH supports 3 different types of register sets for three types of things
219 <1> ; it can do, thus:
220 <1> ;
221 <1> ; PCM in (for recording) aka PI
222 <1> ; PCM out (for playback) aka PO
223 <1> ; MIC in (for recording) aka MC
224 <1>
225 <1> PI_BDBAR_REG equ 0 ; PCM in buffer descriptor BAR
226 <1> PO_BDBAR_REG equ 10h ; PCM out buffer descriptor BAR
227 <1> MC_BDBAR_REG equ 20h ; MIC in buffer descriptor BAR
228 <1>
229 <1> ; each buffer descriptor BAR holds a pointer which has entries to the buffer
230 <1> ; contents of the .WAV file we're going to play. Each entry is 8 bytes long
231 <1> ; (more on that later) and can contain 32 entries total, so each BAR is
232 <1> ; 256 bytes in length, thus:
233 <1>
234 <1> BDL_SIZE equ 32*8 ; Buffer Descriptor List size
235 <1> INDEX_MASK equ 31 ; indexes must be 0-31
236 <1>
237 <1>
238 <1>
239 <1> PI_CIV_REG equ 4 ; PCM in current Index value (RO)
240 <1> PO_CIV_REG equ 14h ; PCM out current Index value (RO)
241 <1> MC_CIV_REG equ 24h ; MIC in current Index value (RO)
242 <1> ;8bit read only
243 <1> ; each current index value is simply a pointer showing us which buffer
244 <1> ; (0-31) the codec is currently processing. Once this counter hits 31, it
245 <1> ; wraps back to 0.
246 <1> ; this can be handy to know, as once it hits 31, we're almost out of data to
247 <1> ; play back or room to record!
248 <1>
249 <1>
250 <1> PI_LVI_REG equ 5 ; PCM in Last Valid Index
251 <1> PO_LVI_REG equ 15h ; PCM out Last Valid Index
252 <1> MC_LVI_REG equ 25h ; MIC in Last Valid Index
253 <1> ;8bit read/write
254 <1> ; The Last Valid Index is a number (0-31) to let the codec know what buffer
255 <1> ; number to stop on after processing. It could be very nasty to play audio
256 <1> ; from buffers that aren't filled with the audio we want to play.
257 <1>
258 <1>
259 <1> PI_SR_REG equ 6 ; PCM in Status register
260 <1> PO_SR_REG equ 16h ; PCM out Status register
261 <1> MC_SR_REG equ 26h ; MIC in Status register
262 <1> ;16bit read/write
263 <1> ; status registers. Bitfields follow:
264 <1>
265 <1> FIFO_ERR equ BIT4 ; FIFO Over/Underrun W1TC.
266 <1>
267 <1> BCIS equ BIT3 ; buffer completion interrupt status.
268 <1> ; Set whenever the last sample in ANY
269 <1> ; buffer is finished. Bit is only
270 <1> ; set when the Interrupt on Complete
271 <1> ; (BIT4 of control reg) is set.
272 <1>
273 <1> LVBCI equ BIT2 ; Set whenever the codec has processed
274 <1> ; the last buffer in the buffer list.
275 <1> ; Will fire an interrupt if IOC bit is
276 <1> ; set. Probably set after the last
277 <1> ; sample in the last buffer is
278 <1> ; processed. W1TC
279 <1>
280 <1> ;
281 <1> CELV equ BIT1 ; Current buffer == last valid.
282 <1> ; Bit is RO and remains set until LVI is
283 <1> ; cleared. Probably set up the start
284 <1> ; of processing for the last buffer.
285 <1>
286 <1>
287 <1> DCH equ BIT0 ; DMA controller halted.
288 <1> ; set whenever audio stream is stopped
289 <1> ; or something else goes wrong.
290 <1>
291 <1>
292 <1> PI_PICB_REG equ 8 ; PCM in position in current buffer(RO)
293 <1> PO_PICB_REG equ 18h ; PCM out position in current buffer(RO)
294 <1> MC_PICB_REG equ 28h ; MIC in position in current buffer (RO)
295 <1> ;16bit read only
296 <1> ; position in current buffer regs show the number of dwords left to be
297 <1> ; processed in the current buffer.
298 <1> ;
299 <1>
300 <1> PI_PIV_REG equ 0ah ; PCM in Prefected index value
301 <1> PO_PIV_REG equ 1ah ; PCM out Prefected index value
302 <1> MC_PIV_REG equ 2ah ; MIC in Prefected index value
303 <1> ;8bit, read only
304 <1> ; Prefetched index value register.
305 <1> ; tells which buffer number (0-31) has be prefetched. I'd imagine this
306 <1> ; value follows the current index value fairly closely. (CIV+1)
307 <1> ;
308 <1>
309 <1>
310 <1> PI_CR_REG equ 0bh ; PCM in Control Register
311 <1> PO_CR_REG equ 1bh ; PCM out Control Register
312 <1> MC_CR_REG equ 2bh ; MIC in Control Register
313 <1> ; 8bit
314 <1> ; Control register *MUST* only be accessed as an 8bit value.
315 <1> ; Control register. See bitfields below.
316 <1> ;
317 <1>
318 <1>
319 <1> IOCE equ BIT4 ; interrupt on complete enable.
320 <1> ; set this bit if you want an intrtpt
321 <1> ; to fire whenever LVBCI is set.
322 <1> FEIFE equ BIT3 ; set if you want an interrupt to fire
323 <1> ; whenever there is a FIFO (over or
324 <1> ; under) error.
325 <1> LVBIE equ BIT2 ; last valid buffer interrupt enable.
326 <1> ; set if you want an interrupt to fire
327 <1> ; whenever the completion of the last
328 <1> ; valid buffer.
329 <1> RR equ BIT1 ; reset registers. Nukes all regs
330 <1> ; except bits 4:2 of this register.
331 <1> ; Only set this bit if BIT 0 is 0
332 <1> RPBM equ BIT0 ; Run/Pause
333 <1> ; set this bit to start the codec!
334 <1>
335 <1>
336 <1> GLOB_CNT_REG equ 2ch ; Global control register
337 <1> SEC_RES_EN equ BIT5 ; secondary codec resume event
338 <1> ; interrupt enable. Not used here.
339 <1> PRI_RES_EN equ BIT4 ; ditto for primary. Not used here.
340 <1> ACLINK_OFF equ BIT3 ; Turn off the AC97 link
341 <1> ACWARM_RESET equ BIT2 ; Awaken the AC97 link from sleep.
342 <1> ; registers preserved, bit self clears
343 <1> ACCOLD_RESET equ BIT1 ; Reset everything in the AC97 and
344 <1> ; reset all registers. Not self clearing
345 <1>
346 <1> GPIIE equ BIT0 ; GPI Interrupt enable.
347 <1> ; set if you want an interrupt to
348 <1> ; fire upon ANY of the bits in the
349 <1> ; GPI (general pursose inputs?) not used.
350 <1>
351 <1> GLOB_STS_REG equ 30h ; Global Status register (RO)
352 <1>
353 <1> MD3 equ BIT17 ; modem powerdown status (yawn)
354 <1> AD3 equ BIT16 ; Audio powerdown status (yawn)
355 <1> RD_COMPLETE_STS equ BIT15 ; Codec read timed out. 0=normal
356 <1> BIT3SLOT12 equ BIT14 ; shadowed status of bit 3 in slot 12
357 <1> BIT2SLOT12 equ BIT13 ; shadowed status of bit 2 in slot 12
358 <1> BIT1SLOT12 equ BIT12 ; shadowed status of bit 1 in slot 12
359 <1> SEC_RESUME_STS equ BIT11 ; secondary codec has resumed (and irqed)
360 <1> PRI_RESUME_STS equ BIT10 ; primary codec has resumed (and irqed)
361 <1> SEC_CODEC_RDY equ BIT9 ; secondary codec is ready for action
362 <1> PRI_CODEC_RDY equ BIT8 ; Primary codec is ready for action
363 <1> ; software must check these bits before
364 <1> ; starting the codec!
365 <1> MIC_IN_IRQ equ BIT7 ; MIC in caused an interrupt
366 <1> PCM_OUT_IRQ equ BIT6 ; One of the PCM out channels IRQed
367 <1> PCM_IN_IRQ equ BIT5 ; One of the PCM in channels IRQed
368 <1> MODEM_OUT_IRQ equ BIT2 ; modem out channel IRQed
369 <1> MODEM_IN_IRQ equ BIT1 ; modem in channel IRQed
370 <1> GPI_STS_CHANGE equ BIT0 ; set whenever GPI's have changed.
371 <1> ; BIT0 of slot 12 also reflects this.
372 <1>
373 <1> ACC_SEMA_REG equ 34h ; Codec write semiphore register
374 <1> CODEC_BUSY equ BIT0 ; codec register I/O is happening
375 <1> ; self clearing
376 <1> ;
377 <1> ; Buffer Descriptors List
378 <1> ; As stated earlier, each buffer descriptor list is a set of (up to) 32
379 <1> ; descriptors, each 8 bytes in length. Bytes 0-3 of a descriptor entry point
380 <1> ; to a chunk of memory to either play from or record to. Bytes 4-7 of an
381 <1> ; entry describe various control things detailed below.
382 <1> ;
383 <1> ; Buffer pointers must always be aligned on a Dword boundry.
384 <1> ;
385 <1>
386 <1> IOC equ BIT31 ; Fire an interrupt whenever this
387 <1> ; buffer is complete.
388 <1>
389 <1> BUP equ BIT30 ; Buffer Underrun Policy.
390 <1> ; if this buffer is the last buffer
391 <1> ; in a playback, fill the remaining
392 <1> ; samples with 0 (silence) or not.
393 <1> ; It's a good idea to set this to 1
394 <1> ; for the last buffer in playback,
395 <1> ; otherwise you're likely to get a lot
396 <1> ; of noise at the end of the sound.
397 <1>
398 <1> ;
399 <1> ; Bits 15:0 contain the length of the buffer, in number of samples, which
400 <1> ; are 16 bits each, coupled in left and right pairs, or 32bits each.
401 <1> ; Luckily for us, that's the same format as .wav files.
402 <1> ;
403 <1> ; A value of FFFF is 65536 samples. Running at 44.1Khz, that's just about
404 <1> ; 1.5 seconds of sample time. FFFF * 32bits is 1FFFFh bytes or 128k of data.
405 <1> ;
406 <1> ; A value of 0 in these bits means play no samples.
407 <1> ;
408 <1>
409 <1> ; 11/11/2023
410 <1> CTRL_ST_CREADY equ BIT8+BIT9+BIT28 ; Primary Codec Ready
411 <1> CODEC_REG_POWERDOWN equ 26h
25
26 _STARTUP:
27
28 ; memory allocation
29
30 00000000 E85401 call setFree ; deallocate unused DOS mem
31
32 ; 17/02/2017
33 ; Clear BSS (uninitialized data) area
34 00000003 31C0 xor ax, ax ; 0
35 00000005 B91A6E mov cx, (EOF - bss_start)/2
36 00000008 BF[DB1D] mov di, bss_start
37 0000000B F3AB rep stosw
38
39 ; allocate 256 bytes of data for DCM_OUT Buffer Descriptor List. (BDL)
40
41 0000000D B81000 mov ax, BDL_SIZE / 16
42 00000010 E84C01 call memAlloc
43 00000013 A3[081E] mov [BDL_BUFFER], ax ; segment
44
45 ; allocate 2 buffers, 64k each for now.
46
47 00000016 B80010 mov ax, BUFFERSIZE / 16 ; 64k for .WAV file
48 00000019 E84301 call memAlloc
49 0000001C A3[0A1E] mov [WAV_BUFFER1], ax ; segment
50
51 0000001F B80010 mov ax, BUFFERSIZE / 16
52 00000022 E83A01 call memAlloc
53 00000025 A3[0C1E] mov [WAV_BUFFER2], ax
54
55 ; Detect/reset AC97
56
57 00000028 E8A702 call pciFindDevice
58 0000002B 7342 jnc short _1
59
60 ; couldn't find the audio device!
61
62 0000002D 0E push cs
63 0000002E 1F pop ds
64 0000002F BA[3900] mov dx, noDevMsg
65 00000032 B409 mov ah, 9
66 00000034 CD21 int 21h
67 00000036 E90E01 jmp exit
68
69 ; 17/02/2017
70 00000039 4572726F723A20556E- noDevMsg: db "Error: Unable to find intel ICH based audio device!",CR,LF,"$"
70 00000042 61626C6520746F2066-
70 0000004B 696E6420696E74656C-
70 00000054 204943482062617365-
70 0000005D 6420617564696F2064-
70 00000066 6576696365210D0A24
71
72 _1:
73 ; eax = BUS/DEV/FN
74 ; 00000000BBBBBBBBDDDDDFFF00000000
75 ; edx = DEV/VENDOR
76 ; DDDDDDDDDDDDDDDDVVVVVVVVVVVVVVVV
77
78 0000006F 66A3[0E1E] mov [bus_dev_fn], eax
79 00000073 668916[121E] mov [dev_vendor], edx
80
81 ; get ICH base address regs for mixer and bus master
82
83 00000078 B010 mov al, NAMBAR_REG
84 0000007A E8C701 call pciRegRead16 ; read PCI registers 10-11
85 ;and dx, IO_ADDR_MASK ; mask off BIT0
86 ; 19/05/2024
87 0000007D 80E2FE and dl, 0FEh
88
89 00000080 8916[041E] mov [NAMBAR], dx ; save audio mixer base addr
90
91 00000084 B014 mov al, NABMBAR_REG
92 00000086 E8BB01 call pciRegRead16
93 ;and dx, IO_ADDR_MASK
94 ; 19/05/2024
95 00000089 80E2C0 and dl, 0C0h
96
97 0000008C 8916[061E] mov [NABMBAR], dx ; save bus master base addr
98
99 ; 06/11/2023
100 ;; init controller
101 ;; 17/02/2017
102 ;mov al, PCI_CMD_REG ; command register (04h)
103 ;call pciRegRead16 ; pciRegRead8
104 ;
105 ;; eax = BUS/DEV/FN/REG
106 ;; dx = PCI Command Register Content ; 17/02/2017
107 ;; 00000000CCCCCCCC
108 ;mov [stats_cmd], dx
109 ;
110 ; 06/11/2023
111 ;mov al, PCI_IO_BASE ; IO base address register (10h)
112 ;call pciRegRead32
113 ;
114 ;and dx, 0FFC0h ; IO_ADDR_MASK (0FFFE) ?
115 ;mov [ac97_io_base], dx
116
117 00000090 B03C mov al, AC97_INT_LINE ; Interrupt line register (3Ch)
118 00000092 E8A701 call pciRegRead8 ; 17/02/2017
119
120 00000095 8816[FB1D] mov [ac97_int_ln_reg], dl
121
122 ; 09/11/2023
123 ; 05/11/2023
124 %if 1
125 ; 28/11/2016
126 ;mov bx, 1 ; 08/05/2024
127 00000099 30F6 xor dh, dh ; 17/02/2017
128 ; 10/11/2023
129 ;mov cx, dx
130 ;shl bx, cl
131
132 ; 04/11/2023
133 0000009B FA cli
134
135 ;not bx
136 0000009C E4A1 in al, 0A1h ; irq 8-15
137 0000009E 88C4 mov ah, al
138 000000A0 E421 in al, 21h ; irq 0-7
139
140 ; 04/11/2023
141 ; save IRQ status
142 000000A2 A3[FE1D] mov [IRQ_status], ax
143
144 ; 12/05/2024 (enable AC97 IRQ)
145 ;mov cl, dl
146 ;mov bx, 1
147 ;shl bx, cl
148 ;not bx
149 ;and ax, bx
150 ;out 21h, al
151 ;mov al, ah
152 ;out 0A1h, al
153
154 ;and ax, bx ; unmask
155 000000A5 0FB3D0 btr ax, dx ; unmask
156 000000A8 E621 out 21h, al ; enable interrupt (if irq <= 7)
157 000000AA 88E0 mov al, ah
158 000000AC E6A1 out 0A1h, al ; enable interrupt (if irq > 7)
159 ;not bx
160
161 ; 04/11/2023
162 ;mov dx, 4D1h ;8259 ELCR1
163 ;in al, dx
164 ;mov ah, al
165 ;mov dx, 4D0h
166 ;in al, dx
167 ;;or ax, bx
168 ;bts ax, cx
169 ;mov dx, 4D0h
170 ;out dx, al ;set level-triggered mode
171 ;mov al, ah
172 ;mov dx, 4D1h
173 ;out dx, al ;set level-triggered mode
174
175 ; 24/11/2016 - Erdogan Tan
176 ;mov bx, cx
177 ; 10/11/2023
178 000000AE 89D3 mov bx, dx
179 000000B0 8A9F[261C] mov bl, [bx+irq_int]
180 000000B4 C1E302 shl bx, 2 ; * 4
181
182 ; set up interrupt vector
183 ; 30/11/2016
184 000000B7 06 push es
185 000000B8 31C0 xor ax, ax
186 000000BA 8EC0 mov es, ax
187 ; 04/11/2023
188 ; save interrupt vector
189 ;mov ax, [es:bx]
190 ; 13/05/2024
191 000000BC B8[951B] mov ax, ac97_int_handler
192 000000BF 268707 xchg ax, [es:bx]
193 000000C2 A3[001E] mov [IRQ_vector], ax
194 ;mov ax, [es:bx+2]
195 ; 13/05/2024
196 000000C5 8CC8 mov ax, cs
197 000000C7 26874702 xchg ax, [es:bx+2]
198 000000CB A3[021E] mov [IRQ_vector+2], ax
199
200 ; 13/05/2024
201 ;mov word [es:bx], ac97_int_handler
202 ;mov ax, cs
203 ;mov [es:bx+2], ax
204
205 000000CE 07 pop es
206
207 ; 04/11/2023
208 000000CF FB sti
209
210 %endif
211 000000D0 E81B19 call write_ac97_dev_info
212
213 ; check the command line for a file to play
214
215 ;push ds
216 000000D3 E89200 call processCmdline ; get the filename
217
218 ; open the file
219 000000D6 B002 mov al, OPEN ; open existing file
220 000000D8 E8AD00 call openFile ; no error? ok.
221 ;pop ds
222 000000DB 7322 jnc short _gsr
223
224 ; file not found!
225
226 ;push cs
227 ;pop ds
228 000000DD BA[E600] mov dx, noFileErrMsg
229 000000E0 B409 mov ah, 9
230 000000E2 CD21 int 21h
231 000000E4 EB61 jmp exit
232
233 noFileErrMsg:
234 000000E6 4572726F723A206669- db "Error: file not found.",CR,LF,"$"
234 000000EF 6C65206E6F7420666F-
234 000000F8 756E642E0D0A24
235
236 _gsr:
237 000000FF E8AD00 call getSampleRate ; read the sample rate
238 ; pass it onto codec.
239 00000102 7243 jc short exit ; 19/11/2016 - nothing to do
240
241 00000104 A3[161E] mov [sample_rate], ax
242
243 ; 19/11/2016
244 00000107 880E[181E] mov [stmo], cl
245 0000010B 8816[1A1E] mov [bps], dl
246
247 ; 17/02/2017
248 0000010F C606[1C1E]00 mov byte [fbs_shift], 0 ; 0 = stereo and 16 bit
249 00000114 FEC9 dec cl
250 00000116 7504 jnz short _gsr_1 ; stereo
251 00000118 FE06[1C1E] inc byte [fbs_shift] ; 1 = mono or 8 bit
252 _gsr_1:
253 0000011C 80FA08 cmp dl, 8
254 0000011F 7704 ja short _gsr_2 ; 16 bit samples
255 00000121 FE06[1C1E] inc byte [fbs_shift] ; 2 = mono and 8 bit
256 _gsr_2:
257 00000125 E81C1A call write_sample_rate
258
259 ; 05/11/2023
260 _2:
261 00000128 E85907 call check4keyboardstop ; flush keyboard buffer
262 0000012B 72FB jc short _2 ; 07/11/2023
263
264 ; 09/11/2023
265 ;; 05/11/2023
266 ;mov eax, [bus_dev_fn]
267 ;mov al, PCI_CMD_REG
268 ;call pciRegRead16 ; read PCI command register
269 ;; 17/02/2017
270 ;;mov dx, [stats_cmd]
271 ;or dl, IO_ENA+BM_ENA ; enable IO and bus master
272 ;call pciRegWrite16 ; pciRegWrite8
273
274 ;; 06/11/2023
275 ;;mov eax, [bus_dev_fn]
276 ;;mov al, PCI_CMD_REG
277 ;;call pciRegRead8 ; read PCI command register
278 ;;or dl, IO_ENA+BM_ENA ; enable IO and bus master
279 ;;call pciRegWrite8
280
281 ; setup the Codec (actually mixer registers)
282 0000012D E8E401 call codecConfig ; unmute codec, set rates.
283 ; 11/11/2023
284 00000130 721C jc short init_err
285 ;
286 ; position file pointer to start in actual wav data
287 ; MUCH improvement should really be done here to check if sample size is
288 ; supported, make sure there are 2 channels, etc.
289 ;
290 00000132 B442 mov ah, 42h
291 00000134 B000 mov al, 0 ; from start of file
292 00000136 8B1E[F81D] mov bx, [filehandle]
293 0000013A 31C9 xor cx, cx
294 0000013C BA2C00 mov dx, 44 ; jump past .wav/riff header
295 0000013F CD21 int 21h
296
297 ; play the .wav file. Most of the good stuff is in here.
298
299 00000141 E88503 call playWav
300
301 ; close the .wav file and exit.
302
303 close_exit: ; 11/11/2023
304 00000144 E85300 call closeFile
305
306 exit:
307 00000147 B8004C mov ax, 4c00h
308 0000014A CD21 int 21h
309
310 here:
311 0000014C EBFE jmp short here
312
313 ; 11/11/2023
314 init_err:
315 0000014E BA[711D] mov dx, msg_init_err
316 vra_err: ; 12/11/2023
317 00000151 B409 mov ah, 9
318 00000153 CD21 int 21h
319 00000155 EBED jmp short close_exit
320
321 ; MEMALLOC.ASM
322 ;-- SETFREE: Release memory not used ----------------
323 ;-- Input : ES = address of PSP
324 ;-- Output : none
325 ;-- Register : AX, BX, CL and FLAGS are changed
326 ;-- Info : Since the stack-segment is always the last segment in an
327 ; EXE-file, ES:0000 points to the beginning and SS:SP
328 ; to the end of the program in memory. Through this the
329 ; length of the program can be calculated
330 ; call this routine once at the beginning of the program to free up memory
331 ; assigned to it by DOS.
332
333 setFree:
334 00000157 BB0010 mov bx, 65536/16 ; 4K paragraphs ; 17/02/2017 (Erdogan Tan)
335
336 0000015A B44A mov ah, 4ah ; pass new length to DOS
337 0000015C CD21 int 21h
338
339 0000015E C3 retn ; back to caller
340 ; new size (allocated memory) = 64KB
341
342 memAlloc:
343 ; input: AX = # of paragraphs required
344 ; output: AX = segment of block to use
345
346 0000015F 53 push bx
347 00000160 89C3 mov bx, ax
348 00000162 B448 mov ah, 48h
349 00000164 CD21 int 21h
350 00000166 5B pop bx
351 00000167 C3 retn
352
353 ; CMDLINE.ASM
354 ; parse the command line
355 ; entry: none
356 ; exit: DS:DX to the 1st supplied item on the command line
357
358 processCmdline:
359 00000168 53 push bx
360 00000169 56 push si
361
362 ;mov ah, 51h
363 ;int 21h
364 ;mov ds, bx
365
366 0000016A BE8000 mov si, 80h
367 0000016D 0FB61C movzx bx, byte [si]
368 00000170 01DE add si, bx
369 00000172 46 inc si
370
371 00000173 C60400 mov byte [si], NULL ; zero terminate
372
373 00000176 BE8100 mov si, 81h
374
375 cmdlineloop:
376 00000179 AC lodsb
377
378 0000017A 3C00 cmp al, NULL ; found end of line?
379 0000017C 7404 je short exitpc
380 0000017E 3C20 cmp al, ' ' ; found a space?
381 00000180 74F7 je short cmdlineloop
382
383 ; must be the filename here.
384 exitpc:
385 00000182 4E dec si ; point to start of filename
386 00000183 89F2 mov dx, si
387 00000185 5E pop si
388 00000186 5B pop bx
389 00000187 C3 retn
390
391 ; FILE.ASM
392 ;open or create file
393 ;
394 ;input: ds:dx-->filename (asciiz)
395 ; al=file Mode (create or open)
396 ;output: none cs:[filehandle] filled
397 ;
398 openFile:
399 00000188 50 push ax
400 00000189 51 push cx
401 0000018A B43B mov ah, 3bh ; start with a mode
402 0000018C 00C4 add ah, al ; add in create or open mode
403 0000018E 31C9 xor cx, cx
404 00000190 CD21 int 21h
405 00000192 7203 jc short _of1
406 ;mov [cs:filehandle], ax
407 00000194 A3[F81D] mov [filehandle], ax
408 _of1:
409 00000197 59 pop cx
410 00000198 58 pop ax
411 00000199 C3 retn
412
413 ; close the currently open file
414 ; input: none, uses cs:[filehandle]
415 closeFile:
416 0000019A 50 push ax
417 0000019B 53 push bx
418 0000019C 833E[F81D]FF cmp word [filehandle], -1
419 000001A1 7409 jz short _cf1
420 000001A3 8B1E[F81D] mov bx, [filehandle]
421 000001A7 B8003E mov ax,3e00h
422 000001AA CD21 int 21h ;close file
423 _cf1:
424 000001AC 5B pop bx
425 000001AD 58 pop ax
426 000001AE C3 retn
427
428 getSampleRate:
429 ; 08/12/2016
430 ; reads the sample rate from the .wav file.
431 ; entry: none - assumes file is already open
432 ; 19/11/2016 - Erdogan Tan
433 ; exit: ax = sample rate (11025, 22050, 44100, 48000)
434 ; cx = number of channels (mono=1, stereo=2)
435 ; dx = bits per sample (8, 16)
436
437 000001AF 53 push bx
438
439 000001B0 B442 mov ah, 42h
440 000001B2 B000 mov al, 0 ; from start of file
441 000001B4 8B1E[F81D] mov bx, [filehandle]
442 000001B8 31C9 xor cx, cx
443 000001BA BA0800 mov dx, 08h ; "WAVE"
444 000001BD CD21 int 21h
445
446 000001BF BA[DC1D] mov dx, smpRBuff
447 000001C2 B91C00 mov cx, 28 ; 28 bytes
448 000001C5 B43F mov ah, 3fh
449 000001C7 CD21 int 21h
450
451 000001C9 813E[DC1D]5741 cmp word [smpRBuff], 'WA'
452 000001CF 751C jne short gsr_stc
453
454 000001D1 813E[DE1D]5645 cmp word [smpRBuff+2], 'VE'
455 000001D7 7514 jne short gsr_stc
456
457 000001D9 833E[E81D]01 cmp word [smpRBuff+12], 1 ; Offset 20, must be 1 (= PCM)
458 000001DE 750D jne short gsr_stc
459
460
461 000001E0 8B0E[EA1D] mov cx, [smpRBuff+14] ; return num of channels in CX
462 000001E4 A1[EC1D] mov ax, [smpRBuff+16] ; return sample rate in AX
463 000001E7 8B16[F61D] mov dx, [smpRBuff+26] ; return bits per sample value in DX
464 gsr_retn:
465 000001EB 5B pop bx
466 000001EC C3 retn
467
468 gsr_stc:
469 000001ED F9 stc
470 000001EE EBFB jmp short gsr_retn
471
472 ;%include 'ac97.asm' ; 29/11/2016 (AC97 codec configuration)
473 %include 'ac97_vra.asm' ; 19/11/2023 (AC97 codec configuration)
1 <1> ; 19/05/2024
2 <1> ; 19/11/2023
3 <1> ; (ready status optimization -in order to prevent wrong init error- )
4 <1> ; 18/11/2023
5 <1> ; 15/11/2023
6 <1> ; 13/11/2023
7 <1> ; 12/11/2023
8 <1> ; 11/11/2023
9 <1> ; 03/11/2023 - 06/11/2023
10 <1> ; PCI and AC97 codec functions for wav player
11 <1> ; Erdogan Tan (17/02/2017)
12 <1>
13 <1> ; ----------------------------------------------------------------------------
14 <1> ; PCI.ASM
15 <1> ; ----------------------------------------------------------------------------
16 <1>
17 <1> ; PCI device register reader/writers.
18 <1> ; NASM version: Erdogan Tan (29/11/2016)
19 <1> ; Last Update: 17/02/2017
20 <1>
21 <1> ;===============================================================
22 <1> ; 8/16/32bit PCI reader
23 <1> ;
24 <1> ; Entry: EAX=PCI Bus/Device/fn/register number
25 <1> ; BIT30 set if 32 bit access requested
26 <1> ; BIT29 set if 16 bit access requested
27 <1> ; otherwise defaults to 8 bit read
28 <1> ;
29 <1> ; Exit: DL,DX,EDX register data depending on requested read size
30 <1> ;
31 <1> ; Note: this routine is meant to be called via pciRegRead8, pciRegread16,
32 <1> ; or pciRegRead32, listed below.
33 <1> ;
34 <1> ; Note2: don't attempt to read 32bits of data from a non dword aligned reg
35 <1> ; number. Likewise, don't do 16bit reads from non word aligned reg #
36 <1> ;
37 <1> pciRegRead:
38 000001F0 6653 <1> push ebx
39 000001F2 51 <1> push cx
40 000001F3 6689C3 <1> mov ebx, eax ; save eax, dh
41 000001F6 88F1 <1> mov cl, dh
42 000001F8 6625FFFFFFBF <1> and eax, (~PCI32)+PCI16 ; clear out data size request
43 000001FE 660D00000080 <1> or eax, BIT31 ; make a PCI access request
44 00000204 24FC <1> and al, ~3 ; NOT 3 ; force index to be dword
45 <1>
46 00000206 BAF80C <1> mov dx, PCI_INDEX_PORT
47 00000209 66EF <1> out dx, eax ; write PCI selector
48 <1>
49 0000020B BAFC0C <1> mov dx, PCI_DATA_PORT
50 0000020E 88D8 <1> mov al, bl
51 00000210 2403 <1> and al, 3 ; figure out which port to
52 00000212 00C2 <1> add dl, al ; read to
53 <1>
54 00000214 66ED <1> in eax, dx ; do 32bit read
55 00000216 66F7C300000080 <1> test ebx, PCI32
56 0000021D 7403 <1> jz short _pregr1
57 <1>
58 0000021F 6689C2 <1> mov edx, eax ; return 32bits of data
59 <1> _pregr1:
60 00000222 89C2 <1> mov dx, ax ; return 16bits of data
61 00000224 66F7C3000000C0 <1> test ebx, PCI32+PCI16
62 0000022B 7502 <1> jnz short _pregr2
63 0000022D 88CE <1> mov dh, cl ; restore dh for 8 bit read
64 <1> _pregr2:
65 0000022F 6689D8 <1> mov eax, ebx ; restore eax
66 00000232 6625FFFFFFBF <1> and eax, (~PCI32)+PCI16 ; clear out data size request
67 00000238 59 <1> pop cx
68 00000239 665B <1> pop ebx
69 0000023B C3 <1> retn
70 <1>
71 <1> pciRegRead8:
72 0000023C 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 8 bit read size
73 00000242 EBAC <1> jmp short pciRegRead ; call generic PCI access
74 <1>
75 <1> pciRegRead16:
76 00000244 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 16 bit read size
77 0000024A 660D00000040 <1> or eax, PCI16 ; call generic PCI access
78 00000250 EB9E <1> jmp short pciRegRead
79 <1>
80 <1> pciRegRead32:
81 00000252 6625FFFFFF3F <1> and eax, (~PCI16)+PCI32 ; set up 32 bit read size
82 00000258 660D00000080 <1> or eax, PCI32 ; call generic PCI access
83 0000025E EB90 <1> jmp short pciRegRead
84 <1>
85 <1> ;===============================================================
86 <1> ; 8/16/32bit PCI writer
87 <1> ;
88 <1> ; Entry: EAX=PCI Bus/Device/fn/register number
89 <1> ; BIT31 set if 32 bit access requested
90 <1> ; BIT30 set if 16 bit access requested
91 <1> ; otherwise defaults to 8bit read
92 <1> ; DL/DX/EDX data to write depending on size
93 <1> ;
94 <1> ;
95 <1> ; note: this routine is meant to be called via pciRegWrite8, pciRegWrite16,
96 <1> ; or pciRegWrite32 as detailed below.
97 <1> ;
98 <1> ; Note2: don't attempt to write 32bits of data from a non dword aligned reg
99 <1> ; number. Likewise, don't do 16bit writes from non word aligned reg #
100 <1> ;
101 <1> pciRegWrite:
102 00000260 6653 <1> push ebx
103 00000262 51 <1> push cx
104 00000263 6689C3 <1> mov ebx, eax ; save eax, dx
105 00000266 89D1 <1> mov cx, dx
106 00000268 660D00000080 <1> or eax, BIT31 ; make a PCI access request
107 0000026E 6625FFFFFFBF <1> and eax, ~PCI16 ; NOT PCI16 ; clear out data size request
108 00000274 24FC <1> and al, ~3 ; NOT 3 ; force index to be dword
109 <1>