Questions Regarding State of Project

[TheFlemoid]

I hate to open this as an issue since it's not really an issue, but I was wondering what the state of the project is? I noticed that the v0.9.9 release appears complete in KiCad (though the routing is slightly different then the image in resources). Have you fabbed that release? I also noticed that current dev isn't completely laid out, so I assume that's a work in progress.

Also, do you have a BOM for the project? The main ICs appear to be available on LCSC, but obviously there's a lot of parts here. A BOM would be nice.

I wanted to work on designing an SBC of my own, ideally using a SIP like the V3S, and I figured a good first step would be to find a completed SBC project, get that fabbed, and then try to compile the Linux kernal/etc for it.

Thanks for your work! It looks good!

[vd-rd]

Hey,
No worries, i think the best course of action would be to activate discussions for this repo and move the conversation there.

[vd-rd]

So, regarding your questions.

In general i avoid generating a BoM because availability changes widely (eg. 10uF Cap can be from Samsung, Murata etc.)

The 0.9.9 version was fabbed by PCBWay, i was yet to find a moment to assemble it and leave a review for them as they were so kind to sponsor the fab.

For the image render, you are correct, i wanted to plug in a GitHub action that will automate the generation, but I am yet to do so.

If you want to collaborate on this and spin it as a SiP with castellated holes or CM4 form factor or something, i am interested in that.
I must admit i can benefit from someone with shared interest in the same project.