Floating point support. #110
Description
Hello community,
I would like to mention my interest in extending the floating-point support to the vicuna's architecture. In order to make it compatible with Zve32f processor specifications, I'm going with the 32bit FPU with selected Vector Floating Point Instructions (according to the riscv-v-spec doc). Our main goal is to run CNN and FFT based signal processing applications using vicuna as a vector coprocessor integrated with CVA6 core.
Is anyone here working with the same/equivalent approach? Please let me know. We can further connect to discuss in details about the strategy of implementation.
email id: nikhil.gaikar@thalesgroup.com
Thank you and cheers !!