Merge branch 'dont_blink' into 'master'

Disable Pmod1 by default

* Updates to test_marble_family to not drive Pmod1 (J12) on Marble board for golden bitfile use case
* Changes to first_readout.sh to enable LED pattern for board testing using misc_config register

See merge request hdl-libraries/bedrock!216

projects/test_marble_family/first_readout.sh

@@ -10,7 +10,7 @@ python3 -m xadctemp -a $IP -p 803
 echo "Reading kintex 7 DNA for $IP"
 python3 -m leep.cli leep://$IP:803 reg dna_high dna_low
 echo "Connect Digilent 8 LED board to Pmod J12 and check if all them blink at different rate"
-python3 -m leep.cli leep://$IP:803 reg led_user_mode=2
+python3 -m leep.cli leep://$IP:803 reg led_user_mode=2 misc_config=132
 tt=$(mktemp /tmp/quick_XXXXXX)
 python3 -m spi_test --ip $IP --udp 804 --otp --pages=1 --dump $tt
 hexdump $tt | head -n 2

projects/test_marble_family/marble_top.v

@@ -359,7 +359,9 @@ marble_base #(
 //   Unsupported: defparam with more than one dot
 defparam base.rtefi.p4_client.engine.seven = 1;
 `endif
-assign Pmod1 = leds;
+// Let Pmod float by default for golden bitfile use-case
+wire enable_pmod_out = ext_config[3];
+assign Pmod1 = enable_pmod_out ? leds : 8'bzzzzzzzz;
 assign LD16 = leds[0];
 assign LD17 = leds[1];
 

projects/test_marble_family/static_regmap.json

@@ -39,7 +39,7 @@
         "addr_width": 0,
         "sign": "unsigned",
         "base_addr": 327688,
-        "data_width": 3
+        "data_width": 8
     },
     "wr_dac": {
         "access": "rw",