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fix pytket 1.35 issues #188

Merged
merged 2 commits into from
Nov 12, 2024
Merged

fix pytket 1.35 issues #188

merged 2 commits into from
Nov 12, 2024

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cqc-melf
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@cqc-melf cqc-melf commented Nov 12, 2024

Description

Generating the QIR with pytket 1.35. gives for some circuits differences compared to the previous pytket version.

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Please mention any github issues addressed by this PR.

Checklist

  • I have performed a self-review of my code.
  • I have commented hard-to-understand parts of my code.
  • I have made corresponding changes to the public API documentation.
  • I have added tests that prove my fix is effective or that my feature works.
  • I have updated the changelog with any user-facing changes.

@@ -17,17 +17,18 @@ entry:
br i1 false, label %condb0, label %contb0

condb0: ; preds = %entry
call void @__quantum__qis__x__body(%Qubit* null)
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Do you know why these changes are happening?

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    c = Circuit(1, name="test_classical")
    a = c.add_c_register("a", 8)
    b = c.add_c_register("b", 10)
    d = c.add_c_register("d", 10)

    c.add_c_setbits([True], [a[0]])
    c.add_c_setbits([False, True] + [False] * 6, list(a))
    c.add_c_setbits([True, True] + [False] * 8, list(b))

    c.add_c_setreg(23, a)
    c.add_c_copyreg(a, b)

    c.add_classicalexpbox_register(a + b, d)  # type: ignore
    c.add_classicalexpbox_register(a - b, d)  # type: ignore
    # c.add_classicalexpbox_register(a * b // d, d)
    c.add_classicalexpbox_register(a << 1, a)  # type: ignore
    c.add_classicalexpbox_register(a >> 1, b)  # type: ignore

    c.X(0, condition=reg_eq(a ^ b, 1))
    c.X(0, condition=(a[0] ^ b[0]))
    c.X(0, condition=reg_eq(a & b, 1))
    c.X(0, condition=reg_eq(a | b, 1))

    c.X(0, condition=a[0])
    c.X(0, condition=reg_neq(a, 1))
    c.X(0, condition=if_not_bit(a[0]))
    c.X(0, condition=reg_gt(a, 1))
    c.X(0, condition=reg_lt(a, 1))
    c.X(0, condition=reg_geq(a, 1))
    c.X(0, condition=reg_leq(a, 1))
    c.Phase(0, condition=a[0])

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Above is the testcase for this QIR files, from my understanding the quantum gates get reordered, but I don't know why. From my understanding this is a generating an equivalent circuit.

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Oh I see, yes, reordering I can understand because of the change in classical expression handling.

@cqc-melf cqc-melf marked this pull request as ready for review November 12, 2024 14:54
@cqc-melf cqc-melf merged commit b939394 into main Nov 12, 2024
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2 participants