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Digital camera ASIC

HOG-Based Real-Time Human Detection ASIC for Smart Video Surveillance at the Edge
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Table of Contents
  1. About The Project
  2. Getting Started
  3. Usage
  4. Roadmap
  5. License
  6. Contact
  7. Acknowledgments

About The Project

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Getting Started

Prerequisites

Requirements

  • Makefile (Linux only)
  • python

Git:

git clone https://github.com/Digital-Camera-ASIC/dcasic.git
cd ./dcasic
git submodule update --init --recursive

Pull the updated code:

git submodule update --recursive

RTL generation instruction

Make sure you are in dcasic/script

  1. In linux, run:
    make openlane_gen
  2. In window, run:
     mkdir -p openlane
     python openlane_gen.py rtl.f openlane

All RTL files are generated in openlane folder. The top is dcasic.v

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Usage

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Roadmap

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License

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Contact

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Acknowledgments

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Languages

  • Verilog 51.8%
  • Assembly 17.0%
  • Stata 12.3%
  • SystemVerilog 7.9%
  • Python 6.4%
  • Makefile 2.4%
  • Other 2.2%