NTTSuite provides a platform to benchmark several popular NTT implementations in GPU, FPGA, and ASIC. Implementations are analyzed and profiled and the speedup is measured and compared. By analyzing the result, we optimize the pease alrogithm for FPGA and ASIC to improve speedup. In addiiton, optimized implementation is also benchmarked on GPU for different vector size and different vector element width.
all 6 algorithms have implementations in CPU, GPU, FPGA and ASIC. Files are stored in folders which its name indicates the implementation method and algorithm name.
This work was supported in part by the Applications Driving Architectures (ADA) Research Center, a JUMP Center co-sponsored by SRC and DARPA. This research was also developed with funding from the Defense Advanced Research Projects Agency (DARPA),under the Data Protection in Virtual Environments (DPRIVE) program, contract HR0011-21-9-0003. The views, opinions and/or findings expressed are those of the author and should not be interpreted as representing the official views or policies of the Department of Defense or the U.S. Government.