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In matching, forbid the capture of all variables
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strub committed Feb 5, 2025
1 parent ee61190 commit 1112be6
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Showing 4 changed files with 7 additions and 8 deletions.
3 changes: 1 addition & 2 deletions src/ecMatching.ml
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Expand Up @@ -946,8 +946,7 @@ module FPosition = struct
doit pos (`WithCtxt (ctxt, b :: fs))

| Fquant (_, b, f) ->
let xs = List.pmap (function (x, GTty _) -> Some x | _ -> None) b in
let ctxt = List.fold_left ((^~) Sid.add) ctxt xs in
let ctxt = List.fold_left ((^~) Sid.add) ctxt (List.fst b) in
doit pos (`WithCtxt (ctxt, [f]))

| Flet (lp, f1, f2) ->
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6 changes: 3 additions & 3 deletions theories/crypto/PROM.ec
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Expand Up @@ -233,16 +233,16 @@ section ConditionalLL.
declare axiom dout_ll x: is_lossless (dout x).

lemma RO_get_ll : islossless RO.get.
proof. by proc; auto=> />; rewrite dout_ll. qed.
proof. by proc; auto=> /> &0; rewrite dout_ll. qed.

lemma FRO_get_ll : islossless FRO.get.
proof. by proc; auto=> />; rewrite dout_ll. qed.
proof. by proc; auto=> /> &0; rewrite dout_ll. qed.

lemma RO_sample_ll : islossless RO.sample.
proof. by proc; call RO_get_ll. qed.

lemma FRO_sample_ll : islossless FRO.sample.
proof. by proc; auto=> />; rewrite dout_ll. qed.
proof. by proc; auto=> /> &0; rewrite dout_ll. qed.
end section ConditionalLL.
end section LL.

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2 changes: 1 addition & 1 deletion theories/crypto/ROM.eca
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Expand Up @@ -61,7 +61,7 @@ lemma LRO_init_ll : islossless LRO.init.
proof. by proc; auto. qed.

lemma LRO_o_ll : (forall x, is_lossless (dout x)) => islossless LRO.o.
proof. by move=> dout_ll; proc; auto; rewrite dout_ll. qed.
proof. by move=> dout_ll; proc; auto=> &0; rewrite dout_ll. qed.

hoare LRO_initE : LRO.init : true ==> LRO.m = empty.
proof. by proc; auto. qed.
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4 changes: 2 additions & 2 deletions theories/distributions/DProd.ec
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Expand Up @@ -103,8 +103,8 @@ have ->: Pr[SampleDLet.sample(dt{m1}, du{m1}) @ &m1 : res = x]
suff ->//: Pr[SampleDLet.sample2(dt{m1}, du{m1}) @ &m2 : res.`2 = x]
= mu1 (dlet dt{m1} du{m1}) x.
byphoare(_ : dt{m1} = dt /\ du{m1} = du ==> _) => //=.
proc; rnd; skip => /=; rewrite dlet1E dlet_muE_swap /=.
move=> &hr [-> ->]; apply: eq_sum => y /=; rewrite (@sumD1 _ (y, x)) /=.
proc; rnd; auto=> />; rewrite dlet1E dlet_muE_swap /=.
apply: eq_sum => y /=; rewrite (@sumD1 _ (y, x)) /=.
+ by apply/summable_cond/summableZ/summable_mu1.
rewrite dprod1E dunit1E sum0_eq //=.
case=> y' x' /=; case: (x' = x) => //= ->>.
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