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v0.2.2
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@Obijuan Obijuan released this 03 Mar 08:52
· 139 commits to main since this release
v0.2.2
1246977

Refactoring and verilog implementation:

  • Copy: 2,3,4,5,6,7,8,9,10,11,12,16,20,24,26,27,28,29,30,31,32 bits
  • Reversal: 2,3,4,5 bits
  • SR1: 2,3,4,8,16,32 bits
  • SL1: 2,3,4,8,16,32 bits
  • Uint2
  • Uint4-1,2,3 bits
  • Uint8-1,2,3,4,5,7 bits
  • Uint12 bits
  • Uint32-31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16, 8, 2 bits
  • Uint16-14,13,12,11,10,9,8 bits
  • Sign-32,20,16,12,8,7,6,5,4,3,2 bits
Assets 2
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