Allow reversed register ranges in store and load

GMH-Code · Sep 14, 2022 · 7eabae7 · 7eabae7
1 parent 70a5ea9
commit 7eabae7
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Showing 4 changed files with 35 additions and 15 deletions.
diff --git a/scchip/constants.py b/scchip/constants.py
@@ -5,7 +5,7 @@
 
 # App identification
 APP_NAME = "SuperChocChip Emulator"
-APP_VERSION = "1.2.5"
+APP_VERSION = "1.2.6"
 APP_COPYRIGHT = "Copyright (C) 2022 Gregory Maynard-Hoare, licensed under GNU Affero General Public License v3.0"
 APP_INTRO = "{} V{} -- ".format(APP_NAME, APP_VERSION)
 

diff --git a/scchip/cpu.py b/scchip/cpu.py
@@ -823,26 +823,30 @@ def _00Dn(self):  # SCU n
     def _5xy2(self):  # XST Vx, Vy
         vx = self.vx
         vy = self.vy
-        i = self.i
-        i_bitmask = self.i_bitmask
 
         if self.live_debug:
             self.debug("XST V{:01x}, V{:01x}".format(vx, vy))
 
-        for offset in range(vy - vx + 1):
-            self.ram.write((i + offset) & i_bitmask, self.v[vx + offset])
+        i = self.i
+        i_bitmask = self.i_bitmask
+        iter_back = vx > vy
+
+        for offset in range(vx - vy + 1) if iter_back else range(vy - vx + 1):
+            self.ram.write((i + offset) & i_bitmask, self.v[(vx - offset) if iter_back else (vx + offset)])
 
     def _5xy3(self):  # XLD Vx, Vy
         vx = self.vx
         vy = self.vy
-        i = self.i
-        i_bitmask = self.i_bitmask
 
         if self.live_debug:
             self.debug("XLD V{:01x}, V{:01x}".format(vx, vy))
 
-        for offset in range(vy - vx + 1):
-            self.v[vx + offset] = self.ram.read((i + offset) & i_bitmask)
+        i = self.i
+        i_bitmask = self.i_bitmask
+        iter_back = vx > vy
+
+        for offset in range(vx - vy + 1) if iter_back else range(vy - vx + 1):
+            self.v[(vx - offset) if iter_back else (vx + offset)] = self.ram.read((i + offset) & i_bitmask)
 
     def _Fx00(self):  # XLDL I, addr
         # Only F000 is supported

diff --git a/superchocchip.py b/superchocchip.py
@@ -3,7 +3,7 @@
 __author__ = "Gregory Maynard-Hoare"
 __copyright__ = "Copyright (C) 2022 Gregory Maynard-Hoare"
 __license__ = "GNU Affero General Public License v3.0"
-__version__ = "1.2.5"
+__version__ = "1.2.6"
 
 from argparse import ArgumentParser
 from scchip import main

diff --git a/test/test_cpu.py b/test/test_cpu.py
@@ -419,20 +419,36 @@ def test_cpu_5xy2(self):  # XST Vx, Vy
 
         self.cpu.i = 0xFFFF
         self._check_opcode(0x5232)
+        self.assertEqual(0, self.ram.read(0xFFFE))
         self.assertEqual(2, self.ram.read(0xFFFF))
         self.assertEqual(3, self.ram.read(0x0000))
         self.assertEqual(0, self.ram.read(0x0001))
 
+        # Test register store reversal
+        self._check_opcode(0x5322)
+        self.assertEqual(0, self.ram.read(0xFFFE))
+        self.assertEqual(3, self.ram.read(0xFFFF))
+        self.assertEqual(2, self.ram.read(0x0000))
+        self.assertEqual(0, self.ram.read(0x0001))
+
     def test_cpu_5xy3(self):  # XLD Vx, Vy
         for i in range(3, 7):
-            self.ram.write((0xFFFC + i) & 0xFFFF, i)
+            self.ram.write((0xFFFB + i) & 0xFFFF, i)
 
-        self.assertEqual(3, self.ram.read(0xFFFF))
-        self.assertEqual(4, self.ram.read(0x0000))
-        self.assertEqual(5, self.ram.read(0x0001))
+        self.assertEqual(4, self.ram.read(0xFFFF))
+        self.assertEqual(5, self.ram.read(0x0000))
+        self.assertEqual(6, self.ram.read(0x0001))
         self.cpu.i = 0xFFFF
         self._check_opcode(0x5233)
-        self.assertEqual(3, self.cpu.v[2])
+        self.assertEqual(0, self.cpu.v[1])
+        self.assertEqual(4, self.cpu.v[2])
+        self.assertEqual(5, self.cpu.v[3])
+        self.assertEqual(0, self.cpu.v[4])
+
+        # Test register load reversal
+        self._check_opcode(0x5323)
+        self.assertEqual(0, self.cpu.v[1])
+        self.assertEqual(5, self.cpu.v[2])
         self.assertEqual(4, self.cpu.v[3])
         self.assertEqual(0, self.cpu.v[4])