Fixed minor systemv instruction sel bugs.

source/compiler/compiler/type_system/semantic_context.cpp

@@ -59,6 +59,7 @@ namespace sigma {
 
 			static u64 counter = 0;
 			return "f" + std::to_string(counter++);
+			//return string_table.get(signature.identifier_key);
 		}
 
 		auto calculate_parameter_cast_cost(const function_signature& signature, const std::vector<data_type>& parameter_types) -> u16 {

source/compiler/test/main.s

@@ -11,14 +11,18 @@
 // -   set crashes with more than 4(?) parameters
 // -   implicit returns for non-void functions should be a thing
 
-i32 main() {
-	u64 a = 100;
-
-	printf("value: %lld\n", a);
-	ret 0;
+i32 run(i32 x) { 
+    ret x; 
 }
 
+i32 test() {
+	ret 12;
+}
 
+i32 main() {
+    printf("%d\n", run(test()));
+    ret 0;
+}
 
 // THIS CRASHES
 // i32 main() {

source/intermediate_representation/codegen/instruction.h

@@ -213,7 +213,9 @@ namespace sigma::ir {
 
 			// memory op
 			INDEXED = 1024,
-			SPILL = 2048
+			SPILL = 2048,
+
+			RET = 4096
 		};
 
 		struct description {

source/intermediate_representation/codegen/memory/allocators/linear_scan_allocator.cpp

@@ -112,6 +112,7 @@ namespace sigma::ir {
 			// add the register to the active set
 			if (reg.is_valid()) {
 				interval->assigned = reg;
+
 				move_to_active(context, interval);
 			}
 		}
@@ -468,7 +469,10 @@ namespace sigma::ir {
 		}
 
 		it.reg = classified_reg();
+
 		it.assigned = reg();
+		ASSERT(it.assigned != 1, "x");
+
 		it.ranges.reserve(4);
 		it.uses.clear();
 		it.target = nullptr;
@@ -580,9 +584,7 @@ namespace sigma::ir {
 		return new_reg;
 	}
 
-	reg linear_scan_allocator::allocate_free_reg(
-		codegen_context& context, handle<live_interval> interval
-	) {
+	reg linear_scan_allocator::allocate_free_reg(codegen_context& context, handle<live_interval> interval) {
 		const auto register_class = interval->reg.cl;
 		constexpr i32 half_free = 1 << 16;
 
@@ -677,6 +679,7 @@ namespace sigma::ir {
 			}
 
 			interval = &context.intervals[old_reg];
+			ASSERT(interval->assigned != 1, "x");
 		}
 
 		if(static_cast<ptr_diff>(interval->get_end()) > free_position) {

source/intermediate_representation/module.cpp

@@ -26,7 +26,7 @@ namespace sigma::ir {
 		// specify individual optimization passes
 		const optimization_pass_list optimizations({});
 		const auto register_allocator = std::make_shared<linear_scan_allocator>();
-		// utility::string assembly;
+		//utility::string assembly;
 
 		// go through all declared functions and run codegen
 		for (const handle<function> function : m_functions) {
@@ -76,7 +76,7 @@ namespace sigma::ir {
 			// std::cout << '\n';
 
 			// DEBUG
-			// assembly.append(m_codegen.disassemble(bytecode, codegen));
+			//assembly.append(m_codegen.disassemble(bytecode, codegen));
 
 			// finally, emit the compiled function
 			function->output = {
@@ -91,7 +91,7 @@ namespace sigma::ir {
 		}
 
 		// DEBUG
-		// utility::console::print("{}\n", assembly.get_underlying());
+		//utility::console::print("{}\n", assembly.get_underlying());
 	}
 
 	auto module::generate_object_file() -> utility::byte_buffer {

source/intermediate_representation/target/arch/x64/x64.cpp

@@ -53,7 +53,6 @@ namespace sigma::ir {
 		// generate the bytecode for our function
 		emit_function_prologue(context, bytecode);
 		emit_function_body(context, bytecode);
-		emit_function_epilogue(context, bytecode);
 
 		// pad the instruction buffer to 16 bytes with nop instructions
 		emit_nops_to_width(bytecode);
@@ -186,7 +185,13 @@ namespace sigma::ir {
 			else if (inst == instruction::type::INLINE) {
 				NOT_IMPLEMENTED();
 			}
-			else if (inst == instruction::type::EPILOGUE) { /*does nothing*/ }
+			else if (inst == instruction::type::EPILOGUE) {
+				emit_function_epilogue(context, bytecode);
+
+				if(inst->flags & instruction::RET) {
+					bytecode.append_byte(0xC3);
+				}
+			}
 			else if (inst == instruction::type::LINE) {
 				NOT_IMPLEMENTED();
 			}
@@ -327,7 +332,7 @@ namespace sigma::ir {
 				}
 				else if(ternary) {
 					const handle<instruction_operand> right = context.create_instruction_operand();
-					resolve_interval(context, inst, resolved_operand_count, right);
+					resolved_operand_count += resolve_interval(context, inst, resolved_operand_count, right);
 
 					if(inst != instruction::type::MOV || (inst == instruction::type::MOV && out->matches(right) == false)) {
 						emit_instruction_2(context, inst->get_type(), out, right, dt, bytecode);
@@ -341,7 +346,6 @@ namespace sigma::ir {
 		ASSERT(context.function->exit_node != nullptr, "no exit node found");
 
 		if (context.stack_usage <= 16) {
-			bytecode.append_byte(0xC3);
 			return;
 		}
 
@@ -361,13 +365,6 @@ namespace sigma::ir {
 
 		// pop RBP
 		bytecode.append_byte(0x58 + x64::gpr::RBP);
-
-		// ret
-		const handle<node> remote_procedure_call = context.function->exit_node->inputs[2];
-
-		if (remote_procedure_call == node::type::PROJECTION && remote_procedure_call->inputs[0] == node::type::ENTRY && remote_procedure_call->get<projection>().index == 2) {
-			bytecode.append_byte(0xC3);
-		}
 	}
 
 	auto x64_architecture::get_instruction_table()->std::array<instruction::description, 120> {
@@ -870,6 +867,7 @@ namespace sigma::ir {
 		if(interval->spill > 0) {
 			val->set_type(instruction_operand::type::MEM);
 			val->reg = static_cast<u8>(x64::gpr::RBP);
+
 			val->index = reg::invalid_id;
 			val->immediate = -interval->spill;
 		}

source/intermediate_representation/target/arch/x64/x64_instruction_selection.cpp

@@ -1,9 +1,8 @@
 #include "x64.h"
 #include "abstract_syntax_tree/node.h"
 #include "intermediate_representation/codegen/instruction.h"
-#include "intermediate_representation/codegen/instruction.h"
-#include "intermediate_representation/codegen/instruction.h"
-#include "intermediate_representation/codegen/instruction.h"
+
+#include "intermediate_representation/target/system/systemv/systemv.h"
 #include "intermediate_representation/target/system/win/win.h"
 
 namespace sigma::ir {
@@ -264,9 +263,7 @@ namespace sigma::ir {
 			case node::type::REGION: break;
 			case node::type::ENTRY: {
 				bool is_systemv = context.target.get_abi() == abi::SYSTEMV;
-				constexpr x64::gpr gpr_params[] = {
-					x64::gpr::RCX, x64::gpr::RDX, x64::gpr::R8, x64::gpr::R9
-				};
+				const x64::gpr* gpr_params = is_systemv ? systemv::g_parameters : win::g_parameters;
 
 				u8 gpr_param_count = 4;
 				u8 xmm_param_count = is_systemv ? 8 : 4;
@@ -918,9 +915,14 @@ namespace sigma::ir {
 				// we don't really need a fence if we're about to exit but we do need to mark that
 				// it's the epilogue to tell the register allocator where callee registers need
 				// to get restored
-				context.append_instruction(create_instruction(
-					context, instruction::type::EPILOGUE, VOID_TYPE, 0, 0, 0)
-				);
+				handle<instruction> inst = create_instruction(
+					context, instruction::type::EPILOGUE, VOID_TYPE, 0, 0, 0);
+
+				inst->flags |= instruction::RET;
+
+				context.append_instruction(inst);
+
+
 				break;
 			}
 

source/intermediate_representation/target/system/systemv/systemv.h

@@ -30,4 +30,13 @@ namespace sigma::ir::systemv {
 			static_cast<u8>(x64::gpr::R9)
 		}
 	};
+
+	static constexpr x64::gpr g_parameters[] = {
+		x64::gpr::RDI,
+		x64::gpr::RSI,
+		x64::gpr::RDX,
+		x64::gpr::RCX,
+		x64::gpr::R8,
+		x64::gpr::R9
+	};
 }

source/intermediate_representation/target/system/win/win.h

@@ -82,4 +82,11 @@ namespace sigma::ir::win {
 			reg::invalid_id
 		}
 	};
+
+	static constexpr x64::gpr g_parameters[] = {
+		x64::gpr::RCX,
+		x64::gpr::RDX,
+		x64::gpr::R8,
+		x64::gpr::R9
+	};
 }

source/utility/containers/byte_buffer.h

@@ -41,7 +41,7 @@ namespace utility {
 		 * \param data Data to append
 		 */
 		void append_byte(u8 data) {
-			// ASSERT(data != 0xc7, "x");
+			// ASSERT(data != 0x4d, "x");
 			push_back(data);
 		}
 
@@ -52,8 +52,8 @@ namespace utility {
 		void append_word(u16 data) {
 			byte bytes[2];
 			std::memcpy(bytes, &data, sizeof(data));
-			// ASSERT(bytes[0] != 0xc7, "x");
-			// ASSERT(bytes[1] != 0xc7, "x");
+			// ASSERT(data != 0x4d, "x");
+			// ASSERT(data != 0x4d, "x");
 			push_back(bytes[0]);
 			push_back(bytes[1]);
 		}
@@ -66,7 +66,7 @@ namespace utility {
 			byte bytes[4];
 			std::memcpy(bytes, &data, sizeof(data));
 			for (int i = 0; i < 4; ++i) {
-				// ASSERT(bytes[i] != 0xc7, "x");
+				// ASSERT(bytes[i] != 0x4d, "x");
 				push_back(bytes[i]);
 			}
 		}
@@ -79,7 +79,7 @@ namespace utility {
 			byte bytes[8];
 			std::memcpy(bytes, &data, sizeof(data));
 			for (int i = 0; i < 8; ++i) {
-				// ASSERT(bytes[i] != 0xc7, "x");
+				// ASSERT(bytes[i] != 0x4d, "x");
 				push_back(bytes[i]);
 			}
 		}