This repository contains the design and implementation of a nano processor capable of executing 10 instructions. The processor architecture includes a basic Arithmetic Logic Unit (ALU) for performing arithmetic and logic operations.
This is the extended version of Nano processor: Nano Processor-Version 1
Instruction Set: The processor supports a set of 10 instructions designed for basic computing tasks.
| Instruction | Description |
|---|---|
ADD |
Addition operation. |
SUB |
Subtraction operation. |
MUL |
Multiplication operation. |
MOVI |
Move immediate value to register. |
JZR |
Jump if zero instruction. |
NEG |
Negate operation. |
AND |
Bitwise AND operation. |
OR |
Bitwise OR operation. |
ANDN |
Bitwise AND with NOT operation. (A AND (NOT B)) |
ORN |
Bitwise OR with NOT operation. (A OR (NOT B)) |
ALU: The processor includes a simple Arithmetic Logic Unit capable of performing arithmetic and logic operations such as addition, subtraction, AND, OR, etc.
- Simulation: The processor design can be simulated using a hardware description language (VHDL) simulator such as Vivado
- Synthesis: Synthesize the processor design for specific FPGA platforms using synthesis tools like Vivado
- Programming: Write programs in assembly language using the supported instruction set, assemble them, and load them onto the ROM for execution.
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/NanoProcessor.srcs/: This directory contains all the source files related to the nano processor project.
- /constrs_1/new/: Contains constraint files that define pin assignments and properties for the FPGA, including clock signals, LEDs, 7-segment displays, and buttons.
- /sim_1/new/: Includes simulation scripts and testbenches used to verify the functionality of the processor design.
- /sources_1/new/: Contains the VHDL files describing the processor architecture and ALU.
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NanoProcessor.xpr: The Vivado project file for the nano processor, which includes project settings and references to all the design files.
Read the Detailed Design Document
This document details the development and implementation of our project. It includes all the source codes, testbench codes, timing diagrams, example test cases, and discussion.