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Upload mtb-example-psoc6-smartio-ramping-led 2.2.0.108
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gitlab-runner committed Feb 23, 2021
1 parent fb7831a commit 6a4f9fd
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[Device=CY8C624AFNI-S2D43]

[Blocks]
# WIFI
# CYBSP_WIFI_SDIO
sdhc[0]
# CYBSP_WIFI_SDIO_D0
ioss[0].port[2].pin[0]
# CYBSP_WIFI_SDIO_D1
ioss[0].port[2].pin[1]
# CYBSP_WIFI_SDIO_D2
ioss[0].port[2].pin[2]
# CYBSP_WIFI_SDIO_D3
ioss[0].port[2].pin[3]
# CYBSP_WIFI_SDIO_CMD
ioss[0].port[2].pin[4]
# CYBSP_WIFI_SDIO_CLK
ioss[0].port[2].pin[5]
# CYBSP_WIFI_WL_REG_ON
ioss[0].port[2].pin[6]
# CYBSP_WIFI_DEVICE_WAKE
ioss[0].port[2].pin[7]
# CYBSP_WIFI_HOST_WAKE
ioss[0].port[1].pin[4]

# BT UART
# CYBSP_BT_UART
scb[12]
# CYBSP_BT_POWER
ioss[0].port[12].pin[0]
# CYBSP_BT_DEVICE_WAKE
ioss[0].port[12].pin[2]
# CYBSP_BT_HOST_WAKE
ioss[0].port[12].pin[3]
# CYBSP_BT_UART_RX
ioss[0].port[13].pin[4]
# CYBSP_BT_UART_TX
ioss[0].port[13].pin[5]
# CYBSP_BT_UART_RTS
ioss[0].port[13].pin[6]
# CYBSP_BT_UART_CTS
ioss[0].port[13].pin[7]
# CYBSP_BT_UART_CLK_DIV
peri[0].div_16[1]

# UART
# CYBSP_DEBUG_UART
scb[10]
# CYBSP_DEBUG_UART_RX
ioss[0].port[5].pin[4]
# CYBSP_DEBUG_UART_TX
ioss[0].port[5].pin[5]
# CYBSP_DEBUG_UART_RTS
ioss[0].port[5].pin[6]
# CYBSP_DEBUG_UART_CTS
ioss[0].port[5].pin[7]

# CYBSP_DEBUG_UART_CLK_DIV
peri[0].div_16[0]

# POWER
srss[0].power[0]

# RTC
srss[0].rtc[0]

# CM0(NP) I2C
# CYBSP_I2C_SCL
ioss[0].port[8].pin[0]
# CYBSP_I2C_SDA
ioss[0].port[8].pin[1]
63 changes: 63 additions & 0 deletions COMPONENT_CUSTOM_DESIGN_MODUS/TARGET_CYSBSYSKIT-01/design.cyqspi
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<?xml version="1.0"?>
<!--This file should not be modified. It was automatically generated by QSPI Configurator 2.0.0.1483-->
<Configuration app="QSPI" major="2" minor="0">
<DevicePath>PSoC 6.xml</DevicePath>
<SlotConfigs>
<SlotConfig>
<SlaveSlot>0</SlaveSlot>
<PartNumber>S25FL512S</PartNumber>
<MemoryMapped>false</MemoryMapped>
<DualQuad>None</DualQuad>
<StartAddress>0x18000000</StartAddress>
<Size>0x10000</Size>
<EndAddress>0x1800FFFF</EndAddress>
<WriteEnable>true</WriteEnable>
<Encrypt>false</Encrypt>
<DataSelect>QUAD_SPI_DATA_0_3</DataSelect>
<MemoryConfigsPath>S25FL512S</MemoryConfigsPath>
<ConfigDataInFlash>true</ConfigDataInFlash>
</SlotConfig>
<SlotConfig>
<SlaveSlot>1</SlaveSlot>
<PartNumber>Not used</PartNumber>
<MemoryMapped>false</MemoryMapped>
<DualQuad>None</DualQuad>
<StartAddress>0x18010000</StartAddress>
<Size>0x10000</Size>
<EndAddress>0x1801FFFF</EndAddress>
<WriteEnable>false</WriteEnable>
<Encrypt>false</Encrypt>
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
<ConfigDataInFlash>false</ConfigDataInFlash>
</SlotConfig>
<SlotConfig>
<SlaveSlot>2</SlaveSlot>
<PartNumber>Not used</PartNumber>
<MemoryMapped>false</MemoryMapped>
<DualQuad>None</DualQuad>
<StartAddress>0x18020000</StartAddress>
<Size>0x10000</Size>
<EndAddress>0x1802FFFF</EndAddress>
<WriteEnable>false</WriteEnable>
<Encrypt>false</Encrypt>
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
<ConfigDataInFlash>false</ConfigDataInFlash>
</SlotConfig>
<SlotConfig>
<SlaveSlot>3</SlaveSlot>
<PartNumber>Not used</PartNumber>
<MemoryMapped>false</MemoryMapped>
<DualQuad>None</DualQuad>
<StartAddress>0x18030000</StartAddress>
<Size>0x10000</Size>
<EndAddress>0x1803FFFF</EndAddress>
<WriteEnable>false</WriteEnable>
<Encrypt>false</Encrypt>
<DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
<MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
<ConfigDataInFlash>false</ConfigDataInFlash>
</SlotConfig>
</SlotConfigs>
</Configuration>
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