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1 parent 34aab05 commit 94a4dfcCopy full SHA for 94a4dfc
configs/defconfig.esp32p4
@@ -31,8 +31,8 @@ CONFIG_CACHE_L2_CACHE_LINE_128B=y
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# RGB Display Optimizations
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CONFIG_LCD_RGB_ISR_IRAM_SAFE=y
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-# ESP_HOSTED_ENABLE_ITWT is not set
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-# ESP_HOSTED_ENABLE_DPP is not set
+# CONFIG_ESP_HOSTED_ENABLE_ITWT is not set
+# CONFIG_ESP_HOSTED_ENABLE_DPP is not set
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CONFIG_SLAVE_IDF_TARGET_ESP32C6=y
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CONFIG_ESP_SDIO_BUS_WIDTH=4
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CONFIG_ESP_SDIO_CLOCK_FREQ_KHZ=40000
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