GitHub - JavierAGalvis/Pong-FPGA: Pong VGA for a DE0 Altera model FPGA programmed in VHDL.

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Pong VGA for a DE0 Altera model FPGA programmed in VHDL.

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Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
Bola.vhd		Bola.vhd
FSM_Antirebote.vhd		FSM_Antirebote.vhd
FSM_Efectos.vhd		FSM_Efectos.vhd
HSync.vhd		HSync.vhd
Points.vhd		Points.vhd
Pong.rar		Pong.rar
Raqueta.vhd		Raqueta.vhd
Univ_counter.vhd		Univ_counter.vhd
VGA_Controller.vhd		VGA_Controller.vhd
VGA_Sync.vhd		VGA_Sync.vhd
my_dff.vhd		my_dff.vhd
my_pll.vhd		my_pll.vhd
my_reg.vhd		my_reg.vhd