.svlint.toml

# https://github.com/dalance/svlint/blob/master/RULES.md

[option]
exclude_paths = []
indent = 2
prefix_inout = "b_"
prefix_input = "i_"
prefix_output = "o_"
prefix_label = "l_"
prefix_instance = "u_"
prefix_module = "m_"
prefix_package = "p_"
prefix_interface = "i_"

[rules]
blocking_assignment_in_always_ff = true
case_default = true
default_nettype_none = false
enum_with_type = true
explicit_case_default = true
explicit_if_else = true
for_with_begin = true
function_same_as_system_function = true
function_with_automatic = true
generate_case_with_label = true
generate_for_with_label = true
generate_if_with_label = true
generate_keyword_forbidden = true
generate_keyword_required = true
genvar_declaration_in_loop = true
genvar_declaration_out_loop = true
if_with_begin = true
inout_with_tri = true
input_with_var = false
interface_port_with_modport = true
legacy_always = false
level_sensitive_always = false
localparam_explicit_type = true
localparam_type_twostate = true
loop_variable_declaration = true
lowercamelcase_interface = false
lowercamelcase_module = false
lowercamelcase_package = false
non_ansi_module = false
non_blocking_assignment_in_always_comb = true
output_with_var = false
parameter_explicit_type = true
parameter_in_package = true
parameter_type_twostate = true
prefix_inout = true
prefix_input = true
prefix_instance = true
prefix_interface = true
prefix_module = true
prefix_output = true
prefix_package = true
priority_keyword = true
sequential_block_in_always_comb = true
sequential_block_in_always_ff = true
sequential_block_in_always_latch = true
style_commaleading = false
style_indent = true
style_keyword_0or1space = true
style_keyword_0space = true
style_keyword_1or2space = true
style_keyword_1space = true
style_keyword_construct = true
style_keyword_datatype = true
style_keyword_end = true
style_keyword_maybelabel = true
style_keyword_newline = true
tab_character = true
unique0_keyword = true
unique_keyword = true
uppercamelcase_interface = false
uppercamelcase_module = false
uppercamelcase_package = false
wire_reg = false