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Updated the demo design to work with Libero and SmartHLS 2023.2 release
Updated the demo design, added canny filter (Gaussian Blur + Sobel + Non-maximum Suppression + Hysteresis Thresholding) to the Video Pipeline
Added FrameBufferControl module to the demo design to control DDR read/write addresses and make sure the DDR writer and Video Pipeline do not simultaneously access the same frame buffer in DDR
Updated the AXIS to Video converter, adding yellow screen option. Now users will see a yellow screen on their display if the converter is not in locked mode (as a result of inconsistent/broken data), help them debugging their designs
Fixed issues with Canny filter not working as expected on board, adjusting internal FIFOs and data widths