Relay based replication of the first comercially available cpu, the intel 4004.
The aim of this project is to design and built a Intel 4004 CPU with relays and basic electrical components.
The general layout of the cpu is very similar to the original Intel 4004 design.
Since relays are effectively current driven devices the general design of this cpu is active-high and inactive-hi-Z, where low signals are represented as high impedance.
The CPU requires multiple voltage levels for correct operation:
| Name | Abbr. | Level | Description | bound |
|---|---|---|---|---|
| ground | GND | 0V | common ground for all components | - |
| coil retention | Vcr | +2V | retention voltage of the FF/registers | 20% Vr < Vcr < 75% Vr |
| design-voltage | Vnom | +5V | normal relay operation voltage | relay dependant |
| high-voltage | Vhi | +9.4V | high voltage used for arithmetic calculations | regard derivation of paper |
Actual voltage levels depend on Vnom and are currently still to be determine (WIP/TBD).
The ALU exclusively uses a special High-Voltage(HiV or Vhi) design where active-high uses a special higher voltage level than the regular design.
This allows for highly optimized design of the underlying logic gates used in the ALU and therefor reducing the required relay count and execution time.
Due to the expected size requirements of the assembled hardware the CPU will be partitioned into multiple PCBs, each connected via edge-connecters to a common backplane.
SystemC is used as a prototyping and validation platform. The relay based CPU architecture is implemented in SystemC RTL. Electrical verfication may be implemented in SystemC AMS or alternatively in Falstad.
Falstad's electrical circuit simulator is currently used for testing and simulation of simple electrical implementations of logic circuits or general proof-of-concepts.
see Falstad README for more details
- Intel 4004 Datasheet
- MCS4 Reference Datasheets
- MCS4 User Manual
- MCS4 Assembly Language Programming Manual
- 4004 Schematic
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