Counters such as 74ls93 are sequential circuits which can be designed with JK flip-flops and simulated using the Quartus application. These sequential circuits go through a defined sequence of states upon the application of input impulses.
Clone this repository and run the main project file, Counter_lab6_74ls93.qpf, with the Quartus Prime software.
After running the project file, click on RTL viewer as shown in the image below to see the design.
Run simulations on the design based on inputs by following these steps.
- Run the project file:
Counter_lab6_74ls93.qpf - Go to File >> New
- Choose the University program under Verification/debugging files
- Go to Edit >> Insert >> Insert Node or bus >> Node Finder >> List
- Make sure to press okay when it appears after completing the steps
- Choose the input states from the selection menu
- Run the type of simulation you want from the options under Simulation
You can see some of the simulations I performed in simulation\qsim. They end with the extensions ".vwf".
The simulations should look something like the image below.
This project is licensed under the “Commons Clause” License Condition v1.0. See LICENSE for more information.
- Incorporate the Counter 74LS93 in other digital logic and electronic designs and see how well it performs
- Allow other persons to use and test the design
- Act on the feedback accordingly