Pinned Loading

1. ip_amba_ahb_ms_rtl_v ip_amba_ahb_ms_rtl_v Public

   RTL design for the AMBA AHB protocol.

   SystemVerilog 7 3

2. ip_amba_apb_ms_rtl_v ip_amba_apb_ms_rtl_v Public

   The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )

   Verilog 12 5

3. ip_generic_custom_lfsr_generator_verilog ip_generic_custom_lfsr_generator_verilog Public

   Custom polynomial ( variable width ) LFSR ( Galios/Fib ) generator

   Shell 1 1

4. ip_parallel_custom_crc_gerator_verilog ip_parallel_custom_crc_gerator_verilog Public

   Verilog parallel CRC generation module with custom polynomial and variable width

   Perl 4 2

5. rtl_template_gen rtl_template_gen Public

   Script to generate a verilog IP template for quick build ( supports makefile, compilefileist and more )

   Shell 2

6. rv_namec rv_namec Public

   RISC-V ( 32b / Single Cycle ) - "RV32I"

   Shell 2