priv unit: delay interrupt until ex_mem_stall goes low
#43
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
…injection This fixes an issue where the pipeline is [garbage, jump, load] when the interrupt is fired. After the interrupt fires and the PC is injected, the pipeline becomes [interrupt, jump, load]. After the load completes, the pipeline is [garbage, interrupt, jump] the jump flushes the interrupt pc from execute so the pipeline becomes [jump dest, bubble, bubble]. By injecting the PC the entire time `ex_mem_stall` is high, when the load/store completes, the `ex_flush_hazard` signal will go high and properly flush the jump. [interrupt, jump, load] -> [interrupt, bubble, bubble]
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This PR fixes an issue where if the pipeline contains a jump instruction in execute and a load/store in memory when an interrupt is fired. In this case, the interrupt will fire, save the jump as the mepc, and insert the interrupt PC into the fetch stage. However, when the jump executes, the interrupt PC in the previous stage will be squashed giving incorrect behavior.
After these changes, loads/stores will cause the interrupt to be stalled until the memory request completes.
The
int_during_retandbus_faulttests time out before and after this change, all other interrupt-exceptions tests continue to pass.This won't cause any unintended effects to say tight loops which do many loads and stores since as soon as the first load/store completes, it will service the interrupt.