PoC: BRAVO bit reversal #62
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Apple M4 also benefits at chunk size 4, if not quite as much: https://pastebin.com/tcSHgsqf With this PR as-is with chunk size 8 performance collapses, so we'll need some sort of selection mechanism - maybe #60 maybe something simpler |
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Use SIMD operations for bit reversal as per #61
I gave Claude Code the original paper and the tests it has to pass, and iterated a bit, and got this. Not ready for merging: needs cleanup, porting to stable, ideally adaptation to native SIMD size and different SIMD sizes for f32/f64.
on zen4 blows everything else out of the water, benchmarks are green across the board: https://gist.github.com/Shnatsel/fd48d7ca13a3e5e5c01e9620c249e8e2