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Merge pull request #6596 from The-OpenROAD-Project-staging/ppl-revert
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Revert "Merge pull request #6576 from eder-matheus/ppl_fix"
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@maliberty
maliberty authored Jan 27, 2025
2 parents ae7087c + eec9268 commit 9281fce
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Showing 59 changed files with 53,290 additions and 53,271 deletions.
6 changes: 3 additions & 3 deletions src/mpl2/test/guides1.defok
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Original file line number Diff line number Diff line change
Expand Up @@ -520,15 +520,15 @@ PINS 3 ;
- io_1 + NET io_1 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 154700 ) N ;
+ PLACED ( 140 155820 ) N ;
- io_2 + NET io_2 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 51660 ) N ;
+ PLACED ( 140 50540 ) N ;
- io_3 + NET io_3 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 13580 ) N ;
+ PLACED ( 140 12460 ) N ;
END PINS
NETS 3 ;
- io_1 ( PIN io_1 ) + USE SIGNAL ;
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2 changes: 1 addition & 1 deletion src/mpl2/test/guides1.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
[INFO PPL-0067] Restrict INPUT pins to region 0u-125u, in the LEFT edge.
Found 1 macro blocks.
Using 2 tracks default min distance between IO pins.
[INFO PPL-0001] Number of slots 966
[INFO PPL-0001] Number of slots 974
[INFO PPL-0002] Number of I/O 3
[INFO PPL-0003] Number of I/O w/sink 0
[INFO PPL-0004] Number of I/O w/o sink 3
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6 changes: 3 additions & 3 deletions src/mpl2/test/io_constraints1.defok
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Original file line number Diff line number Diff line change
Expand Up @@ -520,15 +520,15 @@ PINS 3 ;
- io_1 + NET io_1 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 154700 ) N ;
+ PLACED ( 140 155820 ) N ;
- io_2 + NET io_2 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 51660 ) N ;
+ PLACED ( 140 50540 ) N ;
- io_3 + NET io_3 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal5 ( -140 -140 ) ( 140 140 )
+ PLACED ( 140 13580 ) N ;
+ PLACED ( 140 12460 ) N ;
END PINS
NETS 3 ;
- io_1 ( PIN io_1 ) + USE SIGNAL ;
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2 changes: 1 addition & 1 deletion src/mpl2/test/io_constraints1.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
[INFO PPL-0067] Restrict INPUT pins to region 0u-125u, in the LEFT edge.
Found 1 macro blocks.
Using 2 tracks default min distance between IO pins.
[INFO PPL-0001] Number of slots 966
[INFO PPL-0001] Number of slots 974
[INFO PPL-0002] Number of I/O 3
[INFO PPL-0003] Number of I/O w/sink 0
[INFO PPL-0004] Number of I/O w/o sink 3
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6 changes: 3 additions & 3 deletions src/mpl2/test/io_constraints2.defok
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Original file line number Diff line number Diff line change
Expand Up @@ -520,15 +520,15 @@ PINS 3 ;
- io_1 + NET io_1 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal6 ( -140 -140 ) ( 140 140 )
+ PLACED ( 254430 140 ) N ;
+ PLACED ( 187230 140 ) N ;
- io_2 + NET io_2 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal6 ( -140 -140 ) ( 140 140 )
+ PLACED ( 238750 140 ) N ;
+ PLACED ( 121150 140 ) N ;
- io_3 + NET io_3 + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal6 ( -140 -140 ) ( 140 140 )
+ PLACED ( 234270 140 ) N ;
+ PLACED ( 275710 140 ) N ;
END PINS
NETS 3 ;
- io_1 ( PIN io_1 ) + USE SIGNAL ;
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2 changes: 1 addition & 1 deletion src/mpl2/test/io_constraints2.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
[INFO ODB-0253] Updated 401 components.
Found 1 macro blocks.
Using 2 tracks default min distance between IO pins.
[INFO PPL-0001] Number of slots 966
[INFO PPL-0001] Number of slots 974
[INFO PPL-0002] Number of I/O 3
[INFO PPL-0003] Number of I/O w/sink 0
[INFO PPL-0004] Number of I/O w/o sink 3
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3 changes: 1 addition & 2 deletions src/ppl/src/IOPlacer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -924,8 +924,7 @@ void IOPlacer::findSlots(const std::set<int>& layers, Edge edge)

half_width *= thickness_multiplier;

int num_tracks_offset
= std::ceil(static_cast<double>(corner_avoidance_) / min_dst_pins);
int num_tracks_offset = std::ceil(corner_avoidance_ / min_dst_pins);

start_idx
= std::max(0.0,
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56 changes: 28 additions & 28 deletions src/ppl/test/add_constraint7.defok
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Original file line number Diff line number Diff line change
Expand Up @@ -118,23 +118,23 @@ PINS 54 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 178030 201530 ) N ;
+ PLACED ( 178790 201530 ) N ;
- req_msg[0] + NET req_msg[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 2470 70 ) N ;
+ PLACED ( 1710 70 ) N ;
- req_msg[10] + NET req_msg[10] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 171950 70 ) N ;
+ PLACED ( 172710 70 ) N ;
- req_msg[11] + NET req_msg[11] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 175750 70 ) N ;
+ PLACED ( 176510 70 ) N ;
- req_msg[12] + NET req_msg[12] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 156750 70 ) N ;
+ PLACED ( 157510 70 ) N ;
- req_msg[13] + NET req_msg[13] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -146,19 +146,19 @@ PINS 54 ;
- req_msg[15] + NET req_msg[15] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 126350 70 ) N ;
+ PLACED ( 127110 70 ) N ;
- req_msg[16] + NET req_msg[16] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 160550 70 ) N ;
+ PLACED ( 161310 70 ) N ;
- req_msg[17] + NET req_msg[17] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 62510 70 ) N ;
- req_msg[18] + NET req_msg[18] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 141550 70 ) N ;
+ PLACED ( 142310 70 ) N ;
- req_msg[19] + NET req_msg[19] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -178,47 +178,47 @@ PINS 54 ;
- req_msg[22] + NET req_msg[22] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 114950 70 ) N ;
+ PLACED ( 115710 70 ) N ;
- req_msg[23] + NET req_msg[23] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 54910 70 ) N ;
- req_msg[24] + NET req_msg[24] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 149150 70 ) N ;
+ PLACED ( 149910 70 ) N ;
- req_msg[25] + NET req_msg[25] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 107350 70 ) N ;
+ PLACED ( 108110 70 ) N ;
- req_msg[26] + NET req_msg[26] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 70110 70 ) N ;
- req_msg[27] + NET req_msg[27] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 145350 70 ) N ;
+ PLACED ( 146110 70 ) N ;
- req_msg[28] + NET req_msg[28] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 39710 70 ) N ;
- req_msg[29] + NET req_msg[29] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 183350 70 ) N ;
+ PLACED ( 184110 70 ) N ;
- req_msg[2] + NET req_msg[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 111150 70 ) N ;
+ PLACED ( 111910 70 ) N ;
- req_msg[30] + NET req_msg[30] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 13110 70 ) N ;
- req_msg[31] + NET req_msg[31] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 168150 70 ) N ;
+ PLACED ( 168910 70 ) N ;
- req_msg[3] + NET req_msg[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -234,35 +234,35 @@ PINS 54 ;
- req_msg[6] + NET req_msg[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 130150 70 ) N ;
+ PLACED ( 130910 70 ) N ;
- req_msg[7] + NET req_msg[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 118750 70 ) N ;
+ PLACED ( 119510 70 ) N ;
- req_msg[8] + NET req_msg[8] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 190950 70 ) N ;
+ PLACED ( 191710 70 ) N ;
- req_msg[9] + NET req_msg[9] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 85310 70 ) N ;
- req_rdy + NET req_rdy + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 187150 70 ) N ;
+ PLACED ( 187910 70 ) N ;
- req_val + NET req_val + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 92910 70 ) N ;
- reset + NET reset + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 3230 70 ) N ;
+ PLACED ( 2470 70 ) N ;
- resp_msg[0] + NET resp_msg[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 179550 70 ) N ;
+ PLACED ( 180310 70 ) N ;
- resp_msg[10] + NET resp_msg[10] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -274,7 +274,7 @@ PINS 54 ;
- resp_msg[12] + NET resp_msg[12] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 122550 70 ) N ;
+ PLACED ( 123310 70 ) N ;
- resp_msg[13] + NET resp_msg[13] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -294,15 +294,15 @@ PINS 54 ;
- resp_msg[2] + NET resp_msg[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 133950 70 ) N ;
+ PLACED ( 134710 70 ) N ;
- resp_msg[3] + NET resp_msg[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 137750 70 ) N ;
+ PLACED ( 138510 70 ) N ;
- resp_msg[4] + NET resp_msg[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 103550 70 ) N ;
+ PLACED ( 104310 70 ) N ;
- resp_msg[5] + NET resp_msg[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand All @@ -314,19 +314,19 @@ PINS 54 ;
- resp_msg[7] + NET resp_msg[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 194750 70 ) N ;
+ PLACED ( 195510 70 ) N ;
- resp_msg[8] + NET resp_msg[8] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 164350 70 ) N ;
+ PLACED ( 165110 70 ) N ;
- resp_msg[9] + NET resp_msg[9] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 16910 70 ) N ;
- resp_rdy + NET resp_rdy + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
+ PLACED ( 152950 70 ) N ;
+ PLACED ( 153710 70 ) N ;
- resp_val + NET resp_val + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER metal2 ( -70 -70 ) ( 70 70 )
Expand Down
2 changes: 1 addition & 1 deletion src/ppl/test/add_constraint8.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 10.00u-20.00u at the BOTTOM edge.
Found 0 macro blocks.
Using 2 tracks default min distance between IO pins.
[INFO PPL-0001] Number of slots 1220
[INFO PPL-0001] Number of slots 1228
[INFO PPL-0002] Number of I/O 54
[INFO PPL-0003] Number of I/O w/sink 54
[INFO PPL-0004] Number of I/O w/o sink 0
Expand Down
2 changes: 1 addition & 1 deletion src/ppl/test/add_constraint_error8.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
[INFO PPL-0048] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 80.00u-100.00u at the TOP edge.
Found 0 macro blocks.
Using 2 tracks default min distance between IO pins.
[WARNING PPL-0110] Constraint has 54 pins, but only 50 available slots.
[WARNING PPL-0110] Constraint has 54 pins, but only 51 available slots.
Increase the region 80.00um-100.00um on the TOP edge to 78.61um-100.00um.
[ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins.
PPL-0111
2 changes: 1 addition & 1 deletion src/ppl/test/add_constraint_error9.ok
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
[INFO PPL-0048] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-20.00u at the TOP edge.
Found 0 macro blocks.
Using 2 tracks default min distance between IO pins.
[WARNING PPL-0110] Constraint has 54 pins, but only 50 available slots.
[WARNING PPL-0110] Constraint has 54 pins, but only 51 available slots.
Increase the region 0.00um-20.00um on the TOP edge to 0.00um-21.52um.
[ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins.
PPL-0111
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