Merge pull request #6764 from The-OpenROAD-Project-staging/secure-rsz…

…-limit-vt

Sizing restriction enhancement for VT

src/gpl/src/mbff.cpp

@@ -2240,15 +2240,15 @@ void MBFF::Run(const int mx_sz, const float alpha, const float beta)
   }
   avg_disp /= flops_.size();
 
-  log_->report("Alpha = {}, Beta = {}, #paths = {}, max size = {}",
+  log_->report("Alpha = {:.1f}, Beta = {:.1f}, #paths = {}, max size = {}",
                alpha,
                beta,
                num_paths,
                mx_sz);
-  log_->report("Total ILP Cost: {}", tot_ilp);
-  log_->report("Total Timing Critical Path Displacement: {}", tcp_disp);
-  log_->report("Average slot-to-flop displacement: {}", avg_disp);
-  log_->report("Final Objective Value: {}", tot_ilp + tcp_disp);
+  log_->report("Total ILP Cost: {:.3f}", tot_ilp);
+  log_->report("Total Timing Critical Path Displacement: {:.1f}", tcp_disp);
+  log_->report("Average slot-to-flop displacement: {:.3f}", avg_disp);
+  log_->report("Final Objective Value: {:.3f}", tot_ilp + tcp_disp);
   log_->report("Sizes used");
   for (const auto [tray, count] : tray_sizes_used_) {
     log_->report("  {}-bit: {}", tray, count);

src/gpl/test/clust01.ok

@@ -9,11 +9,11 @@
 [INFO ODB-0130]     Created 9 pins.
 [INFO ODB-0131]     Created 4 components and 20 component-terminals.
 [INFO ODB-0133]     Created 9 nets and 12 connections.
-Alpha = 40, Beta = 1, #paths = 0, max size = -1
-Total ILP Cost: 97.228264
-Total Timing Critical Path Displacement: 0
+Alpha = 40.0, Beta = 1.0, #paths = 0, max size = -1
+Total ILP Cost: 97.228
+Total Timing Critical Path Displacement: 0.0
 Average slot-to-flop displacement: 0.865
-Final Objective Value: 97.228264
+Final Objective Value: 97.228
 Sizes used
   2-bit: 2
 No differences found.

src/gpl/test/clust02.ok

@@ -6,10 +6,10 @@
 [INFO ODB-0394] Duplicate site asap7sc7p5t_pg in asap7sc7p5t_DFFHQNH2V2X already seen in asap7sc7p5t_DFFHQNV2X
 [INFO ODB-0227] LEF file: ./4BitTrayH2W2/asap7sc7p5t_DFFHQNH2V2X.lef, created 9 library cells
 [INFO IFP-0001] Added 370 rows of 1851 site asap7sc7p5t.
-Alpha = 60, Beta = 1, #paths = 0, max size = 50
+Alpha = 60.0, Beta = 1.0, #paths = 0, max size = 50
 Total ILP Cost: 4155.465
-Total Timing Critical Path Displacement: 0
-Average slot-to-flop displacement: 5.4878607
+Total Timing Critical Path Displacement: 0.0
+Average slot-to-flop displacement: 5.488
 Final Objective Value: 4155.465
 Sizes used
   1-bit: 2

src/mpl/src/clusterEngine.cpp

@@ -239,7 +239,8 @@ void ClusteringEngine::reportDesignData()
 {
   const odb::Rect& die = block_->getDieArea();
   logger_->report(
-      "Die Area: ({}, {}) ({}, {}),  Floorplan Area: ({}, {}) ({}, {})",
+      "Die Area: ({:.2f}, {:.2f}) ({:.2f}, {:.2f}),  Floorplan Area: ({:.2f}, "
+      "{:.2f}) ({:.2f}, {:.2f})",
       block_->dbuToMicrons(die.xMin()),
       block_->dbuToMicrons(die.yMin()),
       block_->dbuToMicrons(die.xMax()),

src/mpl/test/guides1.ok

@@ -5,15 +5,15 @@
 [INFO ODB-0128] Design: guides1
 [INFO ODB-0252]     Updated 3 pins.
 [INFO ODB-0253]     Updated 401 components.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-125u, in the LEFT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-125.00u, in the LEFT edge.
 Found 1 macro blocks.
 Using 2 tracks default min distance between IO pins.
 [INFO PPL-0001] Number of slots           966
 [INFO PPL-0002] Number of I/O             3
 [INFO PPL-0003] Number of I/O w/sink      0
 [INFO PPL-0004] Number of I/O w/o sink    3
 [INFO PPL-0012] I/O nets HPWL: 0.00 um.
-Die Area: (0, 0) (150, 125),  Floorplan Area: (0, 0) (149.91, 124.6)
+Die Area: (0.00, 0.00) (150.00, 125.00),  Floorplan Area: (0.00, 0.00) (149.91, 124.60)
 	Number of std cell instances: 400
 	Area of std cell instances: 1808.79
 	Number of macros: 1

src/mpl/test/guides2.ok

@@ -3,7 +3,7 @@
 [WARNING STA-1171] ./testcases/macro_only.lib line 32, default_max_transition is 0.0.
 [INFO ODB-0128] Design: macro_only
 [INFO ODB-0253]     Updated 10 components.
-Die Area: (0, 0) (450, 450),  Floorplan Area: (4.94, 4.2) (444.98, 443.8)
+Die Area: (0.00, 0.00) (450.00, 450.00),  Floorplan Area: (4.94, 4.20) (444.98, 443.80)
 	Number of std cell instances: 0
 	Area of std cell instances: 0.00
 	Number of macros: 10

src/mpl/test/io_constraints1.ok

@@ -5,15 +5,15 @@
 [INFO ODB-0128] Design: io_constraints1
 [INFO ODB-0252]     Updated 3 pins.
 [INFO ODB-0253]     Updated 401 components.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-125u, in the LEFT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-125.00u, in the LEFT edge.
 Found 1 macro blocks.
 Using 2 tracks default min distance between IO pins.
 [INFO PPL-0001] Number of slots           966
 [INFO PPL-0002] Number of I/O             3
 [INFO PPL-0003] Number of I/O w/sink      0
 [INFO PPL-0004] Number of I/O w/o sink    3
 [INFO PPL-0012] I/O nets HPWL: 0.00 um.
-Die Area: (0, 0) (150, 125),  Floorplan Area: (0, 0) (149.91, 124.6)
+Die Area: (0.00, 0.00) (150.00, 125.00),  Floorplan Area: (0.00, 0.00) (149.91, 124.60)
 	Number of std cell instances: 400
 	Area of std cell instances: 1808.79
 	Number of macros: 1

src/mpl/test/io_constraints2.ok

@@ -12,7 +12,7 @@ Using 2 tracks default min distance between IO pins.
 [INFO PPL-0003] Number of I/O w/sink      0
 [INFO PPL-0004] Number of I/O w/o sink    3
 [INFO PPL-0012] I/O nets HPWL: 0.00 um.
-Die Area: (0, 0) (150, 125),  Floorplan Area: (0, 0) (149.91, 124.6)
+Die Area: (0.00, 0.00) (150.00, 125.00),  Floorplan Area: (0.00, 0.00) (149.91, 124.60)
 	Number of std cell instances: 400
 	Area of std cell instances: 1808.79
 	Number of macros: 1

src/mpl/test/macro_only.ok

@@ -3,7 +3,7 @@
 [WARNING STA-1171] ./testcases/macro_only.lib line 32, default_max_transition is 0.0.
 [INFO ODB-0128] Design: macro_only
 [INFO ODB-0253]     Updated 10 components.
-Die Area: (0, 0) (450, 450),  Floorplan Area: (4.94, 4.2) (444.98, 443.8)
+Die Area: (0.00, 0.00) (450.00, 450.00),  Floorplan Area: (4.94, 4.20) (444.98, 443.80)
 	Number of std cell instances: 0
 	Area of std cell instances: 0.00
 	Number of macros: 10

src/par/src/Evaluator.cpp

@@ -274,16 +274,17 @@ void GoldenEvaluator::PrintPathStats(const PathStats& path_stats) const
                   path_stats.tot_num_noncritical_path);
   logger_->report("\tThe worst number of cuts on timing-critical paths = {}",
                   path_stats.worst_cut_critical_path);
-  logger_->report("\tThe average number of cuts on timing-critical paths = {}",
-                  path_stats.avg_cut_critical_path);
+  logger_->report(
+      "\tThe average number of cuts on timing-critical paths = {:.2f}",
+      path_stats.avg_cut_critical_path);
   logger_->report(
       "\tTotal number of timing-noncritical to timing critical paths = {}",
       path_stats.number_non2critical_path);
   logger_->report(
       "\tThe worst number of cuts on timing-non2critical paths = {}",
       path_stats.worst_cut_non2critical_path);
   logger_->report(
-      "\tThe average number of cuts on timing-non2critical paths = {}",
+      "\tThe average number of cuts on timing-non2critical paths = {:.2f}",
       path_stats.avg_cut_non2critical_path);
 }
 

src/par/src/TritonPart.cpp

@@ -261,7 +261,7 @@ void TritonPart::PartitionHypergraph(unsigned int num_parts_arg,
 
   logger_->report("Partitioning Parameters");
   logger_->report("\tNumber of partitions = {}", num_parts_);
-  logger_->report("\tUBfactor = {}", ub_factor_);
+  logger_->report("\tUBfactor = {:.1f}", ub_factor_);
   logger_->report("\tSeed = {}", seed_);
   logger_->report("\tVertex dimensions = {}", vertex_dimensions_);
   logger_->report("\tHyperedge dimensions = {}", hyperedge_dimensions_);

src/par/test/partition_gcd.ok

@@ -21,10 +21,10 @@ Display Timing Path Cuts Statistics
 	Total number of timing-critical paths = 1
 	Total number of timing-noncritical paths = 51
 	The worst number of cuts on timing-critical paths = 1
-	The average number of cuts on timing-critical paths = 1
+	The average number of cuts on timing-critical paths = 1.00
 	Total number of timing-noncritical to timing critical paths = 32
 	The worst number of cuts on timing-non2critical paths = 2
-	The average number of cuts on timing-non2critical paths = 1.28125
+	The average number of cuts on timing-non2critical paths = 1.28
 [INFO PAR-0001] Writing partition to verilog.
 No differences found.
 No differences found.

src/pdn/src/straps.cpp

@@ -129,8 +129,9 @@ bool Straps::checkLayerOffsetSpecification(bool error) const
       getLogger()->error(
           utl::PDN,
           185,
-          "Insufficient width ({} um) to add straps on layer {} in grid \"{}\" "
-          "with total strap width {} um and offset {} um.",
+          "Insufficient width ({:.2f} um) to add straps on layer {} in grid "
+          "\"{}\" "
+          "with total strap width {:.1f} um and offset {:.1f} um.",
           layer.dbuToMicron(grid_width),
           layer_->getName(),
           getGrid()->getLongName(),

src/pdn/test/design_width.ok

@@ -4,5 +4,5 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 406 components and 1816 component-terminals.
 [INFO ODB-0133]     Created 361 nets and 1004 connections.
-[ERROR PDN-0185] Insufficient width (14.04 um) to add straps on layer M8 in grid "Core" with total strap width 6 um and offset 10 um.
+[ERROR PDN-0185] Insufficient width (14.04 um) to add straps on layer M8 in grid "Core" with total strap width 6.0 um and offset 10.0 um.
 PDN-0185

src/ppl/src/IOPlacer.cpp

@@ -1826,7 +1826,7 @@ void IOPlacer::addDirectionConstraint(Direction direction,
   Interval interval(edge, begin, end);
   logger_->info(utl::PPL,
                 67,
-                "Restrict {} pins to region {}u-{}u, in the {} edge.",
+                "Restrict {} pins to region {:.2f}u-{:.2f}u, in the {} edge.",
                 getDirectionString(direction),
                 getBlock()->dbuToMicrons(begin),
                 getBlock()->dbuToMicrons(end),

src/ppl/test/add_constraint1.ok

@@ -3,7 +3,7 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/add_constraint2.ok

@@ -3,7 +3,7 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/add_constraint3.ok

@@ -3,7 +3,7 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.8u, in the LEFT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the LEFT edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/add_constraint4.ok

@@ -3,7 +3,7 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.8u, in the RIGHT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/add_constraint5.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.8u, in the RIGHT edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.8u, in the LEFT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the LEFT edge.
 [INFO PPL-0048] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.13u at the BOTTOM edge.
 [INFO PPL-0048] Restrict pins [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] to region 0.00u-100.13u at the TOP edge.
 Found 0 macro blocks.

src/ppl/test/add_constraint_error3.ok

@@ -3,6 +3,6 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
 [ERROR PPL-0058] The -pin_names argument is required when using -group flag.
 PPL-0058

src/ppl/test/annealing_constraint1.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/annealing_constraint2.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the BOTTOM edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the TOP edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/annealing_constraint3.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.8u, in the LEFT edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.8u, in the RIGHT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the LEFT edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the RIGHT edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/annealing_constraint4.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.8u, in the RIGHT edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.8u, in the LEFT edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the LEFT edge.
 Found 0 macro blocks.
 [INFO PPL-0001] Number of slots           2494
 [INFO PPL-0002] Number of I/O             54

src/ppl/test/cells_not_placed.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 295 components and 1600 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 164 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
 Found 0 macro blocks.
 Using 2 tracks default min distance between IO pins.
 [INFO PPL-0001] Number of slots           1220

src/ppl/test/random3.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
 Found 0 macro blocks.
 Using 2 tracks default min distance between IO pins.
 [INFO PPL-0007] Random pin placement.

src/ppl/test/random8.ok

@@ -3,8 +3,8 @@
 [INFO ODB-0130]     Created 54 pins.
 [INFO ODB-0131]     Created 88 components and 422 component-terminals.
 [INFO ODB-0133]     Created 54 nets and 88 connections.
-[INFO PPL-0067] Restrict INPUT pins to region 0u-100.13u, in the TOP edge.
-[INFO PPL-0067] Restrict OUTPUT pins to region 0u-100.13u, in the BOTTOM edge.
+[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge.
+[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge.
 [INFO PPL-0048] Restrict pins [ req_msg[17] req_msg[16] req_msg[15] req_msg[14] ] to region 0.00u-100.80u at the LEFT edge.
 Found 0 macro blocks.
 Using 2 tracks default min distance between IO pins.