Skip to content

Commit

Permalink
v0.30.0
Browse files Browse the repository at this point in the history
  • Loading branch information
Paebbels authored Feb 12, 2025
2 parents 9791e0b + 4a27c47 commit fade0c9
Show file tree
Hide file tree
Showing 3 changed files with 228 additions and 38 deletions.
193 changes: 162 additions & 31 deletions pyVHDLModel/IEEE.py
Original file line number Diff line number Diff line change
Expand Up @@ -30,8 +30,13 @@
# ==================================================================================================================== #
#
"""This module contains library and package declarations for VHDL library ``IEEE``."""
from pyTooling.Decorators import export

from typing import Optional as Nullable

from pyTooling.Decorators import export, readonly

from pyVHDLModel import IEEEFlavor
from pyVHDLModel.Exception import VHDLModelException
from pyVHDLModel.Expression import EnumerationLiteral
from pyVHDLModel.Name import SimpleName
from pyVHDLModel.Predefined import PredefinedLibrary, PredefinedPackage, PredefinedPackageBody
Expand All @@ -55,7 +60,6 @@ class Ieee(PredefinedLibrary):
* :class:`~pyVHDLModel.IEEE.Std_Logic_1164`
* :class:`~pyVHDLModel.IEEE.Std_Logic_TextIO`
* :class:`~pyVHDLModel.IEEE.Std_Logic_Misc`
* Numeric
Expand All @@ -72,18 +76,57 @@ class Ieee(PredefinedLibrary):
* :class:`~pyVHDLModel.IEEE.Float_Generic_Pkg`
* :class:`~pyVHDLModel.IEEE.Float_Pkg`
* Mentor Graphics packages
* :class:`~pyVHDLModel.IEEE.Std_logic_arith`
* Synopsys packages
* :class:`~pyVHDLModel.IEEE.Std_logic_arith`
* :class:`~pyVHDLModel.IEEE.Std_logic_misc`
* :class:`~pyVHDLModel.IEEE.Std_logic_signed`
* :class:`~pyVHDLModel.IEEE.Std_logic_textio`
* :class:`~pyVHDLModel.IEEE.Std_logic_unsigned`
.. seealso::
Other predefined libraries:
* Library :class:`~pyVHDLModel.STD.Std`
"""

def __init__(self) -> None:
_flavor: IEEEFlavor

def __init__(self, flavor: Nullable[IEEEFlavor] = None) -> None:
super().__init__(PACKAGES)

self._flavor = IEEEFlavor.IEEE
if flavor is None or flavor is IEEEFlavor.IEEE:
pass
elif flavor is IEEEFlavor.MentorGraphics:
self.LoadMentorGraphicsPackages()
elif flavor is IEEEFlavor.Synopsys:
self.LoadSynopsysPackages()
else:
raise VHDLModelException(f"Unknown IEEE library flavor '{flavor}'.")
self._flavor = flavor

@readonly
def Flavor(self) -> IEEEFlavor:
return self._flavor

def LoadMentorGraphicsPackages(self) -> None:
if self._flavor is not IEEEFlavor.IEEE:
raise VHDLModelException(f"IEEE library flavor is '{self._flavor}' and can't be changed to '{IEEEFlavor.MentorGraphics}'.")

self._flavor = IEEEFlavor.MentorGraphics
self.AddPackages(MENTOR_GRAPHICS_PACKAGES)

def LoadSynopsysPackages(self) -> None:
self.AddPackages(PACKAGES_SYNOPSYS)
if self._flavor is not IEEEFlavor.IEEE:
raise VHDLModelException(f"IEEE library flavor is '{self._flavor}' and can't be changed to '{IEEEFlavor.MentorGraphics}'.")

self._flavor = IEEEFlavor.Synopsys
self.AddPackages(SYNOPSYS_PACKAGES)


@export
Expand Down Expand Up @@ -125,7 +168,7 @@ def __init__(self) -> None:


@export
class Std_logic_1164(PredefinedPackage):
class Std_Logic_1164(PredefinedPackage):
"""
Predefined package ``ieee.std_logic_1164``.
Expand Down Expand Up @@ -170,14 +213,14 @@ def __init__(self) -> None:


@export
class Std_logic_1164_Body(PredefinedPackageBody):
class Std_Logic_1164_Body(PredefinedPackageBody):
"""
Predefined package body of package ``ieee.std_logic_1164``.
"""


@export
class std_logic_textio(PredefinedPackage):
class Std_Logic_TextIO(PredefinedPackage):
"""
Predefined package ``ieee.std_logic_textio``.
"""
Expand All @@ -190,26 +233,6 @@ def __init__(self) -> None:
self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_logic_misc(PredefinedPackage):
"""
Predefined package ``ieee.std_logic_misc``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_logic_misc_Body(PredefinedPackageBody):
"""
Predefined package body of package ``ieee.std_logic_misc``.
"""


@export
class Numeric_Bit(PredefinedPackage):
"""
Expand Down Expand Up @@ -404,8 +427,8 @@ def __init__(self) -> None:
PACKAGES = (
(Math_Real, Math_Real_Body),
(Math_Complex, Math_Complex_Body),
(Std_logic_1164, Std_logic_1164_Body),
(std_logic_textio, None),
(Std_Logic_1164, Std_Logic_1164_Body),
(Std_Logic_TextIO, None),
(Numeric_Bit, Numeric_Bit_Body),
(Numeric_Bit_Unsigned, Numeric_Bit_Unsigned_Body),
(Numeric_Std, Numeric_Std_Body),
Expand All @@ -417,6 +440,114 @@ def __init__(self) -> None:
(Float_Pkg, None),
)

PACKAGES_SYNOPSYS = (
(Std_logic_misc, Std_logic_misc_Body),

@export
class Std_Logic_Arith(PredefinedPackage):
"""
Predefined Mentor Graphics package ``ieee.std_logic_arith``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))

# used inside of package
# self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_Logic_Arith_Body(PredefinedPackageBody):
"""
Predefined package body of Mentor Graphics package ``ieee.std_logic_arith``.
"""


MENTOR_GRAPHICS_PACKAGES = (
(Std_Logic_Arith, Std_Logic_Arith_Body),
)


@export
class Std_Logic_Arith(PredefinedPackage):
"""
Predefined Synopsys package ``ieee.std_logic_arith``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_Logic_Misc(PredefinedPackage):
"""
Predefined Synopsys package ``ieee.std_logic_misc``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_Logic_Misc_Body(PredefinedPackageBody):
"""
Predefined package body of Synopsys package ``ieee.std_logic_misc``.
"""


@export
class Std_Logic_Signed(PredefinedPackage):
"""
Predefined Synopsys package ``ieee.std_logic_signed``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))
self._AddPackageClause(("IEEE.std_logic_arith.all", ))


@export
class Std_Logic_TextIO(PredefinedPackage):
"""
Predefined Synopsys package ``ieee.std_logic_textio``.
"""

def __init__(self) -> None:
super().__init__()

self._AddPackageClause(("STD.textio.all", ))

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))


@export
class Std_Logic_Unsigned(PredefinedPackage):
"""
Predefined Synopsys package ``ieee.std_logic_unsigned``.
"""

def __init__(self) -> None:
super().__init__()

self._AddLibraryClause(("IEEE", ))
self._AddPackageClause(("IEEE.std_logic_1164.all", ))
self._AddPackageClause(("IEEE.std_logic_arith.all", ))


SYNOPSYS_PACKAGES = (
(Std_Logic_Arith, None),
(Std_Logic_Misc, Std_Logic_Misc_Body),
(Std_Logic_Signed, None),
(Std_Logic_TextIO, None),
(Std_Logic_Unsigned, None),
)
22 changes: 18 additions & 4 deletions pyVHDLModel/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@
__email__ = "Paebbels@gmail.com"
__copyright__ = "2016-2025, Patrick Lehmann"
__license__ = "Apache License, Version 2.0"
__version__ = "0.29.4"
__version__ = "0.30.0"


from enum import unique, Enum, Flag, auto
Expand Down Expand Up @@ -294,6 +294,13 @@ def __repr__(self) -> str:
return str(self.value)


@export
class IEEEFlavor(Enum):
IEEE = 0
Synopsys = 1
MentorGraphics = 2


@export
@unique
class ObjectClass(Enum):
Expand Down Expand Up @@ -574,19 +581,20 @@ def LoadStdLibrary(self) -> 'Library':

return library

def LoadIEEELibrary(self) -> 'Library':
def LoadIEEELibrary(self, flavor: IEEEFlavor = IEEEFlavor.IEEE) -> 'Library':
"""
Load the predefined VHDL library ``ieee`` into the design.
This will create a virtual source code file ``ieee.vhdl`` and register VHDL design units of library ``ieee`` to that file.
:returns: The library object of library ``ieee``.
:param flavor: Select the IEEE library flavor: IEEE, Synopsys, MentorGraphics.
:returns: The library object of library ``ieee``.
"""
from pyVHDLModel.IEEE import Ieee

doc = Document(Path("ieee.vhdl"), parent=self)

library = Ieee()
library = Ieee(flavor)
for designUnit in library.IterateDesignUnits():
doc._AddDesignUnit(designUnit)

Expand Down Expand Up @@ -1528,6 +1536,12 @@ def LinkComponents(self) -> None:
# QUESTION: Add link in dependency graph as dashed line from component to entity?
# Currently, component has no _dependencyVertex field

# FIXME: also link components in architectures (and nested structures like generate statements and block statements
# for architecture in self.IterateDesignUnits(DesignUnitKind.Architecture):
# library = architecture._parent
# for component in architecture._components.values():
# pass

def LinkInstantiations(self) -> None:
for architecture in self.IterateDesignUnits(DesignUnitKind.Architecture): # type: Architecture
for instance in architecture.IterateInstantiations():
Expand Down
Loading

0 comments on commit fade0c9

Please sign in to comment.