UVM_TestBench_For_S_R_Latch

Simple and Complete UVM TestBench For Verification Of S R Latch

Includes : -- Coverage Component -- scoreboard Component -- TB Architecture

TestBench Architecture :

Output Result :

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
LOG_FILE.log		LOG_FILE.log
README.md		README.md
S R TB ARCHITECTURE.png		S R TB ARCHITECTURE.png
coverage_data.html		coverage_data.html
design.sv		design.sv
interface.sv		interface.sv
run.do		run.do
sr_agent.sv		sr_agent.sv
sr_coverage.sv		sr_coverage.sv
sr_driver.sv		sr_driver.sv
sr_env.sv		sr_env.sv
sr_monitor.sv		sr_monitor.sv
sr_scoreboard.sv		sr_scoreboard.sv
sr_sequence.sv		sr_sequence.sv
sr_sequence_item.sv		sr_sequence_item.sv
sr_sequencer.sv		sr_sequencer.sv
sr_test.sv		sr_test.sv
tb_pkg.sv		tb_pkg.sv
testbench.sv		testbench.sv

Provide feedback