One Hardware Tool That Does It All
Design ANY hardware — PCBs, Integrated Circuits, Quantum Processors, MEMS/Sensors, RF/Photonics, and Advanced Packaging — in ONE unified environment.
Hardware Tool is a revolutionary, pure-Rust EDA suite that transcends traditional boundaries between hardware domains. Whether you're designing a simple PCB, a complex ASIC, a quantum processor, a MEMS accelerometer, an RF front-end, or a multi-die chiplet system — one tool handles it all with consistent workflows, shared engines, and seamless integration.
One Library System — Same browser, search, and versioning for symbols, cells, gates, structures, and dies.
One DRC Engine — Same rule engine, reporting, and exclusions across all domains.
One 3D Viewer — Same navigation, cross-section, and export for any hardware type.
One Simulation Framework — Same job manager, results viewer, and optimization for all solvers.
One Sync Engine — Same cross-probing and live preview between any abstract and physical views.
Core Technologies: Rust + Slint + Bevy 2D/3D + Multi-Physics Simulation
Output Formats: Gerber RS-274X, IPC-2581, ODB++, GDSII, OASIS, LEF/DEF, Touchstone
Hardware Tool treats all hardware types as first-class citizens. Each domain shares the same core architecture while providing specialized tools for domain-specific needs.
| Domain | Description | Industry-Standard Outputs |
|---|---|---|
| PCB | Printed circuit boards, from simple to HDI | Gerber RS-274X, Excellon, IPC-2581, ODB++ |
| IC | Digital ASIC, analog, mixed-signal ICs | GDSII, OASIS, LEF/DEF, Liberty (.lib) |
| Quantum | Superconducting, photonic, trapped ion qubits | GDSII, CIF, Qiskit Pulse, OpenQASM, LogosQ |
| MEMS | Accelerometers, gyroscopes, pressure sensors | GDSII, CIF, DXF, STEP |
| RF/Photonics | LNAs, filters, antennas, waveguides | Gerber, GDSII, Touchstone (SnP) |
| Packaging | Chiplets, 2.5D/3D, interposers, TSV | GDSII, ODB++, IPC-2581, APD |
These modules are shared across ALL hardware domains, providing consistent project management, design capture, and simulation infrastructure.
- Shared Project Architecture - Unified project format for any hardware type
- Project Structure & Management - PCB project specifics
- Unified Project File Format - .hwt format specification
- Data Model Specification - Schema, validation, versioning
- Circuit JSON as Intermediate Representation - Universal data model
- Netlist Formats - SPICE, Verilog, EDIF interchange
- Constraint Management - Timing, placement, routing constraints
- Programmatic / Code-First Design - Rust-native hardware description
- Shared Module Consolidation - Architecture inheritance patterns
- Shared Library Architecture - Unified library management for all domains
- Symbols & Libraries - PCB schematic symbols
- Hierarchical Design - Multi-level hierarchy for any hardware
- Wiring & Connectivity - Nets, buses, power distribution
- Annotation & Designators - Consistent naming conventions
- Component/Device Placement - Placement algorithms for all domains
- Interactive Routing - Push-and-shove, differential pairs
- Shared DRC Architecture - Unified design rule check engine
- Multi-Layer Support - Layer stack management
- Shared 3D Viewer Architecture - Unified visualization engine for all domains
- 3D PCB Viewer - PCB-specific visualization
- STEP & 3D Model Integration - Mechanical fit checks
- Shared Simulation Architecture - Unified simulation infrastructure
- Thermal Simulation - FEM-based heat analysis
- Signal & Power Integrity - S-parameters, PDN analysis
- Electromagnetic Simulation - EMC/EMI, field solvers
- SPICE Simulation - Circuit-level simulation
- Shared Real-Time Sync Architecture - Unified cross-probing and live preview
- Shared Export/Import Architecture - Unified export workflow for all formats
- Testing & Debug - DFT, JTAG, test points, debug probes
- Documentation Generation - Schematics PDF, BOM, fab notes
- Undo/Redo & Versioning - Command-based history
- Command-Line Interface - Batch processing, automation
- Calculator Tools - Domain-specific calculators
- Real-Time Collaboration - Multi-user editing
- Variant Manager - Design exploration
- Digital Twin & AR Debug - Live simulation overlay
- PDK & Process Integration - Foundry PDK support
- Plugin & Extension Architecture - Third-party plugins
- Manufacturing Integration - JLCPCB, PCBWay, foundries
- Cloud & Server Architecture - Desktop, team, cloud deployment
- Localization & i18n - Multi-language, unit systems
- API Keys Configuration - Multi-provider setup
- Native AI Design Assistant - First-party AI
- AI-Powered Optimization - Routing, placement
- Generative AI Design - Spec-to-design
- Hardware Domain Modes - Mode switching UI for each domain
- Main Window Layout - Adaptive interface
- Interaction Patterns - Magnet cursor, gestures
- Visual Style Guidelines - Consistent aesthetics
- Accessibility & Theming - Inclusive design
- Keyboard Shortcuts - Efficiency
- Onboarding - Getting started
Each hardware domain extends the unified platform with specialized workflows, libraries, verification rules, and manufacturing outputs.
Board-level electronic design from schematic to manufacturing.
| Category | Documentation |
|---|---|
| Workflow | Schematic Capture, PCB Layout |
| Libraries | Footprints & 3D Models |
| Layout | Auto-Routing, Copper Zones, Via Stitching |
| Verification | ERC, DRC, DFM |
| Output | Gerber, IPC-2581, ODB++, BOM |
Transistor-level design for digital ASIC, analog, and mixed-signal ICs.
| Category | Documentation |
|---|---|
| Module Index | IC Design Module |
| Overview | IC Design Overview |
| Project | IC Project Structure |
| Libraries | Cells & Libraries |
| Verification | Physical Verification (DRC/LVS) |
| Output | GDSII Export |
| Analysis | Timing & Power Calculators |
Superconducting qubits, photonic circuits, trapped ions, and control systems.
| Category | Documentation |
|---|---|
| Module Index | Quantum Design Module |
| Overview | Quantum Circuit Design |
| Project | Quantum Project Structure |
| Layout | Qubit Placement |
| 3D/Cryo | 3D Qubit Viewer, Cryogenic Integration |
| Output | GDSII Quantum, Qiskit Pulse |
| Analysis | Decoherence & Fidelity |
Accelerometers, gyroscopes, pressure sensors, and micro-actuators.
| Category | Documentation |
|---|---|
| Module Index | MEMS Design Module |
| Overview | MEMS Sensor Design |
| Project | MEMS Project Structure |
| Verification | MEMS Design Rule Check |
| Analysis | Resonance & Sensitivity |
LNAs, PAs, filters, antennas, waveguides, and photonic integrated circuits.
| Category | Documentation |
|---|---|
| Module Index | RF Design Module |
| Overview | RF/Microwave Design |
| Project | RF Project Structure |
| Schematic | RF Components, Impedance Matching |
| Layout | Microstrip & CPW Routing |
| Output | RF Gerber, S-Parameters |
| Analysis | Insertion Loss & VSWR |
2.5D/3D integration, interposers, TSV, UCIe, and heterogeneous systems.
| Category | Documentation |
|---|---|
| Module Index | Chiplet Design Module |
| Overview | Chiplet Integration |
| Project | Chiplet Project Structure |
| Die Editor | Die IP & Libraries, TSV & Microbump |
| Layout | RDL & Interposer Routing |
| 3D/Thermal | 3D Package Viewer, Thermal-Mechanical |
| Output | ODB++ Packaging, Assembly Data |
| Analysis | Power Integrity |
- Performance Targets - Response times, memory usage, benchmarks
- Roadmap & Priorities - Development phases, milestones
- Comparison with KiCAD and TSCircuit - Feature matrix, philosophy
# Install Hardware Tool
cargo install hardware-tool
# Create new project (specify hardware type)
hwt new my_pcb --type pcb
hwt new my_asic --type ic
hwt new my_quantum --type quantum
hwt new my_mems --type mems
hwt new my_rf --type rf
hwt new my_chiplet --type packaging
# Open GUI
hwt open my_project.hwt
# Export (format auto-detected by hardware type)
hwt export my_board.hwt # → Gerber for PCB
hwt export my_chip.hwt_ic # → GDSII for IC
hwt export my_processor.hwt_q # → GDSII + Qiskit for Quantum
# AI-assisted design (works across all domains)
hwt ai optimize --target performance| Component | Technology | Used By |
|---|---|---|
| Language | Rust | All domains |
| UI Framework | Slint | All domains |
| 3D Rendering | Bevy | All domains |
| Circuit Simulation | ngspice, custom | PCB, IC, RF |
| EM Simulation | FDTD, BEM | RF, Quantum, IC |
| FEA Simulation | Custom FEM | MEMS, Packaging, Thermal |
| AI Integration | OpenAI, Anthropic, Ollama | All domains |
- Unified Experience — Same interface patterns across all hardware domains
- Fluid Canvas-First — One continuous, zoomable, pannable workspace
- Context-Aware Interface — UI adapts to current hardware type and task
- Dual-Paradigm Mastery — GUI and code-first workflows, deeply synchronized
- Performance as a Feature — Instant response even on very large designs
- Accessibility by Default — Dark/light, high-contrast, color-blind friendly
[License information here]