Merge pull request #122 from YuzukiHD/dev

[driver] using union to handle reg, [board] fix 100ask ros extlinux boot

board/100ask-ros/extlinux_boot/extlinux/extlinux.conf

@@ -2,4 +2,4 @@ label Ubuntu-22.04
     kernel /Image
     initrd /initrd.img
     fdt /sunxi.dtb
-    append earlycon=uart8250,mmio32,0x02500000 clk_ignore_unused initcall_debug=0 console=ttyAS0,115200 loglevel=8 root=/dev/mmcblk0p2 rootwait init=/init rdinit=/rdinit partitions=boot@mmcblk0p1:rootfs@mmcblk0p2:boot-resource@mmcblk0p3:env@mmcblk0p4:env-redund@mmcblk0p5:boottone@mmcblk0p6:rootfs_data@mmcblk0p7:private@mmcblk0p8:UDISK@mmcblk0p9 cma=64M snum=81275688b1c2489200e mac_addr= wifi_mac= bt_mac= selinux=0 specialstr= gpt=1 androidboot.mode=normal boot_type=2 gpt=1 uboot_message=2018 mbr_offset=1032192 bootreason=unknow
+    append earlycon=uart8250,mmio32,0x05000000 clk_ignore_unused initcall_debug=0 console=ttyAS0,115200 loglevel=8 root=/dev/mmcblk0p2 rootwait init=/init rdinit=/rdinit 

board/100ask-ros/extlinux_boot/main.c

@@ -61,7 +61,8 @@ extern int ar100s_gpu_fix(void);
 
 typedef struct atf_head {
     uint32_t jump_instruction; /* jumping to real code */
-    uint8_t magic[8];          /* magic */
+    uint8_t magic[8];          /* ="u-boot" */
+    uint32_t scp_base;         /* scp openrisc core bin */
     uint32_t next_boot_base;   /* next boot base for uboot */
     uint32_t nos_base;         /* ARM SVC RUNOS base */
     uint32_t secureos_base;    /* optee base */
@@ -156,7 +157,7 @@ static int fatfs_loadimage_size(char *filename, BYTE *dest, uint32_t *file_size)
     fret = f_close(&file);
 
     printk_info("FATFS: read in %ums at %.2fMB/S\n", time,
-           (f32) (total_read / time) / 1024.0f);
+                (f32) (total_read / time) / 1024.0f);
 
 open_fail:
     return ret;
@@ -177,8 +178,8 @@ static int load_sdcard(image_info_t *image) {
     sdmmc_blk_read(&card0, (uint8_t *) (SDRAM_BASE), 0, CONFIG_SDMMC_SPEED_TEST_SIZE);
     test_time = time_ms() - start;
     printk_debug("SDMMC: speedtest %uKB in %ums at %uKB/S\n",
-           (CONFIG_SDMMC_SPEED_TEST_SIZE * 512) / 1024, test_time,
-           (CONFIG_SDMMC_SPEED_TEST_SIZE * 512) / test_time);
+                 (CONFIG_SDMMC_SPEED_TEST_SIZE * 512) / 1024, test_time,
+                 (CONFIG_SDMMC_SPEED_TEST_SIZE * 512) / test_time);
 
     start = time_ms();
 
@@ -507,7 +508,7 @@ static int load_extlinux(image_info_t *image, uint64_t dram_size) {
     /* Append bootargs */
     strcat(bootargs, data.append);
 
-    printk_info("Kernel cmdline = [%s]\n", bootargs);
+    printk_debug("Kernel cmdline = [%s]\n", bootargs);
 
     /* Append bootargs mac address */
     uint32_t chip_sid[4];
@@ -520,10 +521,6 @@ static int load_extlinux(image_info_t *image, uint64_t dram_size) {
     char *mac0_address = get_mac_address_from_sid(chip_sid, mac_address_str);
     strcat(bootargs, " mac0_addr=");
     strcat(bootargs, mac0_address);
-    chip_sid[2]++;
-    char *mac1_address = get_mac_address_from_sid(chip_sid, mac_address_str);
-    strcat(bootargs, " mac1_addr=");
-    strcat(bootargs, mac1_address);
 
 _add_dts_size:
     /* Modify bootargs string */
@@ -596,7 +593,7 @@ static int abortboot_single_key(int bootdelay) {
 
 int main(void) {
     sunxi_serial_init(&uart_dbg);
-    
+
     ar100s_gpu_fix();
 
     show_banner();
@@ -609,10 +606,13 @@ int main(void) {
 
     pmu_axp2202_init(&i2c_pmu);
 
+    pmu_axp2202_set_vol(&i2c_pmu, "dcdc1", 1100, 1);
+    pmu_axp2202_set_vol(&i2c_pmu, "dcdc3", 1100, 1);
+
     pmu_axp2202_dump(&i2c_pmu);
 
     /* Initialize the DRAM and enable memory management unit (MMU). */
-    uint64_t dram_size = sunxi_dram_init(NULL);
+    uint64_t dram_size = sunxi_dram_init(&dram_para);
 
     arm32_mmu_enable(SDRAM_BASE, dram_size);
 
@@ -667,9 +667,6 @@ int main(void) {
     atf_head->dtb_base = (uint32_t) image.of_dest;
     atf_head->nos_base = (uint32_t) image.kernel_dest;
 
-    /* Fill platform magic */
-    memcpy(atf_head->platform, CONFIG_PLATFORM_MAGIC, 8);
-
     printk_info("ATF: Kernel addr: 0x%08x\n", atf_head->nos_base);
     printk_info("ATF: Kernel DTB addr: 0x%08x\n", atf_head->dtb_base);
 

board/100ask-ros/syter_boot/main.c

@@ -36,7 +36,7 @@
 #define CONFIG_BL31_FILENAME "bl31.bin"
 #define CONFIG_BL31_LOAD_ADDR (0x48000000)
 
-#define CONFIG_DTB_FILENAME "sunxi.dtb"
+#define CONFIG_DTB_FILENAME "sun50i-r818-mg-core.dtb"
 #define CONFIG_DTB_LOAD_ADDR (0x41f00000)
 
 #define CONFIG_KERNEL_FILENAME "Image"
@@ -70,7 +70,7 @@ typedef struct atf_head {
     uint64_t dtb_base;         /* the address of dtb */
 } atf_head_t;
 
-#define FILENAME_MAX_LEN 16
+#define FILENAME_MAX_LEN 32
 typedef struct {
     uint8_t *bl31_dest;
     char bl31_filename[FILENAME_MAX_LEN];

board/avaota-a1/board.c

@@ -289,6 +289,9 @@ void show_chip() {
         case 0x5500:
             printk_info("Chip type = MR527M02X0D00");
             break;
+        case 0xff10:
+            printk_info("Chip type = A527M000000H");
+            break;
         default:
             printk_info("Chip type = UNKNOW");
             break;

cmake/board/100ask-ros.cmake

@@ -5,11 +5,12 @@ set(CONFIG_ARCH_ARM32_ARM64 True)
 set(CONFIG_CHIP_SUN50IW10 True)
 set(CONFIG_CHIP_WITHPMU True)
 set(CONFIG_CHIP_GPIO_V1 True)
-set(CONFIG_CHIP_MINSTACK True)
+set(CONFIG_CHIP_MINSTACK False)
 
 set(CONFIG_BOARD_100ASK_ROS True)
 
-add_definitions(-DCONFIG_CHIP_SUN50IW10 -DCONFIG_CHIP_GPIO_V1)
+add_definitions(-DCONFIG_CHIP_GPIO_V1)
+add_definitions(-DCONFIG_CHIP_SUN50IW10)
 
 set(CONFIG_USE_DRAM_PAYLOAD True)
 set(CONFIG_USE_PREBUILT_DRAM_PAYLOAD True)

include/drivers/sys-uart.h

@@ -49,24 +49,32 @@ typedef enum {
     UART_DLEN_8,
 } sunxi_serial_dlen_t;
 
-/* Define a structure sunxi_serial_reg_t for accessing serial registers */
+/*
+ * Define a structure sunxi_serial_reg_t for accessing serial registers.
+ * This structure provides a convenient way to access various registers
+ * associated with a serial interface.
+ */
 typedef struct {
-    volatile uint32_t rbr; /* Receiver Buffer Register (offset 0) */
-    volatile uint32_t ier; /* Interrupt Enable Register (offset 1) */
-    volatile uint32_t fcr; /* FIFO Control Register (offset 2) */
+    union {
+        volatile uint32_t rbr; /* Receiver Buffer Register (offset 0) */
+        volatile uint32_t thr; /* Transmitter Holding Register (offset 0) */
+        volatile uint32_t dll; /* Divisor Latch LSB (offset 0) */
+    };
+    union {
+        volatile uint32_t ier; /* Interrupt Enable Register (offset 1) */
+        volatile uint32_t dlh; /* Divisor Latch MSB (offset 1) */
+    };
+    union {
+        volatile uint32_t fcr; /* FIFO Control Register (offset 2) */
+        volatile uint32_t iir; /* Interrupt Identification Register (offset 2) */
+    };
     volatile uint32_t lcr; /* Line Control Register (offset 3) */
     volatile uint32_t mcr; /* Modem Control Register (offset 4) */
     volatile uint32_t lsr; /* Line Status Register (offset 5) */
     volatile uint32_t msr; /* Modem Status Register (offset 6) */
     volatile uint32_t sch; /* Scratch Register (offset 7) */
 } sunxi_serial_reg_t;
 
-/* Define macros for register aliasing */
-#define thr rbr
-#define dll rbr
-#define dlh ier
-#define iir fcr
-
 /* Define a structure sunxi_serial_t for serial configuration */
 typedef struct {
     uint32_t base;                     /* Base address of the serial device */