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[board] test for syterboot boot up bl31
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@YuzukiTsuru
YuzukiTsuru committed Feb 2, 2024
1 parent f72cb65 commit 2605f32
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Showing 12 changed files with 311 additions and 186 deletions.
1 change: 0 additions & 1 deletion board/lt527x/CMakeLists.txt
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Expand Up @@ -2,7 +2,6 @@ set(APP_COMMON_SOURCE
${CMAKE_CURRENT_SOURCE_DIR}/start.S
${CMAKE_CURRENT_SOURCE_DIR}/board.c
${CMAKE_CURRENT_SOURCE_DIR}/eabi_compat.c
${CMAKE_CURRENT_SOURCE_DIR}/payloads/init_dram_bin.c
)

add_subdirectory(hello_world)
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72 changes: 72 additions & 0 deletions board/lt527x/board.c
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Expand Up @@ -122,4 +122,76 @@ void set_rpio_power_mode(void) {
} else {
printk(LOG_LEVEL_DEBUG, "PL gpio voltage : 3.3V \n");
}
}

int sunxi_nsi_init(void) {
/* IOMMU prio 3 */
writel(0x1, 0x02021418);
writel(0xf, 0x02021414);
/* DE prio 2 */
writel(0x1, 0x02021a18);
writel(0xa, 0x02021a14);
/* VE R prio 2 */
writel(0x1, 0x02021618);
writel(0xa, 0x02021614);
/* VE RW prio 2 */
writel(0x1, 0x02021818);
writel(0xa, 0x02021814);
/* ISP prio 2 */
writel(0x1, 0x02020c18);
writel(0xa, 0x02020c14);
/* CSI prio 2 */
writel(0x1, 0x02021c18);
writel(0xa, 0x02021c14);
/* NPU prio 2 */
writel(0x1, 0x02020a18);
writel(0xa, 0x02020a14);

/* close ra0 autogating */
writel(0x0, 0x02023c00);
/* close ta autogating */
writel(0x0, 0x02023e00);
/* close pcie autogating */
writel(0x0, 0x02020600);
return 0;
}

void enable_sram_a3() {
uint32_t reg_val;

/* De-assert PUBSRAM Clock and Gating */
reg_val = readl(RISCV_PUBSRAM_CFG_REG);
reg_val |= RISCV_PUBSRAM_RST;
reg_val |= RISCV_PUBSRAM_GATING;
writel(reg_val, RISCV_PUBSRAM_CFG_REG);

/* assert */
writel(0, RISCV_CFG_BGR_REG);
}

void show_chip() {
uint32_t chip_sid[4];
chip_sid[0] = read32(SUNXI_SID_SRAM_BASE + 0x0);
chip_sid[1] = read32(SUNXI_SID_SRAM_BASE + 0x4);
chip_sid[2] = read32(SUNXI_SID_SRAM_BASE + 0x8);
chip_sid[3] = read32(SUNXI_SID_SRAM_BASE + 0xc);

printk(LOG_LEVEL_INFO, "Chip SID = %08x%08x%08x%08x\n", chip_sid[0], chip_sid[1], chip_sid[2], chip_sid[3]);

uint32_t chip_markid_sid = chip_sid[0] & 0xffff;

switch (chip_markid_sid) {
case 0x5f30:
printk(LOG_LEVEL_INFO, "Chip type = T527M00X0DCH");
break;
case 0x5500:
printk(LOG_LEVEL_INFO, "Chip type = MR527M02X0D00");
break;
default:
printk(LOG_LEVEL_INFO, "Chip type = UNKNOW");
break;
}

uint32_t version = read32(SUNXI_SYSCTRL_BASE + 0x24) & 0x7;
printk(LOG_LEVEL_MUTE, "\tChip Version = %x \n", version);
}
1 change: 1 addition & 0 deletions board/lt527x/init_dram/CMakeLists.txt
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Expand Up @@ -2,4 +2,5 @@

add_syterkit_app(init_dram
main.c
${CMAKE_CURRENT_SOURCE_DIR}/../payloads/init_dram_bin.c
)
90 changes: 46 additions & 44 deletions board/lt527x/start.S
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Expand Up @@ -2,53 +2,55 @@

#include <linkage.h>

// Macro to save register values onto the stack
.macro save_regs
str lr, [sp, #-4]
mrs lr, spsr_all
str lr, [sp, #-8]
str r1, [sp, #-12]
str r0, [sp, #-16]
mov r0, sp
cps #0x13
ldr r1, [r0, #-4]
str r1, [sp, #-4]!
ldr r1, [r0, #-8]
str r1, [sp, #-(4 * 16)]
ldr r1, [r0, #-12]
ldr r0, [r0, #-16]
stmdb sp, {r0 - r14}^
sub sp, sp, #(4 * 16)
ldr r4, [sp]
and r0, r4, #0x1f
cmp r0, #0x10
beq 10f
cmp r0, #0x13
beq 11f
b .
11: add r1, sp, #(4 * 17)
str r1, [sp, #(4 * 14)]
str lr, [sp, #(4 * 15)]
10: add r1, sp, #(4 * 17)
str r1, [sp, #-4]!
mov r0, sp
str lr, [sp, #-4] // Save value of lr register onto the stack
mrs lr, spsr_all // Save value of spsr_all register onto lr register
str lr, [sp, #-8] // Save value of lr register onto the stack
str r1, [sp, #-12] // Save value of r1 register onto the stack
str r0, [sp, #-16] // Save value of r0 register onto the stack
mov r0, sp // Copy value of sp register to r0 register
cps #0x13 // Switch to SVC mode
ldr r1, [r0, #-4] // Load value of r1 register from stack to r1 register
str r1, [sp, #-4]! // Save value of r1 register onto the stack and update stack pointer
ldr r1, [r0, #-8] // Load value of r1 register from stack to r1 register
str r1, [sp, #-(4 * 16)] // Save value of r1 register onto the stack
ldr r1, [r0, #-12] // Load value of r1 register from stack to r1 register
ldr r0, [r0, #-16] // Load value of r0 register from stack to r0 register
stmdb sp, {r0 - r14}^ // Save values of registers r0-r14 onto the stack
sub sp, sp, #(4 * 16) // Update stack pointer
ldr r4, [sp] // Load value of r4 register from stack to r4 register
and r0, r4, #0x1f // Copy the lower 5 bits of r4 register to r0 register
cmp r0, #0x10 // Compare value of r0 register with 0x10
beq 10f // If equal, jump to label 10
cmp r0, #0x13 // Compare value of r0 register with 0x13
beq 11f // If equal, jump to label 11
b . // Jump to current location
11: add r1, sp, #(4 * 17) // Add (4 * 17) to sp register and copy result to r1 register
str r1, [sp, #(4 * 14)] // Save value of r1 register onto the stack
str lr, [sp, #(4 * 15)] // Save value of lr register onto the stack
10: add r1, sp, #(4 * 17) // Add (4 * 17) to sp register and copy result to r1 register
str r1, [sp, #-4]! // Save value of r1 register onto the stack and update stack pointer
mov r0, sp // Copy value of sp register to r0 register
.endm

// Macro to restore register values from the stack
.macro restore_regs
mov r12, sp
ldr sp, [r12], #4
ldr r1, [r12], #4
msr spsr_cxsf, r1
and r0, r1, #0x1f
cmp r0, #0x10
beq 20f
cmp r0, #0x13
beq 21f
b .
20: ldr lr, [r12, #(4 * 15)]
ldmia r12, {r0 - r14}^
movs pc, lr
21: ldm r12, {r0 - r15}^
mov r0, r0
mov r12, sp // Copy value of sp register to r12 register
ldr sp, [r12], #4 // Load value from memory pointed by r12 register to sp register and update r12 register
ldr r1, [r12], #4 // Load value from memory pointed by r12 register to r1 register and update r12 register
msr spsr_cxsf, r1 // Write value of r1 register to spsr_cxsf register
and r0, r1, #0x1f // Copy the lower 5 bits of r1 register to r0 register
cmp r0, #0x10 // Compare value of r0 register with 0x10
beq 20f // If equal, jump to label 20
cmp r0, #0x13 // Compare value of r0 register with 0x13
beq 21f // If equal, jump to label 21
b . // Jump to current location
20: ldr lr, [r12, #(4 * 15)] // Load value from memory pointed by r12 register to lr register
ldmia r12, {r0 - r14}^ // Load values of registers r0-r14 from memory pointed by r12 register and update r12 register
movs pc, lr // Set value of PC register to value of lr register
21: ldm r12, {r0 - r15}^ // Load values of registers r0-r15 from memory pointed by r12 register
mov r0, r0 // Copy value of r0 register to r0 register
.endm

#define ARMV7_USR_MODE 0x10
Expand Down Expand Up @@ -76,7 +78,7 @@ _start:
.long 0x30 /* boot header size */
.long 0x30303033 /* boot header version */
.long 0x00020000 /* return value */
.long 0x00028000 /* run address */
.long 0x00020000 /* run address */
.long 0x0 /* eGON version */
.byte 0x00, 0x00, 0x00, 0x00 /* platform information - 8byte */
.byte 0x34, 0x2e, 0x30, 0x00
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Binary file added board/lt527x/syter_boot/bl31/bl31.bin
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