[board] add MYIR LT527X

board/CMakeLists.txt

@@ -32,4 +32,8 @@ endif()
 
 if(CONFIG_BOARD_DONGSHANPI_AICT)
     add_subdirectory(dongshanpi-aict)
+endif()
+
+if(CONFIG_BOARD_LT527X)
+    add_subdirectory(lt527x)
 endif()

board/lt527x/CMakeLists.txt

@@ -0,0 +1,14 @@
+set(APP_COMMON_SOURCE 
+    ${CMAKE_CURRENT_SOURCE_DIR}/start.S 
+    ${CMAKE_CURRENT_SOURCE_DIR}/board.c
+    ${CMAKE_CURRENT_SOURCE_DIR}/eabi_compat.c
+    ${CMAKE_CURRENT_SOURCE_DIR}/payloads/init_dram_bin.c
+)
+
+add_subdirectory(hello_world)
+
+add_subdirectory(init_dram)
+
+add_subdirectory(syter_boot)
+
+add_subdirectory(smhc_test)

board/lt527x/README.md

@@ -0,0 +1,29 @@
+# SyterKit Common 
+
+## start.S
+
+This code snippet is an ARM assembly language program that includes initialization settings and exception handlers. Here's a breakdown of its functionalities:
+
+1. Initialization Settings: It sets registers and writes specific values to configure the processor's working mode, interrupt enable, etc.
+
+2. Set Vector Table: It writes the address of the vector table to the Vector Base Address Register, which is used for handling exceptions and interrupts.
+
+3. Enable NEON/VFP Unit: It configures the processor to enable the NEON (Advanced SIMD) and VFP (Floating-Point) units.
+
+4. Clear BSS Section: It zeroes out variables in the BSS section.
+
+5. Disable Interrupts: It disables FIQ and IRQ interrupts and switches the processor to SVC32 mode.
+
+6. Set Timer Frequency: It sets the timer frequency to 24M.
+
+7. Call the main Function: It jumps to the main function to execute the main logic.
+
+## eabi_compat.c
+
+This code snippet appears to be providing implementations for the functions `abort`, `raise`, and `__aeabi_unwind_cpp_pr0`. Here's a breakdown of their functionalities:
+
+1. `void abort(void)`: This function creates an infinite loop, causing the program to hang indefinitely. It is typically used to indicate a critical error or unrecoverable condition in a program.
+
+2. `int raise(int signum)`: This function is a placeholder and always returns 0. In standard C, this function is used to raise a signal and initiate the corresponding signal handler. However, in this implementation, it does nothing and simply returns 0.
+
+3. `void __aeabi_unwind_cpp_pr0(void)`: This is a dummy function that serves as a placeholder to avoid linker complaints. Its purpose is to satisfy the linker when using C++ exceptions and unwinding, but it does not contain any actual functionality.

board/lt527x/board.c

@@ -0,0 +1,125 @@
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <types.h>
+
+#include <log.h>
+
+#include <common.h>
+
+#include <reg-ncat.h>
+#include <sys-clk.h>
+
+#include <mmu.h>
+
+#include <sys-dram.h>
+#include <sys-gpio.h>
+#include <sys-i2c.h>
+#include <sys-sdcard.h>
+#include <sys-sid.h>
+#include <sys-spi.h>
+#include <sys-uart.h>
+
+sunxi_serial_t uart_dbg = {
+        .base = SUNXI_UART0_BASE,
+        .id = 0,
+        .gpio_tx = {GPIO_PIN(GPIO_PORTB, 9), GPIO_PERIPH_MUX2},
+        .gpio_rx = {GPIO_PIN(GPIO_PORTB, 10), GPIO_PERIPH_MUX2},
+};
+
+sunxi_spi_t sunxi_spi0 = {
+        .base = SUNXI_SPI0_BASE,
+        .id = 0,
+        .clk_rate = 75 * 1000 * 1000,
+        .gpio_cs = {GPIO_PIN(GPIO_PORTC, 1), GPIO_PERIPH_MUX4},
+        .gpio_sck = {GPIO_PIN(GPIO_PORTC, 0), GPIO_PERIPH_MUX4},
+        .gpio_mosi = {GPIO_PIN(GPIO_PORTC, 2), GPIO_PERIPH_MUX4},
+        .gpio_miso = {GPIO_PIN(GPIO_PORTC, 3), GPIO_PERIPH_MUX4},
+        .gpio_wp = {GPIO_PIN(GPIO_PORTC, 4), GPIO_PERIPH_MUX4},
+        .gpio_hold = {GPIO_PIN(GPIO_PORTC, 5), GPIO_PERIPH_MUX4},
+};
+
+sdhci_t sdhci0 = {
+        .name = "sdhci0",
+        .reg = (sdhci_reg_t *) SUNXI_SMHC0_BASE,
+        .voltage = MMC_VDD_27_36,
+        .width = MMC_BUS_WIDTH_4,
+        .clock = MMC_CLK_50M,
+        .removable = 0,
+        .isspi = FALSE,
+        .gpio_clk = {GPIO_PIN(GPIO_PORTF, 2), GPIO_PERIPH_MUX2},
+        .gpio_cmd = {GPIO_PIN(GPIO_PORTF, 3), GPIO_PERIPH_MUX2},
+        .gpio_d0 = {GPIO_PIN(GPIO_PORTF, 1), GPIO_PERIPH_MUX2},
+        .gpio_d1 = {GPIO_PIN(GPIO_PORTF, 0), GPIO_PERIPH_MUX2},
+        .gpio_d2 = {GPIO_PIN(GPIO_PORTF, 5), GPIO_PERIPH_MUX2},
+        .gpio_d3 = {GPIO_PIN(GPIO_PORTF, 4), GPIO_PERIPH_MUX2},
+};
+
+sunxi_i2c_t i2c_pmu = {
+        .base = SUNXI_R_TWI0_BASE,
+        .id = SUNXI_R_I2C0,
+        .speed = 4000000,
+        .gpio_scl = {GPIO_PIN(GPIO_PORTL, 0), GPIO_PERIPH_MUX2},
+        .gpio_sda = {GPIO_PIN(GPIO_PORTL, 1), GPIO_PERIPH_MUX2},
+};
+
+void neon_enable(void) {
+    /* set NSACR, both Secure and Non-secure access are allowed to NEON */
+    asm volatile("MRC p15, 0, r0, c1, c1, 2");
+    asm volatile("ORR r0, r0, #(0x3<<10) @ enable fpu/neon");
+    asm volatile("MCR p15, 0, r0, c1, c1, 2");
+    /* Set the CPACR for access to CP10 and CP11*/
+    asm volatile("LDR r0, =0xF00000");
+    asm volatile("MCR p15, 0, r0, c1, c0, 2");
+    /* Set the FPEXC EN bit to enable the FPU */
+    asm volatile("MOV r3, #0x40000000");
+    /*@VMSR FPEXC, r3*/
+    asm volatile("MCR p10, 7, r3, c8, c0, 0");
+}
+
+void clean_syterkit_data(void) {
+    /* Disable MMU, data cache, instruction cache, interrupts */
+    arm32_mmu_disable();
+    printk(LOG_LEVEL_INFO, "disable mmu ok...\n");
+    arm32_dcache_disable();
+    printk(LOG_LEVEL_INFO, "disable dcache ok...\n");
+    arm32_icache_disable();
+    printk(LOG_LEVEL_INFO, "disable icache ok...\n");
+    arm32_interrupt_disable();
+    printk(LOG_LEVEL_INFO, "free interrupt ok...\n");
+}
+
+void rtc_set_vccio_det_spare(void) {
+    uint32_t val = 0;
+
+    /* set detection threshold to 2.9V */
+    val = readl(SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+    val &= ~(VCCIO_THRESHOLD_MASK << 4);
+    val |= (VCCIO_THRESHOLD_VOLTAGE_2_9);
+    writel(val, SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+
+    /* enable vccio debonce */
+    val = readl(SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+    val |= DEBOUNCE_NO_BYPASS;
+    writel(val, SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+
+    /* enable vccio detecter output */
+    val = readl(SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+    val |= FORCE_DETECTER_OUTPUT;
+    writel(val, SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+
+    /* enbale vccio detect */
+    val = readl(SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+    val &= ~VCCIO_DET_BYPASS_EN;
+    writel(val, SUNXI_RTC_BASE + VDD_OFF_GATING_CTRL_REG);
+}
+
+void set_rpio_power_mode(void) {
+    uint32_t reg_val = read32(SUNXI_R_GPIO_BASE + 0x348);
+    if (reg_val & 0x1) {
+        printk(LOG_LEVEL_DEBUG, "PL gpio voltage : 1.8V \n");
+        write32(SUNXI_R_GPIO_BASE + 0x340, 0x1);
+    } else {
+        printk(LOG_LEVEL_DEBUG, "PL gpio voltage : 3.3V \n");
+    }
+}

board/lt527x/eabi_compat.c

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+void abort(void) {
+    while (1)
+        ;
+}
+
+int raise(int signum) {
+    return 0;
+}
+
+/* Dummy function to avoid linker complaints */
+void __aeabi_unwind_cpp_pr0(void) {
+}

board/lt527x/hello_world/CMakeLists.txt

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: Apache-2.0
+
+add_syterkit_app(helloworld 
+    main.c
+)

board/lt527x/hello_world/main.c

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <types.h>
+
+#include <log.h>
+
+#include <common.h>
+
+#include <sys-dram.h>
+
+extern sunxi_serial_t uart_dbg;
+
+int main(void) {
+    sunxi_serial_init(&uart_dbg);
+
+    show_banner();
+
+    sunxi_clk_init();
+
+    sunxi_clk_dump();
+
+    printk(LOG_LEVEL_INFO, "Hello World!\n");
+
+    abort();
+
+    return 0;
+}

board/lt527x/init_dram/CMakeLists.txt

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: Apache-2.0
+
+add_syterkit_app(init_dram 
+    main.c
+)

board/lt527x/init_dram/main.c

@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <time.h>
+#include <types.h>
+
+#include <log.h>
+
+#include <common.h>
+
+#include <pmu/axp.h>
+#include <sys-dram.h>
+#include <sys-i2c.h>
+
+extern sunxi_serial_t uart_dbg;
+
+extern sunxi_i2c_t i2c_pmu;
+
+extern void set_rpio_power_mode(void);
+extern void rtc_set_vccio_det_spare(void);
+
+int main(void) {
+    sunxi_serial_init(&uart_dbg);
+
+    show_banner();
+
+    sunxi_clk_init();
+
+    sunxi_clk_dump();
+
+    rtc_set_vccio_det_spare();
+
+    set_rpio_power_mode();
+
+    sunxi_i2c_init(&i2c_pmu);
+
+    pmu_axp1530_init(&i2c_pmu);
+
+    pmu_axp2202_init(&i2c_pmu);
+
+    mdelay(30); /* Delay 300ms for pmu bootup */
+
+    pmu_axp1530_dump(&i2c_pmu);
+
+    pmu_axp2202_dump(&i2c_pmu);
+
+    printk(LOG_LEVEL_INFO, "DRAM: DRAM Size = %dMB\n", sunxi_dram_init(NULL));
+
+    sunxi_clk_dump();
+
+    int i = 0;
+
+    while (1) {
+        i++;
+        printk(LOG_LEVEL_INFO, "Count: %d\n", i);
+        mdelay(1000);
+    }
+
+    abort();
+
+    return 0;
+}