longanpi-3h support init dram

YuzukiHD · Dec 28, 2023 · c9aa10f · c9aa10f
1 parent beb7a5c
commit c9aa10f
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Showing 11 changed files with 242 additions and 205 deletions.
diff --git a/board/longanpi-3h/init_dram/main.c b/board/longanpi-3h/init_dram/main.c
@@ -3,8 +3,8 @@
 #include <stdbool.h>
 #include <stddef.h>
 #include <stdint.h>
-#include <types.h>
 #include <time.h>
+#include <types.h>
 
 #include <log.h>
 
@@ -54,7 +54,7 @@ int main(void) {
 
     pmu_axp1530_dump(&i2c_pmu);
 
-    sunxi_dram_init(NULL);
+    printk(LOG_LEVEL_INFO, "DRAM: DRAM Size = %dMB\n", sunxi_dram_init());
 
     sunxi_clk_dump();
 

diff --git a/board/longanpi-3h/payloads/init_dram_bin.c b/board/longanpi-3h/payloads/init_dram_bin.c
diff --git a/board/longanpi-3h/start.S b/board/longanpi-3h/start.S
@@ -24,22 +24,17 @@ reset:
 	.byte 'e', 'G', 'O', 'N', '.', 'B', 'T', '0'
 	.long 0x12345678                                /* checksum */
 	.long __spl_size                                /* spl size */
-	.long 0x30                                      /* boot header size */
+	.long 0x30                                              /* boot header size */
 	.long 0x30303033                                /* boot header version */
 	.long 0x00020000                                /* return value */
 	.long 0x00028000                                /* run address */
-	.long 0x0                                       /* eGON version */
-	.byte 0x00, 0x00, 0x00, 0x00    				/* platform information - 8byte */
+	.long 0x0                                               /* eGON version */
+	.byte 0x00, 0x00, 0x00, 0x00    /* platform information - 8byte */
 	.byte 0x34, 0x2e, 0x30, 0x00
 
-	/* Invalidate L1 I/D */
-	mov	r0, #0			        /* set up for MCR */
-	mcr	p15, 0, r0, c8, c7,  0	/* invalidate TLBs */
-	mcr	p15, 0, r0, c7, c5,  0	/* invalidate icache */
-	mcr	p15, 0, r0, c7, c5,  6	/* invalidate BP array */
-	DSB	/* DSB */
-	ISB	/* ISB */
-
+	/*
+	* The actual reset code
+	*/
 	mrs r0, cpsr
 	bic r0, r0, #ARMV7_MODE_MASK
 	orr r0, r0, #ARMV7_SVC_MODE
@@ -48,6 +43,7 @@ reset:
 	msr cpsr_c, r0
 
 	/* Set vector base address register */
+
 	ldr r0, =_vector
 	mcr p15, 0, r0, c12, c0, 0
 	mrc p15, 0, r0, c1, c0, 0

diff --git a/cmake/board/longanpi-3h.cmake b/cmake/board/longanpi-3h.cmake
@@ -4,9 +4,10 @@ set(CONFIG_ARCH_ARM32 True)
 set(CONFIG_ARCH_ARM32_ARM64 True)
 set(CONFIG_CHIP_SUN50IW9 True)
 set(CONFIG_CHIP_WITHPMU True)
+set(CONFIG_CHIP_GPIO_V1 True)
 set(CONFIG_BOARD_LONGANPI-3H True)
 
-add_definitions(-DCONFIG_CHIP_SUN50IW9)
+add_definitions(-DCONFIG_CHIP_SUN50IW9 -DCONFIG_CHIP_GPIO_V1)
 
 set(CONFIG_USE_DRAM_PAYLOAD True)
 set(CONFIG_USE_PREBUILT_DRAM_PAYLOAD false)

diff --git a/include/drivers/sun50iw9/sys-dram.h b/include/drivers/sun50iw9/sys-dram.h
@@ -12,6 +12,6 @@
 
 #define SDRAM_BASE (0x40000000)
 
-uint64_t sunxi_dram_init(void *para);
+uint64_t sunxi_dram_init();
 
 #endif // __SUN50IW9_SYS_DRAM_H__
diff --git a/include/drivers/sys-rtc.h b/include/drivers/sys-rtc.h
@@ -12,20 +12,32 @@
 
 #include "log.h"
 
+#define EFEX_FLAG (0x5AA5A55A)
+#define RTC_FEL_INDEX 2
+#define RTC_BOOT_INDEX 6
+
+/* Write data to the RTC register at the specified index */
 void rtc_write_data(int index, uint32_t val);
 
+/* Read data from the RTC register at the specified index */
 uint32_t rtc_read_data(int index);
 
+/* Set the FEL flag in the RTC register */
 void rtc_set_fel_flag(void);
 
+/* Set the start time in milliseconds in the RTC register */
 void rtc_set_start_time_ms(void);
 
+/* Probe the FEL flag in the RTC register */
 uint32_t rtc_probe_fel_flag(void);
 
+/* Clear the FEL flag in the RTC register */
 void rtc_clear_fel_flag(void);
 
+/* Set the bootmode flag in the RTC register */
 int rtc_set_bootmode_flag(uint8_t flag);
 
+/* Get the bootmode flag from the RTC register */
 int rtc_get_bootmode_flag(void);
 
 #endif// __SYS_RTC_H__
diff --git a/payloads/sun50iw9_libdram/include/rtc.h b/payloads/sun50iw9_libdram/include/rtc.h
@@ -0,0 +1,19 @@
+#ifndef __RTC_H__
+#define __RTC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SUNXI_RTC_BASE (0x07000000)
+#define SUNXI_RTC_DATA_BASE (SUNXI_RTC_BASE + 0x100)
+
+#define RTC_FEL_INDEX 2
+
+void set_timer_count();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RTC_H__ */
diff --git a/payloads/sun50iw9_libdram/source/main.c b/payloads/sun50iw9_libdram/source/main.c
@@ -8,10 +8,18 @@
 #include <string.h>
 #include <types.h>
 
+#include <rtc.h>
+
 // init_DRAM in libdram.a
 extern int init_DRAM(int type, void *buff);
 
-extern void set_timer_count();
+void set_dram_size_rtc(uint32_t dram_size) {
+    do {
+        write32(SUNXI_RTC_DATA_BASE + RTC_FEL_INDEX * 4, dram_size);
+        asm volatile("DSB");
+        asm volatile("ISB");
+    } while (read32(SUNXI_RTC_DATA_BASE + RTC_FEL_INDEX * 4) != dram_size);
+}
 
 // Initialize DRAM using the dram_para structure
 void sys_init_dram(void) {
@@ -55,6 +63,7 @@ void sys_init_dram(void) {
     dram_size = init_DRAM(0, &dram_para);
     printf("Init DRAM Done, DRAM Size = %dM\n", dram_size);
     mdelay(10);
+    set_dram_size_rtc(dram_size);
 }
 
 // fake function for link, we aleady set ddr voltage in SyterKit

diff --git a/payloads/sun50iw9_libdram/source/printf.c b/payloads/sun50iw9_libdram/source/printf.c
@@ -8,15 +8,11 @@
 #include <string.h>
 #include <types.h>
 
+#include <rtc.h>
 #include <xformat.h>
 
 #define SUNXI_UART0_BASE 0x05000000
 
-#define SUNXI_RTC_BASE (0x07000000)
-#define SUNXI_RTC_DATA_BASE (SUNXI_RTC_BASE + 0x100)
-
-#define RTC_FEL_INDEX 2
-
 static uint32_t init_timestamp = 0;
 
 void set_timer_count() {

diff --git a/src/drivers/sun50iw9/sys-dram.c b/src/drivers/sun50iw9/sys-dram.c
@@ -24,17 +24,17 @@
 extern uint8_t __ddr_bin_start[];
 extern uint8_t __ddr_bin_end[];
 
-uint64_t sunxi_dram_init(void *para) {
+uint64_t sunxi_dram_init() {
     uint8_t *src = __ddr_bin_start;
     uint8_t *dst = (uint8_t *) INIT_DRAM_BIN_BASE;
 
     printk(LOG_LEVEL_DEBUG, "DRAM: load dram init from 0x%08x -> 0x%08x size: %08x\n", src, dst, __ddr_bin_end - __ddr_bin_start);
     memcpy(dst, src, __ddr_bin_end - __ddr_bin_start);
 
-    /* Set RTC data to current time_ms() */
+    /* Set RTC data to current time_ms(), Save in RTC_FEL_INDEX */
     rtc_set_start_time_ms();
 
-            printk(LOG_LEVEL_DEBUG, "DRAM: Now jump to 0x%08x run DRAMINIT\n", dst);
+    printk(LOG_LEVEL_DEBUG, "DRAM: Now jump to 0x%08x run DRAMINIT\n", dst);
 
     __asm__ __volatile__("isb sy"
                          :
@@ -50,6 +50,8 @@ uint64_t sunxi_dram_init(void *para) {
                          : "memory");
     ((void (*)(void)) ((void *) INIT_DRAM_BIN_BASE))();
 
+    uint32_t dram_size = rtc_read_data(RTC_FEL_INDEX);
+
     /* And Restore RTC Flag */
     rtc_clear_fel_flag();
 }
diff --git a/src/drivers/sys-rtc.c b/src/drivers/sys-rtc.c
@@ -12,9 +12,7 @@
 
 #include <reg-ncat.h>
 
-#define EFEX_FLAG (0x5AA5A55A)
-#define RTC_FEL_INDEX 2
-#define RTC_BOOT_INDEX 6
+#include <sys-rtc.h>
 
 void rtc_write_data(int index, uint32_t val) {
     writel(val, SUNXI_RTC_DATA_BASE + index * 4);