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YuzukiTsuru committed Dec 23, 2023
1 parent d3adde6 commit dcecd71
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Showing 4 changed files with 12 additions and 12 deletions.
6 changes: 3 additions & 3 deletions include/drivers/sun8iw21/reg/reg-ccu.h
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@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */

#ifndef __REG_CCU_H__
#define __REG_CCU_H__
#ifndef __SUN8IW21_REG_CCU_H__
#define __SUN8IW21_REG_CCU_H__

#define CCU_BASE (0x02001000)

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#define CCU_RISCV_CFG_GATING \
(0x1 << 0)// Bit field value for RISC-V configuration gating

#endif // __REG_CCU_H__
#endif // __SUN8IW21_REG_CCU_H__
6 changes: 3 additions & 3 deletions include/drivers/sun8iw21/reg/reg-dma.h
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@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: Apache-2.0 */

#ifndef __REG_DMA_H__
#define __REG_DMA_H__
#ifndef __SUN8IW21_REG_DMA_H__
#define __SUN8IW21_REG_DMA_H__

#include <reg-ncat.h>

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#define DMA_PKG_END_INT (1 << 1)
#define DMA_QUEUE_END_INT (1 << 2)

#endif// __REG_DMA_H__
#endif// __SUN8IW21_REG_DMA_H__
6 changes: 3 additions & 3 deletions include/drivers/sun8iw21/reg/reg-dram.h
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@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */

#ifndef __REG_DRAM_H__
#define __REG_DRAM_H__
#ifndef __SUN8IW21_REG_DRAM_H__
#define __SUN8IW21_REG_DRAM_H__

#define MCTL_COM_BASE (0x3102000)
#define MCTL_COM_WORK_MODE0 (0x00)
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#define VDD_SYS_PWROFF_GATING_REG (0x250)
#define ANALOG_PWROFF_GATING_REG (0x254)

#endif /* __REG_DRAM_H__ */
#endif /* __SUN8IW21_REG_DRAM_H__ */
6 changes: 3 additions & 3 deletions include/drivers/sun8iw21/reg/reg-rproc.h
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@@ -1,10 +1,10 @@
/* SPDX-License-Identifier: Apache-2.0 */

#ifndef __REG_RPROC_H__
#define __REG_RPROC_H__
#ifndef __SUN8IW21_REG_RPROC_H__
#define __SUN8IW21_REG_RPROC_H__

#define RISCV_CFG_BASE (0x06010000)// Base address for RISC-V configuration
#define RISCV_STA_ADD_REG \
(RISCV_CFG_BASE + 0x0204)// Register address for RISC-V start address

#endif// __REG_RPROC_H__
#endif// __SUN8IW21_REG_RPROC_H__

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