First versions

.github/workflows/check.yml

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+name: Check
+
+on: [push, pull_request]
+
+jobs:
+
+  check:
+
+    strategy:
+      matrix:
+        mcu: [bcm2835, bcm2837, bcm2711]
+        rust-version: [1.61.0, 1.62.1, 1.63.0, 1.64.0, 1.65.0, 1.66.1, 1.67.1, 1.68.0]
+
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v3
+
+      - name: Install Rust
+        run: rustup default ${{ matrix.rust-version }}
+
+      - name: Check crate
+        working-directory: crates/${{ matrix.mcu }}-lpa
+        run: |
+          cargo check
+          cargo check --all-features

.gitmodules

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+[submodule "peripherals"]
+	path = peripherals
+	url = https://github.com/abt8601/broadcom-peripherals.git
+	branch = main-build

README.md

@@ -1,2 +1,49 @@
 # raspi-pacs
-Peripheral access crates for the Broadcom microprocessors used in the Raspberry Pi boards
+
+[![crates.io](https://img.shields.io/crates/v/bcm2835-lpa.svg?label=crates.io%20%28bcm2835-lpa%29)](https://crates.io/crates/bcm2835-lpa)
+[![docs.rs](https://img.shields.io/docsrs/bcm2835-lpa?label=docs%20%28bcm2835-lpa%29)](https://docs.rs/bcm2835-lpa)
+
+[![crates.io](https://img.shields.io/crates/v/bcm2837-lpa.svg?label=crates.io%20%28bcm2837-lpa%29)](https://crates.io/crates/bcm2837-lpa)
+[![docs.rs](https://img.shields.io/docsrs/bcm2837-lpa?label=docs%20%28bcm2837-lpa%29)](https://docs.rs/bcm2837-lpa)
+
+[![crates.io](https://img.shields.io/crates/v/bcm2711-lpa.svg?label=crates.io%20%28bcm2711-lpa%29)](https://crates.io/crates/bcm2711-lpa)
+[![docs.rs](https://img.shields.io/docsrs/bcm2711-lpa?label=docs%20%28bcm2711-lpa%29)](https://docs.rs/bcm2711-lpa)
+
+Peripheral access crates
+for the Broadcom microprocessors used in the Raspberry Pi boards.
+
+This repository contains the PACs for the following MCUs:
+
+- [BCM2835](crates/bcm2835-lpa/)
+- [BCM2837](crates/bcm2837-lpa/)
+- [BCM2711](crates/bcm2711-lpa/)
+
+These crates are generated by [`svd2rust`](https://crates.io/crates/svd2rust)
+from the
+[SVD files](https://github.com/abt8601/broadcom-peripherals/tree/main-build/svd/gen)
+in
+[`abt8601/broadcom-peripherals`](https://github.com/abt8601/broadcom-peripherals/tree/main-build),
+which are based on those in
+[`adafruit/broadcom-peripherals`](https://github.com/adafruit/broadcom-peripherals/tree/main-build).
+(The SVD files in these two repositories are identical,
+save that those in the former has the missing tags required by `svd2rust`.)
+
+## Generating the Crates
+
+### Prerequisites
+
+- Rust toolchain with `cargo` and `rustfmt`
+- [`svd2rust`](https://crates.io/crates/svd2rust)
+- [`form`](https://crates.io/crates/form)
+
+Also, the submodule `peripherals` must be checked out.
+
+### Generating
+
+To generate the PAC for a particular MCU, run:
+
+```sh
+./gen.sh <mcu_name>
+```
+
+where `<mcu_name>` is one of `bcm2835`, `bcm2837`, or `bcm2711`.

crates/bcm2711-lpa/.gitignore

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+/target
+/Cargo.lock

crates/bcm2711-lpa/Cargo.toml

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+[package]
+name = "bcm2711-lpa"
+version = "0.1.0"
+authors = ["Po-Yi Tsai <abt8601@protonmail.ch>"]
+edition = "2021"
+rust-version = "1.61.0"
+description = "Peripheral access crate for BCM2711 found in the Raspberry Pi 4."
+repository = "https://github.com/abt8601/raspi-pacs"
+license = "Unlicense"
+keywords = ["raspberrypi", "bcm2711", "pac"]
+categories = ["embedded", "hardware-support", "no-std", "no-std::no-alloc"]
+
+[dependencies]
+critical-section = { version = "1.0", optional = true }
+vcell = "0.1.0"
+portable-atomic = { version = "0.3.16", default-features = false }
+
+[features]
+rt = []

crates/bcm2711-lpa/README.md

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+# bcm2711-lpa
+
+[![crates.io](https://img.shields.io/crates/v/bcm2711-lpa.svg)](https://crates.io/crates/bcm2711-lpa)
+[![docs.rs](https://img.shields.io/docsrs/bcm2711-lpa)](https://docs.rs/bcm2711-lpa)
+
+Peripheral access crate for BCM2711 found in the Raspberry Pi 4.
+
+This crate is generated by [`svd2rust`](https://crates.io/crates/svd2rust)
+from the
+[SVD file](https://github.com/abt8601/broadcom-peripherals/blob/6bc44a4fd5c956249b9d8815f66a9df41b5791b1/svd/gen/bcm2711_lpa.svd)
+in
+[`abt8601/broadcom-peripherals@6bc44a4`](https://github.com/abt8601/broadcom-peripherals/tree/6bc44a4fd5c956249b9d8815f66a9df41b5791b1),
+which is based on that in
+[`adafruit/broadcom-peripherals@d3a6b50`](https://github.com/adafruit/broadcom-peripherals/tree/d3a6b50a21e7dd49ba4bfa0374da3407594caa50).
+(The SVD files in these two repositories are identical,
+save that that in the former has the missing tags required by `svd2rust`.)

crates/bcm2711-lpa/src/aux.rs

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+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Interrupt status"]
+    pub irq: IRQ,
+    #[doc = "0x04 - Enable sub-peripherals"]
+    pub enables: ENABLES,
+}
+#[doc = "IRQ (rw) register accessor: an alias for `Reg<IRQ_SPEC>`"]
+pub type IRQ = crate::Reg<irq::IRQ_SPEC>;
+#[doc = "Interrupt status"]
+pub mod irq;
+#[doc = "ENABLES (rw) register accessor: an alias for `Reg<ENABLES_SPEC>`"]
+pub type ENABLES = crate::Reg<enables::ENABLES_SPEC>;
+#[doc = "Enable sub-peripherals"]
+pub mod enables;

crates/bcm2711-lpa/src/aux/enables.rs

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+#[doc = "Register `ENABLES` reader"]
+pub struct R(crate::R<ENABLES_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLES_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLES_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLES_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLES` writer"]
+pub struct W(crate::W<ENABLES_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLES_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLES_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLES_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `UART_1` reader - UART1 enabled"]
+pub type UART_1_R = crate::BitReader<bool>;
+#[doc = "Field `UART_1` writer - UART1 enabled"]
+pub type UART_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLES_SPEC, bool, O>;
+#[doc = "Field `SPI_1` reader - SPI1 enabled"]
+pub type SPI_1_R = crate::BitReader<bool>;
+#[doc = "Field `SPI_1` writer - SPI1 enabled"]
+pub type SPI_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLES_SPEC, bool, O>;
+#[doc = "Field `SPI_2` reader - SPI2 enabled"]
+pub type SPI_2_R = crate::BitReader<bool>;
+#[doc = "Field `SPI_2` writer - SPI2 enabled"]
+pub type SPI_2_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLES_SPEC, bool, O>;
+impl R {
+    #[doc = "Bit 0 - UART1 enabled"]
+    #[inline(always)]
+    pub fn uart_1(&self) -> UART_1_R {
+        UART_1_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - SPI1 enabled"]
+    #[inline(always)]
+    pub fn spi_1(&self) -> SPI_1_R {
+        SPI_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - SPI2 enabled"]
+    #[inline(always)]
+    pub fn spi_2(&self) -> SPI_2_R {
+        SPI_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - UART1 enabled"]
+    #[inline(always)]
+    #[must_use]
+    pub fn uart_1(&mut self) -> UART_1_W<0> {
+        UART_1_W::new(self)
+    }
+    #[doc = "Bit 1 - SPI1 enabled"]
+    #[inline(always)]
+    #[must_use]
+    pub fn spi_1(&mut self) -> SPI_1_W<1> {
+        SPI_1_W::new(self)
+    }
+    #[doc = "Bit 2 - SPI2 enabled"]
+    #[inline(always)]
+    #[must_use]
+    pub fn spi_2(&mut self) -> SPI_2_W<2> {
+        SPI_2_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable sub-peripherals\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enables](index.html) module"]
+pub struct ENABLES_SPEC;
+impl crate::RegisterSpec for ENABLES_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enables::R](R) reader structure"]
+impl crate::Readable for ENABLES_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enables::W](W) writer structure"]
+impl crate::Writable for ENABLES_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ENABLES to value 0"]
+impl crate::Resettable for ENABLES_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

crates/bcm2711-lpa/src/aux/irq.rs

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+#[doc = "Register `IRQ` reader"]
+pub struct R(crate::R<IRQ_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRQ_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRQ_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRQ_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `IRQ` writer"]
+pub struct W(crate::W<IRQ_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IRQ_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IRQ_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IRQ_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `UART_1` reader - UART1 interrupt active"]
+pub type UART_1_R = crate::BitReader<bool>;
+#[doc = "Field `UART_1` writer - UART1 interrupt active"]
+pub type UART_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRQ_SPEC, bool, O>;
+#[doc = "Field `SPI_1` reader - SPI1 interrupt active"]
+pub type SPI_1_R = crate::BitReader<bool>;
+#[doc = "Field `SPI_1` writer - SPI1 interrupt active"]
+pub type SPI_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRQ_SPEC, bool, O>;
+#[doc = "Field `SPI_2` reader - SPI2 interrupt active"]
+pub type SPI_2_R = crate::BitReader<bool>;
+#[doc = "Field `SPI_2` writer - SPI2 interrupt active"]
+pub type SPI_2_W<'a, const O: u8> = crate::BitWriter<'a, u32, IRQ_SPEC, bool, O>;
+impl R {
+    #[doc = "Bit 0 - UART1 interrupt active"]
+    #[inline(always)]
+    pub fn uart_1(&self) -> UART_1_R {
+        UART_1_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - SPI1 interrupt active"]
+    #[inline(always)]
+    pub fn spi_1(&self) -> SPI_1_R {
+        SPI_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - SPI2 interrupt active"]
+    #[inline(always)]
+    pub fn spi_2(&self) -> SPI_2_R {
+        SPI_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - UART1 interrupt active"]
+    #[inline(always)]
+    #[must_use]
+    pub fn uart_1(&mut self) -> UART_1_W<0> {
+        UART_1_W::new(self)
+    }
+    #[doc = "Bit 1 - SPI1 interrupt active"]
+    #[inline(always)]
+    #[must_use]
+    pub fn spi_1(&mut self) -> SPI_1_W<1> {
+        SPI_1_W::new(self)
+    }
+    #[doc = "Bit 2 - SPI2 interrupt active"]
+    #[inline(always)]
+    #[must_use]
+    pub fn spi_2(&mut self) -> SPI_2_W<2> {
+        SPI_2_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq](index.html) module"]
+pub struct IRQ_SPEC;
+impl crate::RegisterSpec for IRQ_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irq::R](R) reader structure"]
+impl crate::Readable for IRQ_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [irq::W](W) writer structure"]
+impl crate::Writable for IRQ_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets IRQ to value 0"]
+impl crate::Resettable for IRQ_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}