projects/adrv9026: Add reference design for ADRV9026+ZCU102 #1256
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AndrDragomir
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Overall the project looks fine. One thing that needs to be tested in hardware is that the DMA on the RX path can handle the maximum rate, as it has as input 128bits@250 MHz and output 128bits@250MHz. You could try to increase PL1 clock to around 300MHz.
Other than that, there are small cleanup comments
| .tx_sync_0 (tx_sync), | ||
| .tx_sysref_0 (sysref)); | ||
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| endmodule |
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Extra new line should be removed
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Signed-off-by: AndrDragomir <andrei.dragomir@analog.com>
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acostina
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PR Description
Initial design for Madura (adrv9026)
Linux and no-OS support tested in hardware
PR Type
PR Checklist