projects:ad9081_fmca_ebz_x_band: Fix synchronization #1823
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
PopPaul2021
requested review from
AndreiGrozav,
IuliaCMoldovan,
LBFFilho,
StancaPop,
acostina,
bluncan,
gastmaier,
podgori and
sarpadi
as code owners
PopPaul2021
force-pushed
the
stingray_cw_fix
branch
from
235776f to
71875e4
Compare
Contributor
Author
|
Rebased the branch to the latest main and opened a PR on the Linux repository to match the HDL changes: analogdevicesinc/linux#3047 |
podgori
reviewed
Jan 14, 2026
PopPaul2021
force-pushed
the
stingray_cw_fix
branch
from
71875e4 to
3147437
Compare
When the data offload source and destination clock are connected to the same source there is a DRC error. By exposing the ASYNC_CLK parameter and setting it to 0 in this use-case the issue is solved. Signed-off-by: PopPaul2021 <paul.pop@analog.com>
Signed-off-by: PopPaul2021 <paul.pop@analog.com>
The CDC was moved from the DO to the DMA. The DMA clock was moved from the 250MHz PS clock to a 330MHz clock generated by the clock wizard. The cache coherency was disabled in order to have the HP ports working at maximum frequency. Signed-off-by: PopPaul2021 <paul.pop@analog.com>
The block diagram of the HDL design was updated. Notes regarding the system's use-case were added. Signed-off-by: PopPaul2021 <paul.pop@analog.com>
PopPaul2021
force-pushed
the
stingray_cw_fix
branch
from
3147437 to
91f505a
Compare
podgori
approved these changes
Jan 16, 2026
Contributor
Author
|
RetriggerCI |
3 similar comments
Contributor
Author
|
RetriggerCI |
Contributor
|
RetriggerCI |
Collaborator
|
RetriggerCI |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
4 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
PR Description
The CDC was moved from the DO to the DMA.
The DMA clock was moved from the 250MHz PS clock to a 330MHz clock generated by the clock wizard.
The cache coherency was disabled in order to have the HP ports working at maximum frequency.
PR Type
PR Checklist