fixup! WIP: [#64890] Add VCS support and unify usage of simulators

antmicro · Sep 10, 2024 · 6118d31 · 6118d31
1 parent 1de2ac2
commit 6118d31
Show file tree

Hide file tree

Showing 7 changed files with 2 additions and 24 deletions.
diff --git a/samples/ahb_dma/CMakeLists.txt b/samples/ahb_dma/CMakeLists.txt
@@ -12,9 +12,5 @@ set(SIM_FILES dma_ahb_simple.v)
 set(VERILATOR_CSOURCES ../../cpp/sim_main_dpi.cpp)
 set(VERILATOR_ARGS -Wno-WIDTH -Wno-CASEINCOMPLETE --timing)
 
-# Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address)
-
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/ahb_mem/CMakeLists.txt b/samples/ahb_mem/CMakeLists.txt
@@ -12,9 +12,5 @@ set(SIM_FILES mem_ahb.v)
 set(VERILATOR_CSOURCES ../../cpp/sim_main_dpi.cpp)
 set(VERILATOR_ARGS --timing)
 
-# Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address)
-
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/apb3_completer_mem/CMakeLists.txt b/samples/apb3_completer_mem/CMakeLists.txt
@@ -12,9 +12,5 @@ set(SIM_FILES apb3_completer_mem.sv)
 set(VERILATOR_CSOURCES ../../cpp/sim_main_dpi.cpp)
 set(VERILATOR_ARGS --timing)
 
-# Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address)
-
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/apb3_requester_synth/CMakeLists.txt b/samples/apb3_requester_synth/CMakeLists.txt
@@ -17,9 +17,5 @@ set(SIM_FILES
 set(VERILATOR_CSOURCES ../../cpp/sim_main_dpi.cpp)
 set(VERILATOR_ARGS --timing)
 
-# Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address)
-
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/apb3_standalone/CMakeLists.txt b/samples/apb3_standalone/CMakeLists.txt
@@ -18,9 +18,5 @@ set(SIM_FILES
 set(VERILATOR_CSOURCES sim_main.cpp)
 set(VERILATOR_ARGS --timing --assert)
 
-# Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS "")
-
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/axi_fastvdma/CMakeLists.txt b/samples/axi_fastvdma/CMakeLists.txt
@@ -14,8 +14,7 @@ set(AXI_DATA_WIDTH 32 CACHE STRING "Width of data channels in the AXI data bus")
 set(VERILATOR_ARGS --timing -GAXIDataWidth=${AXI_DATA_WIDTH})
 
 # Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address -GAXIDataWidth=${AXI_DATA_WIDTH})
+set(QUESTA_OPTIMIZATION_ARGS GAXIDataWidth=${AXI_DATA_WIDTH})
 
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)
diff --git a/samples/axi_ram/CMakeLists.txt b/samples/axi_ram/CMakeLists.txt
@@ -14,8 +14,7 @@ set(AXI_DATA_WIDTH 64 CACHE STRING "Width of data channels in the AXI data bus")
 set(VERILATOR_ARGS -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNSIGNED --timing -GAXIDataWidth=${AXI_DATA_WIDTH})
 
 # Questa variables
-set(QUESTA_ARGS "")
-set(QUESTA_OPTIMIZATION_ARGS -floatparameters+ReceiverPort+SenderPort+Address -GAXIDataWidth=${AXI_DATA_WIDTH})
+set(QUESTA_OPTIMIZATION_ARGS -GAXIDataWidth=${AXI_DATA_WIDTH})
 
 # CMake file doing the hard job
 include(../../cmake/build-cosimulation.cmake)